PCK351 1:10 clock distribution device with 3-State outputs Rev. 01 — 14 May 2002 Product data 1. Description The PCK351 is a high-performance 3.3 V LVTTL clock distribution device. The PCK351 enables a single clock input to be distributed to ten outputs with minimum output skew and pulse skew. The use of distributed VCC and GND pins in the PCK351 ensures reduced switching noise. The PCK351 is characterized for operation over the supply range 3.0 V to 3.6 V, and over the industrial temperature range −40 to +85 °C. 2. Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 1:10 LVTTL clock distribution Low output to output skew Low output pulse skew Over voltage tolerant inputs and outputs LVTTL-compatible inputs and outputs Distributed VCC and ground pins reduce switching noise Balanced High-drive outputs (−32 mA IOH, 32 mA IOL) Reduced power dissipation due to the state-of-the-art QUBiC-LP process Supply range of +3.0 V to +3.6 V Package options include plastic small-outline (D) and shrink small-outline (DB) packages ■ Industrial temperature range −40 to +85 °C ■ PCK351 is identical to and replaces PTN3151. PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. Symbol Parameter Conditions Min Typ Max Unit tPHL/tPLH propagation delay: A to Yn CL = 50 pF; VCC = 3.3 V 3.1 3.6 4.1 ns CI input capacitance VI = VCC or GND - 4 - pF CO output capacitance VI = VCC or GND - 6 - pF CL = 50 pF; f = 1 MHz - 48 - pF power dissipation CPD [1] capacitance[1] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; ∑ (CL × VCC2 × fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in Volts. 4. Ordering information Table 2: Ordering information Type number Package Name Description Version PCK351D SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 PCK351DB SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 2 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs 5. Pinning information 5.1 Pinning 1 24 GND Y10 2 23 Y1 VCC 3 22 VCC Y9 4 21 Y2 Y9 4 21 Y2 OE 5 20 GND OE 5 20 GND A 6 GND 7 GND Y8 18 Y4 GND 7 8 17 GND GND 8 9 16 Y5 14 Y6 Y7 11 13 GND GND 12 19 Y3 18 Y4 17 GND 16 Y5 Y8 9 15 VCC VCC 10 14 Y6 Y7 11 13 GND GND 12 002aaa280 Fig 1. SO24 pin configuration. 22 VCC VCC 3 A 6 15 VCC 23 Y1 Y10 2 19 Y3 VCC 10 24 GND GND 1 PCK351DB PCK351D GND 002aaa281 Fig 2. SSOP24 pin configuration. 5.2 Pin description Table 3: Symbol Pin description Pin Description GND 1, 7, 8, 12, 13, 17, 20, 24 ground (0 V) Y10 to Y1 2, 4, 9, 11, 14, 16, 18, 19, 21, 23 outputs VCC 3, 10, 15, 22 supply voltage OE 5 output enable input (Active-LOW) A 6 data input © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 3 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs 6. Functional description 6.1 Function table Table 4: Function table Inputs [1] Outputs A OE Yn L H Z H H Z L L L H L H H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 6.2 Logic symbol OE 5 EN 23 21 19 18 A 16 6 14 11 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 4 Y9 2 Y10 9 002aaa283 Fig 3. Logic symbol. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 4 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs 6.3 Logic diagram OE 5 23 21 19 18 A Y1 Y2 Y3 Y4 6 16 14 11 9 4 2 Y5 Y6 Y7 Y8 Y9 Y10 002aaa282 Fig 4. Logic diagram. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 5 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs 7. Limiting values Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).[1], [2] Symbol Parameter VCC supply voltage range Conditions Min Max Unit −0.5 +4.6 V −0.5 +7.0 V −0.5 +3.6 V VI input voltage range [3] VO output voltage range [3] IIK input clamp current VI < 0 V - −18 mA IOK output clamp current VI < 0 V - −50 mA IO output sink current - 64 mA ICC, IGND VCC or GND current - ±75 mA Tstg storage temperature −65 +150 °C PD maximum power dissipation [1] [2] [3] SO package Tamb = +55 °C - 0.65 W SSOP package Tamb = +55 °C - 1.7 W Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ‘recommended operating conditions’ is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 °C. The input and output negative voltage ratings may be exceeded if the input and output clamp currents are observed. 8. Recommended operating conditions Table 6: Recommended operating conditions See note 1. Symbol Parameter Min Max Unit VCC supply voltage 3.0 3.6 V VIH HIGH-level input voltage 2.0 5.5 V VI input voltage 0 0.8 V Tamb ambient temperature see Table 7 “DC characteristics” and Table 8 “AC characteristics” per device −40 +85 °C tr, tf input rise and fall times VCC = 3.3 ±0.3 V - 100 ns/V [1] Conditions Unused pins (input or I/O) must be held HIGH or LOW. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 6 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs 9. Static characteristics Table 7: DC characteristics Over recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb = 25 °C. Symbol Parameter Conditions Min Typ Max Unit VIK input diode voltage VCC = 3.0 V; II = −18 mA - - −1.2 V VOH HIGH-level output voltage VCC = 3.0 V; IOH = −32 mA 2.0 - - V VOL LOW-level output voltage VCC = 3.0 V; IOL = 32 mA - - 0.5 V ILI input leakage current VCC = 3.6 V; VI = GND or 5.5 V - - ±1.0 µA ILO output leakage current VCC = 3.6 V; VO = 2.5 V −15 - −150 mA - - ±10 µA [1] IOZ 3-State output OFF-state current VCC = 3.6 V; VO = 3 V ICC quiescent supply current VCC = 3.6 V; VI = VCC or GND; IO = 0; outputs HIGH - - 0.3 mA VCC = 3.6 V; VI = VCC or GND; IO = 0; outputs LOW - - 25 mA VCC = 3.6 V; VI = VCC or GND; IO = 0; outputs disabled - - 0.3 mA CI input capacitance VCC = 3.3 V; VI = VCC or GND; f = 10 MHz - 4 - pF CO output capacitance VCC = 3.3 V; VO = VCC or GND; f = 10 MHz - 6 - pF [1] Not more than one output should be tested at a time, and the duration of the test should not exceed one second. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 7 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs 10. Dynamic characteristics Table 8: AC characteristics GND = 0 V; tr = tf ≤ 3.0 ns. Symbol Parameter Conditions Min Typ Max Unit VCC = 3.3 V; Tamb = 25 °C tPLH/tPHL propagation delay A to Yn CL = 50 pF; see Figures 5 and 8 3.1 3.6 4.1 ns tPZH/tPZL propagation delay OE to Yn CL = 50 pF; see Figures 6 and 8 1.8 3.8 5.5 ns tPHZ/tPLZ propagation delay OE to Yn CL = 50 pF; see Figures 6 and 8 1.8 4.0 5.9 ns tsk(o) output-to-output skew A to Yn CL = 50 pF; see Figures 7 and 8 - 0.3 0.5 ns tsk(p) pulse skew A to Yn CL = 50 pF; see Figures 7 and 8 - 0.2 0.8 ns tsk(pr) part-to-part skew A to Yn CL = 50 pF; see Figures 7 and 8 - - 1 ns tr rise time A to Yn CL = 50 pF; see Figures 5 and 8 - - - ns tf fall time A to Yn CL = 50 pF; see Figures 5 and 8 - - - ns VCC = 3.3 to 3.6 V; Tamb = 0 °C to +70 °C tPLH/tPHL propagation delay A to Yn CL = 50 pF; see Figures 5 and 8 - - - ns tPZH/tPZL propagation delay OE to Yn CL = 50 pF; see Figures 6 and 8 1.3 - 5.9 ns tPHZ/tPLZ propagation delay OE to Yn CL = 50 pF; see Figures 6 and 8 1.7 - 6.3 ns tsk(o) output-to-output skew A to Yn CL = 50 pF; see Figures 7 and 8 - - 0.5 ns tsk(p) pulse skew A to Yn CL = 50 pF; see Figures 7 and 8 - - 0.8 ns tsk(pr) part-to-part skew A to Yn CL = 50 pF; see Figures 7 and 8 - - 1 ns tr rise time A to Yn CL = 50 pF; see Figures 5 and 8 - - 1.5 ns tf fall time A to Yn CL = 50 pF; see Figures 5 and 8 - - 1.5 ns Table 9: Switching characteristics Temperature and VCC coefficients over recommended operating free-air temperature and VCC range; note 1. Symbol Parameter Conditions Max Unit ∆tPLH(T) temperature coefficient of LOW-to-HIGH propagation delay A to Yn (average value) note 2 65 ps/10 °C ∆tPHL(T) temperature coefficient of HIGH-to-LOW propagation delay A to Yn (average value) note 2 45 ps/10 °C ∆tPLH(V) VCC coefficient of LOW-to-HIGH propagation delay A to Yn (average value) note 3 −140 ps/100 mV ∆tPHL(V) VCC coefficient of HIGH-to-LOW propagation delay A to Yn (average value) note 3 −120 ps/100 mV [1] [2] [3] These data were extracted from characterization material and are not tested at the factory. ∆tPLH(T) and ∆tPHL(T) are virtually independent of VCC. ∆tPLH(V) and ∆tPHL(V) are virtually independent of temperature. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 8 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs 10.1 AC waveforms 3.0 V A input 1.5 V 0V tPLH tPHL VOH Yn output 2V 1.5 V 0.8 V VOL tr tf 002aaa289 Fig 5. The input (A) to outputs (Yn) propagation delays and rise and fall times. 3V OE input 1.5 V 0V tPZL tPLZ VCC output LOW-to-OFF OFF-to-LOW 1.5 V VOL + 0.3 V VOL tPZH tPHZ VOH VOH − 0.3 V output HIGH-to-OFF OFF-to-HIGH 1.5 V GND outputs disabled outputs disabled outputs disabled 002aaa290 Fig 6. 3-State enable and disable times. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 9 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs A input Y1 output tPHL1 tPLH1 Y2 output tPHL2 tPLH2 Y3 output tPHL3 tPLH3 Y4 output tPHL4 tPLH4 Y5 output tPHL5 tPLH5 Y6 output tPHL6 tPLH6 Y7 output tPHL7 tPLH7 Y8 output tPHL8 tPLH8 Y9 output tPHL9 tPLH9 Y10 output tPHL10 tPLH10 002aaa286 (1) Output-to-output skew is the highest values of positive and negative edge skew: tsk(o) = tPLHn(max) − tPLHn(min) and tsk(o) = tPHLn(max) − tPHLn(min) for n = 1 to 10. (2) Output pulse skew is the highest value of: tsk(p) = |tPLHn − tPHLn| for n = 1 to 10. (3) Part-to-part skew tsk(pr) represents the positive and negative edge skew between outputs of several devices operating under identical conditions. Fig 7. Calculation of tsk(o), tsk(p), and tsk(pr). © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 10 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs S1 6V open VCC PULSE GENERATOR VI 500 Ω GND VO D.U.T. RT CL 50 pF 500 Ω 002aaa285 TEST S1 tPLH/tPHL open tPLZ/tPZL 6V tPHZ/tPZH GND Fig 8. Load circuitry for switching times. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 11 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs 11. Package outline SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 D E A X c HE y v M A Z 24 13 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.61 0.60 0.30 0.29 0.050 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 inches 0.10 Z (1) θ o 8 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT137-1 075E05 MS-013 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-05-22 99-12-27 Fig 9. SO24 package outline (SOT137-1). © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 12 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm D SOT340-1 E A X c HE y v M A Z 24 13 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 w M bp e detail X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.0 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 8.4 8.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.8 0.4 8 0o o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT340-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 99-12-27 MO-150 Fig 10. SSOP24 package outline (SOT340-1). © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 13 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs 12. Soldering 12.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 12.2 Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C small/thin packages. 12.3 Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 14 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 12.4 Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 12.5 Package related soldering information Table 10: Suitability of surface mount IC packages for wave and reflow soldering methods Package[1] Soldering method Reflow[2] Wave BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS not suitable[3] suitable PLCC[4], SO, SOJ suitable suitable recommended[4][5] LQFP, QFP, TQFP not SSOP, TSSOP, VSO not recommended[6] [1] [2] [3] [4] [5] [6] suitable suitable For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 13. Revision history Table 11: Revision history Rev Date 01 20020514 CPCN Description - Product data; initial version. Engineering Change Notice 853-2344 28198. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Product data Rev. 01 — 14 May 2002 15 of 17 PCK351 Philips Semiconductors 1:10 clock distribution device with 3-State outputs 14. Data sheet status Data sheet status[1] Product status[2] Definition Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 15. Definitions 16. Disclaimers Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: [email protected]. Product data Fax: +31 40 27 24825 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09791 Rev. 01 — 14 May 2002 16 of 17 Philips Semiconductors PCK351 1:10 clock distribution device with 3-State outputs Contents 1 2 3 4 5 5.1 5.2 6 6.1 6.2 6.3 7 8 9 10 10.1 11 12 12.1 12.2 12.3 12.4 12.5 13 14 15 16 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Logic symbol. . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 14 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 14 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 15 Package related soldering information . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 © Koninklijke Philips Electronics N.V. 2002. Printed in the U.S.A All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 14 May 2002 Document order number: 9397 750 09791