PHILIPS 74AHCT1G66GW

INTEGRATED CIRCUITS
DATA SHEET
74AHC1G66; 74AHCT1G66
Bilateral switch
Product specification
Supersedes data of 2002 Feb 15
2002 Jun 06
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
DESCRIPTION
FEATURES
• Very low ON-resistance:
The 74AHC1G/AHCT1G66 is a high-speed Si-gate CMOS
device.
– 26 Ω (typical) at VCC = 3.0 V
– 16 Ω (typical) at VCC = 4.5 V
The 74AHC1G/AHCT1G66 provides an analog switch.
The switch has two input/output pins (Y and Z) and an
active HIGH enable input pin (E). When pin E is LOW, the
analog switch is turned off.
– 14 Ω (typical) at VCC = 5.5 V.
• ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V
– CDM EIA/JESD22-C101 exceeds 1000 V.
• High noise immunity
• Low power dissipation
• Balanced propagation delays
• SOT353 and SOT753 package
• Output capability: non standard
• Specified from −40 to +125 °C.
QUICK REFERENCE DATA
Ground = 0 V; Tamb = 25 °C; tr = tf ≤ 3 ns.
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
AHC1G
AHCT1G
tPZH/tPZL
turn-on time E to Vos
CL = 15 pF; RL = 1 kΩ;
VCC = 5 V
3
3
ns
tPHZ/tPLZ
turn-off time E to Vos
CL = 15 pF; RL = 1 kΩ;
VCC = 5 V
5
5
ns
CI
input capacitance
2
2
pF
CPD
power dissipation capacitance
CL = 50 pF; f = 10 MHz;
notes 1 and 2
13
15
pF
CS
switch capacitance
4
4
pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ((CL + CS) × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = maximum switch capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC.
2002 Jun 06
2
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
FUNCTION TABLE
See note 1.
INPUT E
SWITCH
L
OFF
H
ON
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
TEMPERATURE
RANGE
PINS
PACKAGE
MATERIAL
CODE
MARKING
74AHC1G66GW
−40 to +125 °C
5
SC-88A
plastic
SOT353
AL
74AHCT1G66GW
−40 to +125 °C
5
SC-88A
plastic
SOT353
CL
74AHC1G66GV
−40 to +125 °C
5
SC-74A
plastic
SOT753
A66
74AHCT1G66GV
−40 to +125 °C
5
SC-74A
plastic
SOT753
C66
PINNING
PIN
SYMBOL
DESCRIPTION
1
Y
independent input/output
2
Z
independent output/input
3
GND
ground (0 V)
4
E
enable input (active HIGH)
5
VCC
supply voltage
handbook, halfpage
handbook, halfpage
Y 1
Z 2
GND
5 VCC
Y
66
3
4
E
E
MNA074
MNA627
Fig.1 Pin configuration.
2002 Jun 06
Z
Fig.2 Logic symbol.
3
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
Z
handbook, halfpage
handbook, halfpage
1
4 #
1
1
2
X1
MNA076
Y
E
VCC
Fig.3 IEC logic symbol.
2002 Jun 06
Fig.4 Logic diagram.
4
MNA628
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
RECOMMENDED OPERATING CONDITIONS
74AHC1G66
SYMBOL
PARAMETER
74AHCT1G66
CONDITIONS
UNIT
MIN.
TYP.
MAX.
MIN.
VCC
supply voltage
2.0
5.0
5.5
4.5
VI
input voltage
0
−
5.5
VS
switch voltage
0
−
VCC
Tamb
operating ambient
temperature
see DC and AC
−40
characteristics per
device
+25
tr, tf
input rise and fall times
VCC = 3.3 ±0.3 V
−
VCC = 5.0 ±0.5 V
−
TYP.
MAX.
5.0
5.5
V
0
−
5.5
V
0
−
VCC
V
+125
−40
+25
+125
°C
−
100
−
−
−
ns/V
−
20
−
−
20
ns/V
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V);
note 1.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
−0.5
+7.0
V
IIK
input diode current
VI < −0.5 V or VI > VCC + 0.5 V
−
−20
mA
ISK
switch diode current
VS < −0.5 V or VS > VCC + 0.5 V
−
±20
mA
−0.5 V < VO < VCC + 0.5 V
IS
switch source or sink current
−
±25
mA
ICC, IGND
VCC or GND current
−
±75
mA
Tstg
storage temperature
−65
+150
°C
PD
power dissipation per package
−
250
mW
for temperature range from −40 to +125 °C
Note
1. To avoid drawing VCC current out of pin Z, when switch current flows into pin Y, the voltage drop across the
bidirectional switch must not exceed 0.4 V. If the switch current flows into pin Z, no VCC current will flow out of pin Y.
In this case there is no limit for the voltage drop across the switch, but the voltage at pins Y and Z may not exceed
VCC or GND.
2002 Jun 06
5
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
DC CHARACTERISTICS
Type 74AHC1G66
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Tamb (°C)
TEST CONDITIONS
SYMBOL
PARAMETER
OTHER
VIH
VIL
HIGH-level input
voltage
LOW-level input
voltage
−40 to +85
25
VCC
(V)
−40 to +125
UNIT
MIN.
TYP. MAX. MIN. MAX. MIN. MAX.
2.0
1.5
−
−
1.5
−
1.5
−
V
3.0
2.1
−
−
2.1
−
2.1
−
V
5.5
3.85
−
−
3.85
−
3.85
−
V
2.0
−
−
0.5
−
0.5
−
0.5
V
3.0
−
−
0.9
−
0.9
−
0.9
V
5.5
−
−
1.65
−
1.65
−
1.65
V
ILI
input leakage
current
5.5
−
−
0.1
−
1.0
−
2.0
µA
IS
analog switch
VI = VIH or VIL;
5.5
current, OFF-state |VS| = VCC − GND;
see Fig.5
−
−
0.1
−
1.0
−
4.0
µA
analog switch
current, ON-state
VI = VIH or VIL;
5.5
|VS| = VCC − GND;
see Fig.6
−
−
0.1
−
1.0
−
4.0
µA
ICC
quiescent supply
current
VI = VCC or GND; 5.5
Vis = GND or VCC;
Vos = VCC or GND
−
−
1.0
−
10
−
40
µA
CI
input capacitance
of enable input (E)
−
2
10
−
10
−
10
pF
CS
maximum switch
capacitance
−
4
10
−
10
−
10
pF
2002 Jun 06
VI = VCC or GND
independent I/O
6
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
Type 74AHCT1G66
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
Tamb (°C)
SYMBOL PARAMETER
−40 to +85
25
OTHER
VCC (V)
MIN.
−40 to +125
UNIT
TYP. MAX. MIN. MAX. MIN. MAX.
VIH
HIGH-level
input voltage
4.5 to 5.5 2.0
−
−
2.0
−
2.0
−
V
VIL
LOW-level
input voltage
4.5 to 5.5 −
−
0.8
−
0.8
−
0.8
V
ILI
input leakage
current
VI = VCC or GND
5.5
−
−
0.1
−
1.0
−
2.0
µA
IS
analog switch
current,
OFF-state
VI = VIH or VIL;
5.5
|VS| = VCC − GND;
see Fig.5
−
−
0.1
−
1.0
−
4.0
µA
analog switch
current,
ON-state
VI = VIH or VIL;
5.5
|VS| = VCC − GND;
see Fig.6
−
−
0.1
−
1.0
−
4.0
µA
ICC
quiescent
VI = VCC or GND; 5.5
supply current Vis = GND or VCC;
Vos = VCC or GND
−
−
1.0
−
10
−
40
µA
∆ICC
additional
VI = 3.4 V;
quiescent
other inputs at
supply current VCC or GND;
IO = 0
−
−
1.35
−
1.5
−
1.5
mA
CI
input
capacitance of
enable
input (E)
−
2
10
−
10
−
10
pF
CS
maximum
switch
capacitance
−
4
10
−
10
−
10
pF
2002 Jun 06
5.5
independent I/O
7
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
Type 74AHC1G66 and 74AHCT1G66
For 74AHC1G66: VCC = 2.0, 3.0, 4.5 and 5.5 V; or 74AHCT1G66: VCC = 4.5 and 5.5 V.
Tamb (°C)
SYMBOL
PARAMETER
TEST
CONDITIONS
−40 to +85
25
MIN.
TYP.
MAX.
MIN.
MAX.
−40 to +125
MIN.
UNIT
MAX.
VCC = 2.0 V; IS = 1 mA; VI = VIH or VIL; see Figs 7 and 8
RON
ON-resistance
(peak)
Vis = VCC to GND
−
148(1)
−
−
−
−
−
Ω
ON-resistance
(rail)
Vis = GND
−
30
−
−
−
−
−
Ω
Vis = VCC
−
28
−
−
−
−
−
Ω
50
−
70
−
110
Ω
VCC = 3.0 to 3.6 V; IS = 10 mA; VI = VIH or VIL; see Figs 7 and 8
RON
ON-resistance
(peak)
ON-resistance
(rail)
Vis = VCC to GND
−
28
Vis = GND
−
20
50
−
65
−
90
Ω
Vis = VCC
−
18
50
−
65
−
90
Ω
VCC = 4.5 to 5.5 V; IS = 10 mA; VI = VIH or VIL; see Figs 7 and 8
RON
ON-resistance
(peak)
Vis = VCC to GND
−
15
30
−
40
−
60
Ω
ON-resistance
(rail)
Vis = GND
−
15
22
−
26
−
40
Ω
Vis = VCC
−
13
22
−
26
−
40
Ω
Note
1. At supply voltage approaching 2 V, the analog switch ON-resistance becomes extremely non-linear. Therefore, it is
recommended that these devices are used to transmit digital signals only, when using this supply voltage.
2002 Jun 06
8
Philips Semiconductors
Product specification
Bilateral switch
handbook, full pagewidth
74AHC1G66; 74AHCT1G66
LOW
(from enable input)
Y
Z
A
A
VI = VCC or GND
VO = GND or VCC
GND
MNA079
Fig.5 Test circuit for measuring OFF-state current.
handbook, full pagewidth
HIGH
(from enable input)
Y
Z
A
A
VI = VCC or GND
VO (open circuit)
GND
MNA080
Fig.6 Test circuit for measuring ON-state current.
handbook, full pagewidth
HIGH
(from enable input)
V
Y
Z
Vis = 0 to VCC
Iis
GND
GND
MNA629
Fig.7 Test circuit for measuring ON-resistance (RON).
2002 Jun 06
9
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
MNA630
40
handbook, halfpage
RON
(Ω)
30
VCC = 3.0 V
20
4.5 V
5.5 V
10
0
0
Fig.8
2
4
Vis (V)
6
Typical ON-resistance as a function of input
voltage.
2002 Jun 06
10
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
AC CHARACTERISTICS
Type 74AHC1G66
GND = 0 V; tr = tf ≤ 3 ns.
Tamb (°C)
TEST CONDITIONS
SYMBOL
PARAMETER
WAVEFORMS
−40 to +85
25
CL
(pF)
−40 to +125
MIN.
TYP. MAX. MIN. MAX. MIN. MAX.
UNIT
VCC = 2.0 V; RL = 1 kΩ; note 1
tPHL/tPLH
propagation delay
Vis to Vos
see Figs 13 and 16 50
−
2.2
5.0
−
6.0
−
7.0
ns
tPZH/tPZL
turn-on time
E to Vos
see Figs 14 and 16 15
−
7.0
25.0
−
33.0
−
40.0
ns
50
−
11.0
35.0
−
46.0
−
57.0
ns
turn-off time
E to Vos
see Figs 14 and 16 15
−
9.0
25.0
−
33.0
−
40.0
ns
50
−
13.0
35.0
−
46.0
−
57.0
ns
tPHZ/tPLZ
VCC = 3.0 to 3.6 V; RL = 1 kΩ; note 1
tPHL/tPLH
propagation delay
Vis to Vos
see Figs 13 and 16 50
−
1.0
2.0
−
3.0
−
4.0
ns
tPZH/tPZL
turn-on time
E to Vos
see Figs 14 and 16 15
−
4.0
11.0
−
14.0
−
18.0
ns
50
−
5.8
15.0
−
20.0
−
25.0
ns
turn-off time
E to Vos
see Figs 14 and 16 15
−
6.0
11.0
−
14.0
−
18.0
ns
50
−
8.4
15.0
−
20.0
−
25.0
ns
−
0.6
1.0
−
2.0
−
3.0
ns
tPHZ/tPLZ
VCC = 4.5 to 5.5 V; RL = 1 kΩ; note 1
tPHL/tPLH
propagation delay
Vis to Vos
see Figs 13 and 16 50
tPZH/tPZL
turn-on time
E to Vos
see Figs 14 and 16 15
−
3.0
8.0
−
10.0
−
13.0
ns
50
−
4.4
11.0
−
13.0
−
17.0
ns
turn-off time
E to Vos
see Figs 14 and 16 15
−
5.0
8.0
−
10.0
−
13.0
ns
50
−
6.1
11.0
−
13.0
−
17.0
ns
tPHZ/tPLZ
Note
1. Typical values are measured at VCC = 2.0 V; VCC = 3.3 V or VCC = 5.0 V and Tamb = 25 °C.
2002 Jun 06
11
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
74AHCT1G66
GND = 0 V; tr = tf ≤ 3 ns.
TEST CONDITIONS
SYMBOL
PARAMETER
WAVEFORMS
Tamb (°C)
CL
(pF)
−40 to +85
25
−40 to +125
MIN.
TYP. MAX. MIN. MAX. MIN. MAX.
UNIT
VCC = 4.5 to 5.5 V; RL = 1 kΩ; note 1
tPHL/tPLH
propagation delay
Vis to Vos
see Figs 13 and 16 50
−
0.7
1.0
−
2.0
−
3.0
ns
tPZH/tPZL
turn-on time
E to Vos
see Figs 14 and 16 15
−
3.0
7.0
−
10.0
−
13.0
ns
50
−
4.7
10.0
−
13.0
−
17.0
ns
tPHZ/tPLZ
turn-off time
E to Vos
see Figs 14 and 16 15
−
5.0
8.0
−
10.0
−
13.0
ns
50
−
6.5
11.0
−
13.0
−
17.0
ns
Note
1. All typical values are measured at VCC = 5 V.
TYPE 74AHC1G66 AND 74AHCT1G66
Recommended conditions and typical values. GND = 0 V; tr = tf = 3 ns. Vis is the input voltage at pins Y or Z, whichever
is assigned as an input. Vos is the output voltage at pin Y or Z, whichever is assigned as an output.
SYMBOL
fmax
PARAMETER
TEST CONDITIONS
sine-wave distortion at
fin = 1 kHz
RL = 10 kΩ;
CL = 50 pF; see Fig.9
2.5
3.0 to 3.6
0.025
%
4.0
4.5 to 5.5
0.015
%
sine-wave distortion at
fin = 10 kHz
RL = 10 kΩ;
CL = 50 pF; see Fig.9
2.5
3.0 to 3.6
0.025
%
4.0
4.5 to 5.5
0.015
%
switch OFF signal
feed-through
RL = 600 Ω;
CL = 50 pF;
f = 1 MHz; see Fig.10
note 1
3.0 to 3.6
−50
dB
4.5 to 5.5
−50
dB
3.0 to 3.6
230
MHz
4.5 to 5.5
280
MHz
minimum frequency response RL = 50 Ω;
(−3 dB)
CL = 10 pF;
see Figs 11 and 12
Vis(p-p) (V)
note 2
VCC (V)
Notes
1. Adjust input voltage Vis is 0 dBm level (0 dBm = 1 mW into 600 Ω).
2. Adjust input voltage Vis is 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 Ω).
2002 Jun 06
12
TYPICAL
UNIT
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
VCC
handbook, full pagewidth
10 µF
Vis
fin = 1 kHz
sine-wave
RL
Y/Z
Z/Y
CL
RL
channel
ON
Vos
DISTORTION
METER
GND
MNA632
Fig.9 Test circuit for measuring sine-wave distortion.
VCC
handbook, full pagewidth
0.1 µF
Vis
RL
Y/Z
Z/Y
RL
Vos
CL dB
channel
OFF
GND
MNA633
Fig.10 Test circuit for measuring switch OFF signal feed-through.
2002 Jun 06
13
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
MNA643
handbook, full pagewidth
4
(dB)
2
0
−2
−4
104
105
106
107
108
Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; RSOURCE = 1 kΩ.
Fig.11 Typical frequency response.
VCC
handbook, full pagewidth
0.1 µF
Vis
sine-wave
RL
Y/Z
Z/Y
RL
Vos
CL dB
channel
ON
GND
MNA631
Adjust input voltage to obtain 0 dBm at Vos when f = 1 MHz.
After set-up, the frequency is increased to obtain a reading of −3 dB at Vos.
Fig.12 Test circuit for measuring minimum frequency response.
2002 Jun 06
14
f (Hz)
109
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
AC WAVEFORMS
handbook, halfpageVI
VM
Vis
GND
tPLH
tPHL
VOH
VM
Vos
VOL
VI INPUT
REQUIREMENTS
GND to VCC
MNA593
VM INPUT
50% VCC
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.13 The input (Vis) to output (Vos) propagation delays.
VI
handbook, full pagewidth
VM
E input
GND
tPLZ
output
LOW-to-OFF
OFF-to-LOW
tPZL
VCC
VM
VOL + 0.3 V
VOL
tPHZ
tPZH
VOH
VOH − 0.3 V
output
HIGH-to-OFF
OFF-to-HIGH
VM
GND
outputs
enabled
outputs
disabled
outputs
enabled
MNA634
TYPE
VI INPUT
REQUIREMENTS
VM INPUT
VM OUTPUT
AHC1G
GND to VCC
50% VCC
50% VCC
AHCT1G
GND to 3.0 V
1.5 V
1.5 V
Fig.14 The turn-on and turn-off times.
2002 Jun 06
15
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
tW
handbook, full pagewidth
amplitude
90%
negative
input pulse
VM
10%
0V
tTHL (tf)
tTLH (tr)
tTLH (tr)
tTHL (tf)
amplitude
90%
positive
input pulse
VM
10%
0V
tW
FAMILY
VI INPUT
REQUIREMENTS
MNA595
VM INPUT
AHC1G
GND to VCC
50% VCC
AHCT1G
GND to 3.0 V
1.5 V
tr = tf = 3 ns, when measuring fmax, there is no constraint on tr, tf with 50% duty factor.
Fig.15 Input pulse definitions.
S1
handbook, full pagewidth
VCC Vis
1 kΩ
VI
PULSE
GENERATOR
VO
D.U.T.
CL
RT
MNA635
TEST
S1
Vis
tPLH/tPHL
open
pulse
tPLZ/tPZL
VCC
GND
tPHZ/tPZH
GND
VCC
Definitions for test circuit:
CL = load capacitance including jig and probe capacitance (see “AC characteristics” for values).
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.16 Load circuitry for switching times.
2002 Jun 06
16
VCC
open
GND
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
PACKAGE OUTLINES
Plastic surface mounted package; 5 leads
SOT353
D
E
B
y
X
A
HE
5
v M A
4
Q
A
A1
1
2
e1
3
bp
c
Lp
w M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
c
D
E (2)
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.8
0.1
0.30
0.20
0.25
0.10
2.2
1.8
1.35
1.15
1.3
0.65
2.2
2.0
0.45
0.15
0.25
0.15
0.2
0.2
0.1
OUTLINE
VERSION
SOT353
2002 Jun 06
REFERENCES
IEC
JEDEC
EIAJ
SC-88A
17
EUROPEAN
PROJECTION
ISSUE DATE
97-02-28
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
Plastic surface mounted package; 5 leads
SOT753
D
E
B
y
A
X
HE
5
v M A
4
Q
A
A1
c
1
2
3
Lp
detail X
bp
e
w M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
c
D
E
e
HE
Lp
Q
v
w
y
mm
1.1
0.9
0.100
0.013
0.40
0.25
0.26
0.10
3.1
2.7
1.7
1.3
0.95
3.0
2.5
0.6
0.2
0.33
0.23
0.2
0.2
0.1
OUTLINE
VERSION
SOT753
2002 Jun 06
REFERENCES
IEC
JEDEC
JEITA
SC-74A
18
EUROPEAN
PROJECTION
ISSUE DATE
02-04-16
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
SOLDERING
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Wave soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
2002 Jun 06
19
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE(1)
WAVE
BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA
not suitable
suitable(3)
HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN,
HVSON, SMS
not
PLCC(4), SO, SOJ
suitable
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
REFLOW(2)
suitable
suitable
suitable
not
recommended(4)(5)
suitable
not
recommended(6)
suitable
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2002 Jun 06
20
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
DATA SHEET STATUS
DATA SHEET STATUS(1)
PRODUCT
STATUS(2)
DEFINITIONS
Objective data
Development
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data
Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DEFINITIONS
DISCLAIMERS
Short-form specification  The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Life support applications  These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2002 Jun 06
21
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
NOTES
2002 Jun 06
22
Philips Semiconductors
Product specification
Bilateral switch
74AHC1G66; 74AHCT1G66
NOTES
2002 Jun 06
23
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: [email protected]
SCA74
© Koninklijke Philips Electronics N.V. 2002
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613508/03/pp24
Date of release: 2002
Jun 06
Document order number:
9397 750 09711