INTEGRATED CIRCUITS DATA SHEET PCD5032 ADPCM CODEC for digital cordless telephones Product specification Supersedes data of August 1993 File under Integrated Circuits, IC17 1997 Apr 03 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones CONTENTS 1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 ORDERING INFORMATION 5 BLOCK DIAGRAM 6 PINNING 7 FUNCTIONAL DESCRIPTION 7.1 7.1.1 7.1.2 7.1.3 7.1.4 7.2 7.2.1 7.2.2 7.2.3 7.3 7.3.1 7.3.2 7.3.3 7.3.4 Digital interfaces ADPCM interface PCM interface I2C-bus interface Fast mute Analog parts and I2C-bus programming Input and output Sidetone Tone generator and ringer Modes of operation Standby mode Active mode Test loops Reset 8 HANDLING 9 LIMITING VALUES 10 DC AND AC CHARACTERISTICS 11 FILTER CHARACTERISTICS 12 APPLICATION INFORMATION 13 PACKAGE OUTLINES 14 SOLDERING 14.1 14.2 14.3 14.3.1 14.3.2 14.3.3 14.4 Introduction Reflow soldering Wave soldering QFP SO Method (QFP and SO) Repairing soldered joints 15 DEFINITIONS 16 LIFE SUPPORT APPLICATIONS 17 PURCHASE OF PHILIPS I2C COMPONENTS 1997 Apr 03 2 PCD5032 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones 1 PCD5032 2 FEATURES APPLICATIONS • G.721 compliant ADPCM encoding and decoding • Digital Enhanced Cordless Telephony (DECT) • ‘Bitstream’ analog-to-digital and digital-to-analog conversion • CT2 cordless • Speech compression. • On-chip receive and transmit filter • On-chip ringer and tone generator 3 • Programmable gain of receive and transmit path GENERAL DESCRIPTION The PCD5032 is a CMOS device designed for use in Digital Enhanced Cordless Telephone systems (DECT), but also suitable for other cordless telephony applications such as CT2. The PCD5032 performs analog-to-digital and digital-to-analog conversion, ADPCM encoding and decoding compliant to CCITT recommendation “G.721 (blue book, 1988)”. The PCD5032 contains on-chip microphone and earpiece amplifiers. The device can be used in both handset and base station designs. • Serial ADPCM interface with independent timing for maximum flexibility • Linear PCM data accessible for digital echo cancelling • Programmable via I2C-bus interface • Fast receiver mute input via pin • On-chip reference voltage • On-chip symmetrical supply for electret microphone • Few external components • Low power consumption in standby mode • Low supply voltage (single supply 2.7 V up to 5.5 V) • CMOS technology • Minimized EMC on digital outputs. 4 ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION PCD5032H QFP44 plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 × 14 × 2.2 mm SOT205-1 PCD5032T SO28 plastic small outline package; 28 leads; body width 7.5 mm SOT136-1 1997 Apr 03 3 1997 Apr 03 4 SCL SDA RFM TAD TAS DCLK RAD RAS CLK 11 12 44 37 39 36 42 41 34 RX mute A0 14 INTERFACE I 2 C - BUS loop ADPCM DECODER ADPCM DECODER 6 8 TPI 4 tone select SIDETONE NOISE SHAPER TONE GENERATOR DIGITAL FILTER DIGITAL FILTER 1 RESET PCD5032 30 TEST frequency/ volume level volume VOLUME CONTROL 26 VDD 28 VSS gain 1–BIT DAC tone RINGER 1–BIT DAC LOW PASS FILTER gain VOLTAGE AND CURRENT REFERENCE MEA786 31 33 17 15 23 25 19 22 20 BZ– BZ+ TM– TM+ RE– RE+ V REF− VGA V REF+ ADPCM CODEC for digital cordless telephones Fig.1 Block diagram (pin numbers are for QFP44 package). TX mute CLOCK AND SYNC 3 9 PO RPI andbook, full pagewidth RPE 5 TPE Philips Semiconductors Product specification PCD5032 BLOCK DIAGRAM Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones 6 PCD5032 PINNING PIN(1)(2) TYPE SYMBOL DESCRIPTION QFP44 SO28 RESET 1 4 I reset input; active HIGH n.c. 2 − − not connected RPE 3 5 O receiver PCM output enable (active LOW); direction from ADPCM interface to earpiece RPI 4 6 I receiver PCM input; direction from ADPCM interface to earpiece n.c. 5 − − not connected PO 6 7 O PCM data output n.c. 7 − − not connected TPI 8 8 I transmitter PCM input; direction from microphone to ADPCM interface TPE 9 9 O transmitter PCM output enable (active LOW); direction from microphone to ADPCM interface n.c. 10 − − not connected SCL 11 10 I serial clock input; I2C-bus SDA 12 11 I serial data input; I2C-bus n.c. 13 − − not connected A0 14 12 I address select input; I2C-bus TM+ 15 13 I transmitter audio positive input (microphone) n.c. 16 − − not connected TM− 17 14 I transmitter audio negative input (microphone) n.c. 18 − − not connected VREF− 19 15 O negative reference voltage output; internally generated, intended for electret microphone supply VREF+ 20 16 O positive reference voltage output; internally generated, intended for electret microphone supply n.c. 21 − − not connected VGA 22 17 O analog signal ground output RE− 23 18 O receiver audio negative output (earpiece) n.c. 24 − − not connected RE+ 25 19 O receiver audio positive output (earpiece) VDD 26 20 P positive supply voltage (2.7 V to 5.5 V) n.c. 27 − − not connected VSS 28 21 P negative supply voltage (0 V) n.c. 29 − − not connected TEST 30 22 I test mode input; to be connected to VSS in normal application BZ− 31 23 O ringer negative output n.c. 32 − − not connected BZ+ 33 24 O ringer positive output CLK 34 25 I clock input n.c. 35 − − not connected 1997 Apr 03 5 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones PCD5032 PIN(1)(2) TYPE SYMBOL DESCRIPTION QFP44 SO28 DCLK 36 26 I data clock input (ADPCM) TAD 37 27 O transmitter ADPCM data output; direction from microphone to ADPCM interface n.c. 38 − − not connected TAS 39 28 I transmitter ADPCM sync input; direction from microphone to ADPCM interface n.c. 40 − − not connected RAS 41 1 I receiver ADPCM sync input; direction from ADPCM interface to earpiece RAD 42 2 I receiver ADPCM data input; direction from ADPCM interface to earpiece n.c. 43 − − not connected RFM 44 3 I receiver fast mute input; direction from ADPCM interface to earpiece Notes 1. QFP44 package: Pins 1, 3, 4, 6, 8, 9, 11, 12, 14, 30, 34, 36, 37, 39, 41, 42 and 44 are digital pins. Pins 15, 17, 23, 25, 31 and 33 are analog pins. Pins 19, 20, 22, 26, and 28 are general pins. 2. SO28 package: Pins 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 22, 25, 26, 27 and 28 are digital pins. Pins 13, 14, 18, 19, 23 and 24 are analog pins. Pins 15, 16, 17, 20 and 21 are general pins. 1997 Apr 03 6 Philips Semiconductors Product specification DCLK n.c. CLK 35 34 37 TAD 36 n.c. 38 n.c. PCD5032 39 TAS RAD 42 40 n.c. 43 41 RAS RFM handbook, full pagewidth 44 ADPCM CODEC for digital cordless telephones RESET 1 33 BZ+ n.c 2 32 n.c. RPE 3 31 BZ– RPI 4 30 TEST n.c. 5 29 n.c. PO 6 n.c. 7 27 n.c. TPI 8 26 V DD TPE 9 25 RE+ n.c. 10 24 n.c. SCL 11 23 RE– 28 V SS 19 20 21 22 VREF+ n.c. VGA 18 MEA787 VREF– 16 n.c. n.c. 15 TM+ 17 14 A0 TM– 13 n.c. SDA 12 PCD5032H Fig.2 Pin configuration QFP44 (SOT205-1). handbook, halfpage RAS 1 28 TAS RAD 2 27 TAD RFM 3 26 DCLK RESET 4 25 CLK RPE 5 24 BZ+ RPI 6 23 BZ− PO 7 22 TEST PCD5032T TPI 8 21 VSS TPE 9 20 VDD SCL 10 19 RE+ SDA 11 18 RE− A0 12 17 VGA TM+ 13 16 VREF+ TM− 14 15 VREF− MGK070 Fig.3 Pin configuration SO28 (SOT136-1). 1997 Apr 03 7 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones 7 PCD5032 For the receive direction the PCM data is output on pin PO and read from pin RPI. For the transmit direction the PCM data is output on pin PO and read from pin TPI. To enable bus structures to be used in base stations the PCM output PO is in high-impedance state when not active. Inputs TPI and RPI have internal pull-down. FUNCTIONAL DESCRIPTION 7.1 Digital interfaces 7.1.1 ADPCM INTERFACE The ADPCM receive and transmit data pins, RAD and TAD, carry 4-bit words of serial data. The received and transmitted data are controlled separately by the synchronization pins RAS and TAS. In a typical handset application, pin PO is directly connected to RPI and TPI. If additional data processing is required (echo cancellation in a base station, for example), a data processing unit may be placed between PO and RPI or between PO and TPI. On detection of a HIGH level on RAS (with a rising edge on DCLK), the receiver will read 4 ADPCM bits on the next 4 HIGH-to-LOW transitions of DCLK. Likewise, on reception of a HIGH level on TAS, the transmitter will output 4 ADPCM bits on the next 4 LOW-to-HIGH transitions of DCLK. Figure 4 is the ADPCM timing diagram. During the time that the ADPCM data output (TAD) is not activated, it will be in a high-impedance state, enabling a bus structure to be used in a multi-line base station. Input RAD has an internal pull-down resistor. The data format is serial, 2’s complement, MSB first. PO outputs 16 bits (14 data bits followed by 2 zeroes). TPI and RPI read 14 data bits. The bit frequency is 3456 kHz (CLK). Data output PO changes on the falling edge of CLK (see Figs. 5 and 6). For interfacing to digital signal processors, signals TPE and RPE (both active LOW) mark the position of the transmit and receive PCM data on pin PO (see Fig.7). TPE and RPE change on the rising edge of CLK. The minimum frequency on the DCLK input is 1⁄54fCLK. The maximum value equals the clock frequency, and any value in between may be chosen. The RAS signal controls the start of each conversion in a frame at an 8 kHz rate. The master clock ‘CLK’ must be locked to the frequency of ‘RAS’, with a ratio fCLK = 432 × fRAS. 7.1.2 Outputs RPE and TPE have low impedance only from half a CLK cycle after the active state. The rest of the time they are in high impedance state. Thus a wired-OR configuration can be made when only one DSP serial input port is used for reading both transmit and receive data. An external pull-up is required. PCM INTERFACE To enable additional data processing in a base station both transmit and receive linear PCM data paths are accessible. handbook, DCLK full pagewidth RAS/TAS RAD/TAD 01 MSB 02 03 04 MGK073 LSB Fig.4 ADPCM timing. 1997 Apr 03 8 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones PCD5032 handbook, full pagewidth CLK RPE/TPE PO 01 02 03 04 05 06 07 08 09 10 11 12 13 MSB 14 15 16 LSB RPE/TPE low impedance MGK075 Fig.5 PCM output timing. handbook, full pagewidth CLK RPE/TPE PO 01 02 03 04 05 06 07 08 09 10 11 12 MSB 13 14 LSB RPI/TPI low impedance MGK076 Fig.6 PCM input timing. handbook, full pagewidth RAS TPE RPE PO 16 BITS 16 BITS TX RX 14 BITS TPI 14 BITS RPI 163 CLK CYCLES 81 CLK CYCLES Fig.7 PCM timing. 1997 Apr 03 9 188 CLK CYCLES MGK074 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones PCD5032 With the address select pin A0 it is possible to have two independently programmed PCD5032 CODECs in a base station (two outside lines). If more CODECs are used in a base station then the address pin can be used as a select signal. Detailed description of the I2C-bus specification is given in the brochure “The I2C-bus and how to use it”. This may be ordered using the code 9398 393 40011. I2C-BUS INTERFACE 7.1.3 The mode of operation and transmitter/receiver gain is programmed through the I2C-bus serial interface. The I2C-bus address of the device is shown in Fig.8. Each function can be accessed by writing one 8-bit word to the ADPCM CODEC. For this reason the 8-bit word is divided into two fields: handbook, halfpage 0 0 1 1 0 0 A0 0 • bit 7, bit 6: function (WRITE ONLY) • bit 5 to bit 0: value/setting. MGK071 Table 1 gives an overview of the I2C-bus programming options. Fig.8 I2C-bus address. Table 1 Overview of I2C-bus programming options FUNCTION BIT 7 BIT 6 BIT 5 BIT 4 − BIT 3 BIT 2 BIT 1 BIT 0 Operation mode 0 0 − Receiver control 0 1 RV2 RV1 RV0 RG2 RG1 RG0 Transmitter control 1 0 ST1 ST0 MUTE TG2 TG1 TG0 Ringer 1 1 BF2 BF1 BF0 BV2 BV1 BV0 Table 1 definitions: TONE PON T1 T0 blanked, so that the ADPCM decoder output signal goes to zero. To ensure immediate silence on the analog outputs RE+ and RE−, the linear PCM input data of the receive filter is set to zero as well. • TONE: ‘tone/ringer’ section for tone generator output; tones can be sent to ringer or receiver DAC • PON: power-on (active) • RG2 to RG0: receiver gain If the mute signal is switched off again, then the ADPCM decoder output settles gradually from the zero to the appropriate PCM signal level. No audible clicks will occur. • TG2 to TG0: transmitter gain The sidetone level is not affected by the mute function. • T1 and T0: test loops • RV2 to RV0: receiver volume • BV2 to BV0: tone volume 7.2 • BF2 to BF0: tone frequency 7.2.1 • ST1 to ST0: sidetone level. FAST MUTE The microphone and earpiece amplifiers have the possibility of gain control via the I2C-bus interface. Further the sending and receiving direction can be muted separately. Analog gain control for the receive path can be set in steps of 1 dB. Digital volume control can be set in 6 dB steps. Table 2 gives an overview of the gain control options. The RFM (Receiver Fast Mute) pin enables fast muting of the received signal if erroneous data is present on the ADPCM interface. Muting is done in the same way as the receiver mute via the I2C-bus. The input data of the ADPCM decoder is 1997 Apr 03 INPUT AND OUTPUT The analog input pins TM+ and TM− can be connected directly to a microphone. For electret microphones capacitive coupling is required (see Chapter 12, Fig.13). The earpiece must be a low-ohmic device (>100 Ω differential). Programming the ADPCM CODEC is possible in active mode as well as in standby mode. A reset clears all I2C-bus registers. 7.1.4 Analog parts and I2C-bus programming 10 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones Table 2 PCD5032 Overview of gain control options FUNCTION I2C-CODE GAIN Receiver 01XXX101 gain (relative) 01XXX110 −3 dB 01XXX111 −1 dB 01XXX000 0 dB Receiver volume Table 3 NOTE Sidetone level options FUNCTION Sidetone I2C-CODE 01XXX001 +1 dB 01XXX010 +2 dB 01XXX011 +3 dB 01XXX100 +4 dB 01000XXX 0 dB 01001XXX −6 dB 01010XXX Table 4 No local sidetone 1001XXXX Level = −12 dB 1010XXXX Level = −18 dB 1011XXXX Level = −24 dB Tone output frequency/volume options FUNCTION Volume (relative) I2C-CODE OPTION Signal off default −29 dB sinewave −12 dB 11XXX010 −23 dB sinewave 01011XXX −18 dB 11XXX011 −17 dB sinewave 01100XXX −24 dB 11XXX100 −11 dB sinewave 01101XXX −30 dB 11XXX101 −5 dB sinewave 01110XXX −36 dB 11XXX110 −0 dB sinewave RX MUTE 11XXX111 +4 dB squarewave 11000XXX 400 Hz −3 dB −2 dB 11001XXX 421 Hz 10XXX111 −1 dB 11010XXX 444 Hz 10XXX000 0 dB 11011XXX 800 Hz 10XXX001 +1 dB 11100XXX 1000 Hz 10XXX010 +2 dB 11101XXX 1067 Hz 10XXX011 +3 dB 11110XXX 1333 Hz 10XXX100 +4 dB 11111XXX 2000 Hz 10XX1XXX TX MUTE Frequency default default OFF The ringer output (BZ) is differential and is intended for low-ohmic devices. If the ringer is switched off then both outputs are low. The output signal is a pulse density modulated block wave (on a 32 kHz basic pulse rate) to generate a sinewave-like output signal, see Fig.9. Volume is controlled by changing the pulse width of each pulse. In the square wave mode a full square wave is generated and results in the maximum volume. The volume settings (in dB) are given for the first harmonic signal component. SIDETONE With the I2C-bus interface the (local) sidetone level can be set to −12, −18, −24 dB, or switched off. See Table 3. The sidetone level is independent of the receiver volume control setting. 7.2.3 TONE GENERATOR AND RINGER The PCD5032 contains a programmable tone generator which can be used for generating ringer tones (BZ+, BZ−) or local information tones in the receive path (RE+, RE−). By setting the TONE bit (bit 3) in the operation mode register, the tone output will be directed to the receiver DAC, otherwise the tones will be sent to the ringer output stage. Table 4 shows the possible frequency and volume settings. 1997 Apr 03 NOTE 11XXX001 default Transmitter 10XXX101 gain (relative) 10XXX110 7.2.2 default 11XXX000 01111XXX Transmitter mute NOTE 1000XXXX −2 dB default OPTION 11 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones 7.3 PCD5032 7.3.3 Modes of operation The ADPCM CODEC has a ‘Standby mode’, an ‘Active mode’ and three operating modes: ‘Normal mode’ and two loop modes. Table 5 gives details of setting the various modes via the I2C-bus. 7.3.1 Both test loops can be used for test or evaluation purposes. Loop 1 is intended for testing the audio path and A/D, D/A converters, the ADPCM transcoder is not addressed in this mode. The ADPCM data is directly looped back towards the radio interface. STANDBY MODE After a reset the ADPCM CODEC will by default be in standby mode. All I2C-bus settings will be cleared. Standby mode can also be explicitly set using the code shown in Table 5. The PCM data is looped from transmit filter output to receive filter input. Loop 2 is intended for testing the audio path including ADPCM encoding and decoding. In standby mode all circuits are switched off, except for the I2C-bus interface. Before going to standby mode the PCD5032 performs a reset of the ADPCM transcoder, digital filters and auxiliary logic functions. The I2C-bus interface registers are not cleared. 7.3.2 7.3.4 RESET After an external reset pulse the circuit will perform an internal reset procedure. The reset pulse must be active for at least 10 CLK cycles. 125 µs (the duration of 1 cycle at 8 kHz) after RESET has gone LOW, the internal reset is completed and the PCD5032 goes into standby mode. At that moment the ADPCM CODEC is ready to be programmed. ACTIVE MODE Active mode is set using the code shown in Table 5. Once active mode has been set, the ADPCM CODEC is by default in normal mode, but can explicitly be set to one of the two test loops or back to normal mode using the codes shown in Table 5. Table 5 TEST LOOPS A reset clears all I2C-bus registers and resets the ADPCM transcoder, digital filters and auxiliary logic functions. Modes of operation FUNCTION I2C-CODE DESCRIPTION Standby mode 00XXX0XX Power-down Active mode 00XXX1XX Active Normal mode 00XXXX00 Normal operation Loop 1 00XXXX01 Loopback on ADPCM side and on PCM side without using ADPCM transcoder Loop 2 00XXXX10 Loopback on TM+/TM− through ADPCM transcoder handbook, full pagewidth 0 NOTE default after reset default after active mode set 0 1 0 1 0 1 1 1 1 0 1 0 1 0 0 0 0 −1 0 −1 0 −1 −1 −1 −1 0 −1 0 −1 0 0 +VDD 0 −VDD MGK072 Fig.9 Tone output example. 1997 Apr 03 12 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones 8 PCD5032 HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, it is good practice to take normal precautions appropriate to handling MOS devices. Details of recommended precautions are given in “Handling MOS devices”, which is published in the General Information section of several of Philips data handbooks. 9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. MAX. UNIT VDD supply voltage −0.5 +6.5 V IDD supply current −150 +150 mA VI all input voltages −0.5 VDD + 0.5 V II DC input current BZ+, BZ− −150 +150 mA RE+, RE− −50 +50 mA all other pins −10 +10 mA BZ+, BZ− −150 +150 mA RE+, RE− −50 +50 mA all other pins −10 +10 mA IO DC output current Ptot total power dissipation − 500 mW Tstg storage temperature −65 +150 °C Tamb operating ambient temperature −25 +70 °C 1997 Apr 03 13 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones PCD5032 10 DC AND AC CHARACTERISTICS VDD = 2.7 to 5.5 V; VSS = 0 V; CLK = 3456 kHz; Tamb = −25 to +70 °C; all voltages with respect to VSS; unless otherwise specified. Specifications valid in active mode, except standby supply current. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT General VDD operating supply voltage 2.7 − 5.5 V IDD operating supply current no load; Tamb = 25°C; note 1 − 7 14 mA Istb standby supply current Tamb = 25°C; note 1 − 20 100 µA VSS ≤ VI ≤ VDD µA −1 − +1 0.48VDD 0.5VDD 0.52VDD V note 2 0.8 1.0 1.2 V negative reference voltage note 2 −0.8 −1.0 −1.2 V VIL LOW level input voltage note 3 0 − 0.3VDD V VIH HIGH level input voltage note 3 0.7VDD − VDD V VOL LOW level output voltage note 3 − − 0.4 V VOH HIGH level output voltage note 3 VDD −o.4 − VDD V Rpd(int) internal pull-down resistance note 3 − 150 − kΩ ILI input leakage current VGA analog signal ground voltage VREF+ positive reference voltage VREF− Digital I/O fDCLK DCLK frequency note 4 1⁄ − fCLK kHz fRAS, fTAS RAS, TAS frequency note 4 − 8 − kHz 54fCLK = 64 I2C-bus timing fSCL SCL clock frequency − − 100 kHz tSW tolerable pulse spike width − − 50 ns tBUF bus free time 4.7 − − µs tSU;STA set-up time repeated START 4.7 − − µs tHD;STA hold time START condition 4.0 − − µs tLOW SCL LOW time 4.7 − − µs tHIGH SCL HIGH time 4.0 − − µs tr rise time SDA and SCL − − 1.0 µs tf fall time SDA and SCL − − 0.3 µs tSU;DAT data set-up time 250 − − ns tHD;DAT data hold time 0 − − ns tSU;STO set-up time STOP condition 4.0 − − µs Analog inputs; note 5 Zi(TM+) input impedance, TM+ note 6 − 125 − kΩ Zi(TM−) input impedance, TM− note 6 − 125 − kΩ Vi nominal input level RMS value; note 7 − 12 − mV Vi(max) maximum input signal RMS value; note 8 − 56 − mV Gv(min) minimum voltage gain −4 −3 −2 dB Gv(max) maximum voltage gain +3 +4 +5 dB 1997 Apr 03 14 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones SYMBOL PARAMETER Gv(step) voltage gain, step size THDTX total harmonic distortion (transmitted) PCD5032 CONDITIONS MIN. TYP. MAX. UNIT − 1 − dB note 9 − − −40 dB − 10 − Ω Receiver audio output Zo output impedance note 6 Vo(rms) output signal level (RMS value) 0 dBm0; note 10 − 550 − mV 3.14 dBm0; note 11 − 1250 − mV −3 −2 dB Gv(min) minimum voltage gain −4 Gv(max) maximum voltage gain +3 +4 +5 dB Gv(step) voltage gain, step size − 1 − dB Gvol volume control range −36 − 0 dB Gvol(step) volume step size − 6.0 − dB THDRX total harmonic distortion (received) − − −40 dB note 12 Ringer output; notes 5 and 13 Zo output impedance − 14 29 Ω Gvol volume control range −29 − +4 dB Notes 1. All outputs left open. IDD measured with all inputs connected to VSS, except: CLK and DCLK connected to 3.456 MHz; RAS and TAS connected to 8 kHz. Istb measured with all inputs connected to VSS, except: TM+, TM− left open. 2. The reference voltage is available on VREF+ and VREF− and is measured with respect to VGA. The voltage outputs are intended for electret microphone supply and can deliver 400 µA. 3. Digital inputs and outputs are CMOS-levels compatible. The outputs and inputs can sink or source 1 mA. Pull-down resistors are present at pins RPI, TPI, TEST, RAD. 4. Any frequency between min. and max. is allowed for DCLK. The signals CLK and RAS/TAS must be frequency-locked and will have a ratio of fCLK/fRAS = 432 5. All analog input/output voltages are measured differentially. The circuit is designed for use with an electret microphone. 6. Frequency band is 300 Hz to 3400 Hz. Maximum load capacitance = 100 pF differentially, or 200 pF each pin. 7. Nominal signal level gives −10 dBm0 on the PCM interface (G.711/G.712). Value given for TX gain setting 0 dB. 8. Nominal signal level gives 3.14 dBm0 on the PCM interface, with larger input signals the digital output will be saturated. Value given for TX gain setting 0 dB. 9. Transmitter gain setting = 0 dB and input signal level = 40 mV (RMS) (will generate 0 dBm0 on PCM interface according to G.711). 10. PCM signal level is 0 dBm0 and RX gain setting 0 dB. With a load of 300 Ω between RE+ and RE− the signal level results in an output power of 1 mW. The maximum output current is 10 mA. 11. PCM signal level is +3.14 dBm0 and RX gain setting +4 dB. The maximum output current is 10 mA. 12. PCM signal level is 0 dBm0 (G.711). 13. For maximum output power the load resistance should equal the typical output impedance (specified at ILOAD −20 mA). The absolute maximum value of output power given in Chapter 9 defines the minimum load resistance. 1997 Apr 03 15 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones PCD5032 11 FILTER CHARACTERISTICS VDD = 2.7 to 5.5 V; VSS = 0 V; Tamb = −25 to +70 °C. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Transmitter RPB − − 0.5 dB f = 50 Hz −35 − −2 dB f = 3400 Hz −35 − −2 dB f = 4600 Hz −35 − −2 dB f = 8000 Hz −60 − −2 dB Fig.10; notes 1 and 2 35 − − dB Fig.10; notes 1 and 2 35 − − dB passband ripple (300 to 3000 Hz) frequency response Analog-to-Digital converter S/N signal-to-noise ratio Digital-to-Analog converter S/N signal-to-noise ratio Group delay td(TX) transmitter note 3 − − 400 µs td(RX) receiver note 3 − − 525 µs td(g) group delay distortion (Loop 1) Fig.11 tbf tbf tbf µs Notes 1. Frequency band is 300 Hz to 3400 Hz. Maximum load capacitance = 100 pF differentially, or 200 pF each pin. 2. Measured with psophometric filter (CCITT G.223). Only fulfilled at VDD noise level less than 40 mV (peak value) (0 to 20 kHz). Measured on sample basis at VDD = 3.0 V,Tamb = 25 °C, compliant with G.712. Signal level is −40 dBm0 on PCM interface; 0.4 mV (RMS) on analog input. Gain setting is 0 dB. 3. Group delay includes ADPCM/PCM conversion; signal frequency = 1.5 kHz. Value given is for RAS/TAS signals asserted simultaneously. handbook, halfpage S/(N + THD) 80 ms handbook,1.75 halfpage 70 td(g) 60 1.5 ms 1.25 ms 50 1.0 ms 40 750.0 µs 33 30 27 22 20 500.0 µs CCITT G.712 250.0 µs G.712 0.0 10 300 600 1000 500 0 −70 −60 −50 −40 −30 −20 −10 0 +10 input level (dBm0) 1500 frequency (Hz) 2600 2800 MGK077 MGK078 Fig.10 Typical performance of AD and DA in cascade. 1997 Apr 03 3400 Fig.11 Group delay distortion: Transmit and Receive (loop measurement). 16 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones PCD5032 12 APPLICATION INFORMATION 13824 kHz crystal handbook, full pagewidth 1.9 GHz control sync data RECEIVER earpiece RSSl DCLK BURST MODE CONTROLLER (PCD5040) control TRANSMITTER ADPCM CODEC (PCD5032) data microphone CLK ringer data 3 RF SECTION modulator out 2 microcontroller bus MICROCONTROLLER VCO output I2C bus SYNTHESIZER LCD DISPLAY KEYBOARD f REF MEA788 Fig.12 Typical block diagram for a DECT handset. 1997 Apr 03 17 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones PCD5032 handbook, full pagewidth TPE CLK RAS RAD burst mode controller DCLK TAS TAD RFM 9 RPE 3 TPI 8 RPI PO 4 6 33 34 BZ+ 41 buzzer 42 31 BZ– 36 39 25 RE+ 37 loudspeaker 44 23 PCD5032 20 15 RE– 100 Ω V REF+ 100 nF TM+ 1 kΩ 47 µF TM– microphone 17 100 nF SDA microcontroller 19 12 SCL RESET 11 22 1 26 28 VDD 100 nF 30 V SS 100 Ω VREF– VGA 100 nF 1kΩ 100 nF 14 TEST A0 47 µF 47 µF 2.7 to 5.5 V MEA789 Fig.13 Typical handset application diagram for the PCD5032 in QFP44 package. 1997 Apr 03 18 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones PCD5032 13 PACKAGE OUTLINES QFP44: plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 x 14 x 2.2 mm SOT205-1 c y X 33 A 23 34 22 ZE e Q E HE A A2 (A 3) A1 wM θ bp Lp pin 1 index 44 L 12 detail X 1 11 ZD e v M A wM bp D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp Q v w y mm 2.60 0.25 0.05 2.3 2.1 0.25 0.50 0.35 0.25 0.14 14.1 13.9 14.1 13.9 1 19.2 18.2 19.2 18.2 2.35 2.0 1.2 1.2 0.9 0.3 0.15 0.1 Z D (1) Z E (1) 2.4 1.8 2.4 1.8 θ Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC SOT205-1 133E01A 1997 Apr 03 JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-02-04 19 o 7 0o Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones PCD5032 SO28: plastic small outline package; 28 leads; body width 7.5 mm SOT136-1 D E A X c y HE v M A Z 15 28 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 14 e bp 0 detail X w M 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 18.1 17.7 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.71 0.69 0.30 0.29 0.050 0.42 0.39 0.055 0.043 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT136-1 075E06 MS-013AE 1997 Apr 03 EIAJ EUROPEAN PROJECTION ISSUE DATE 91-08-13 95-01-24 20 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones PCD5032 If wave soldering cannot be avoided, the following conditions must be observed: 14 SOLDERING 14.1 Introduction • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • The footprint must be at an angle of 45° to the board direction and must incorporate solder thieves downstream and at the side corners. Even with these conditions, do not consider wave soldering the following packages: QFP52 (SOT379-1), QFP100 (SOT317-1), QFP100 (SOT317-2), QFP100 (SOT382-1) or QFP160 (SOT322-1). This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). 14.2 14.3.2 Reflow soldering Wave soldering techniques can be used for all SO packages if the following conditions are observed: Reflow soldering techniques are suitable for all QFP and SO packages. • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. The choice of heating method may be influenced by larger plastic QFP packages (44 leads, or more). If infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. For more information, refer to the Drypack chapter in our “Quality Reference Manual” (order code 9397 750 00192). • The longitudinal axis of the package footprint must be parallel to the solder flow. • The package footprint must incorporate solder thieves at the downstream end. 14.3.3 Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. 14.3.1 A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.4 Wave soldering Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. QFP Wave soldering is not recommended for QFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. 1997 Apr 03 METHOD (QFP AND SO) During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. 14.3 SO 21 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones PCD5032 15 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. 16 LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 17 PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 1997 Apr 03 22 Philips Semiconductors Product specification ADPCM CODEC for digital cordless telephones PCD5032 NOTES 1997 Apr 03 23 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. 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No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com © Philips Electronics N.V. 1997 SCA54 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 437027/1200/02/pp24 Date of release: 1997 Apr 03 Document order number: 9397 750 01525