INTEGRATED CIRCUITS 74LVT16652A 3.3V LVT 16-bit bus transceiver/ register (3-State) Product specification Supersedes data of 1994 IC23 Data Handbook 1998 Feb 19 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) FEATURES 74LVT16652A DESCRIPTION • 16-bit bus interface • 3-State buffers • Output capability: +64mA/-32mA • TTL input and output switching levels • Input and output interface capability to systems at 5V supply • Bus-hold data inputs eliminate the need for external pull-up The 74LVT16652A is a high-performance BiCMOS product designed for VCC operation at 3.3V. The device can be used as two 8-bit transceivers or one 16-bit transceiver. Complimentary output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A Low-input level selects real-time data, and a High input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. resistors to hold unused inputs • Live insertion/extraction permitted • Power-up reset • Power-up 3-State • No bus current loading when output is tied to 5V bus • Latch-up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 Data on the A or B bus, or both, can be stored in the internal flip-flops by Low-to-High transitions at the appropriate clock (CPAB or CPBA) inputs regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last level configuration. and 200V per Machine Model QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C PARAMETER tPLH tPHL Propagation delay nAx to nBx or nBx to nAx CL = 50pF; VCC = 3.3V TYPICAL UNIT 1.9 ns pF CIN Input capacitance Control pins VI = 0V or 3.0V 3 CI/O I/O pin capacitance Outputs disabled; VI = 0V or 3.0V 9 pF ICCZ Total supply current Outputs disabled; VCC = 3.6V 70 µA ORDERING INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 56-Pin Plastic SSOP Type III PACKAGES –40°C to +85°C 74LVT16652A DL VT16652A DL SOT371-1 56-Pin Plastic TSSOP Type II –40°C to +85°C 74LVT16652A DGG VT16652A DGG SOT364-1 LOGIC SYMBOL (IEEE/IEC) 56 1 55 54 2 3 5 EN1(BA) EN2(AB) C3 G4 C5 G6 1 1 5D 6 1 6 4 3D 4 1 52 29 28 30 31 27 26 EN7(BA) EN8(AB) C9 G10 C11 G12 15 1 10 9D 7 10 1 1 11D 12 1 2 1 12 6 51 16 8 49 17 9 48 19 10 47 20 12 45 21 13 44 23 14 43 24 42 8 41 40 38 37 36 34 33 SW00158 1998 Feb 19 2 853-1767 18986 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) PIN CONFIGURATION 74LVT16652A LOGIC SYMBOL 1OEAB 1 56 1OEBA 1CPAB 2 55 1CPBA 1SAB 3 54 1SBA GND 4 53 GND 1A0 5 52 1B0 1A1 6 51 1B1 VCC 7 50 VCC 2 1CPAB 1A2 8 49 1B2 3 1SAB 1OEAB 1 1A3 9 48 1B3 54 1SBA 1OEBA 56 1A4 10 47 1B4 55 1CPBA GND 11 46 GND 1A5 12 45 1B5 1A6 13 44 1B6 1A7 14 43 1B7 2A0 15 42 2B0 5 6 8 9 10 12 13 14 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1AB 1B1 1B2 1B3 1B4 1B5 1B6 1B7 52 51 49 48 47 45 44 43 15 16 17 19 20 21 23 24 2A1 16 41 2B1 2A2 17 40 2B2 2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 GND 18 39 GND 27 2CPAB 2A3 19 38 2B3 26 2SAB 2OEAB 28 2A4 20 37 2B4 31 2SBA 2OEBA 29 30 2CPBA 2A5 21 36 2B5 VCC 22 35 VCC 2A6 23 34 2B6 2A7 24 33 2B7 2AB 2B1 2B2 2B3 2B4 2B5 2B6 2B7 42 GND 25 32 GND 2SAB 26 31 2SBA 2CPAB 27 30 2CPBA 20EAB 28 29 2OEBA 41 40 38 37 36 34 33 SH00046 SW00159 PIN DESCRIPTION PIN NUMBER SYMBOL 2, 55, 27, 30 1CPAB, 1CPBA, 2CPAB, 2CPBA Clock input A to B / Clock input B to A 3, 54, 26, 31 1SAB, 1SBA, 2SAB, 2SBA Select input A to B / Select input B to A 5, 6, 8, 9, 10, 12, 13, 14 15, 16, 17, 19, 20, 21, 23, 24 1A0 – 1A7, 2A0 – 2A7 Data inputs/outputs (A side) 52, 51, 49, 48, 47, 45, 44, 43 42, 41, 40, 38, 37, 36, 34, 33 1B0 – 1B7, 2B0 – 2B7 Data inputs/outputs (B side) 1, 56, 28, 29 1OEAB, 1OEBA, 2OEAB, 2OEBA 4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V) 7, 22, 35, 50 VCC Positive supply voltage 1998 Feb 19 NAME AND FUNCTION Output enable inputs 3 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A LOGIC DIAGRAM nOEBA nOEAB nCPBA nSBA nCPAB nSAB 1of 8 Channels 1D C1 Q nA0 nB0 1D C1 Q nA1 nB1 nA2 nB2 nA3 nB3 nA4 nB4 DETAIL A X 7 nA5 nB5 nA6 nB6 nA7 nB7 SH00065 FUNCTION TABLE INPUTS H L X ↑ * ** DATA I/O OPERATING MODE nOEAB nOEBA nCPAB nCPBA nSAB nSBA nAx nBx L L H H H or L ↑ H or L ↑ X X X X Input Input Isolation Store A and B data X H H H ↑ ↑ H or L ↑ X ** X X Input Unspecified output* Store A, Hold B Store A in both registers L L X L H or L ↑ ↑ ↑ X X X ** Unspecified output* Input Hold A, Store B Store B in both registers L L L L X X X H or L X X L H Output Input Real time B data to A bus Stored B data to A bus H H H H X H or L X X L H X X Input Output Real time A data to B bus Store A data to B bus H L H or L H or L H H Output Output Stored A data to B bus Stored B data to A bus = = = = High voltage level Low voltage level Don’t care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the nOEBA and nOEAB inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock. If both Select controls (nSAB and nSBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be staggered in order to load both registers. 1998 Feb 19 4 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) transferred through the device in real time. The output enable pins determine the direction of the data flow. The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74LVT16652A. The select pins determine whether data is stored or REAL TIME BUS TRANSFER BUS B TO BUS A A B REAL TIME BUS TRANSFER BUS A TO BUS B A STORAGE FROM A, B, OR A AND B B A B } } } nOEAB nOEBA nCPAB nCPBA nSAB nSBA L L X X X L 74LVT16652A nOEAB nOEBA nCPAB nCPBA nSAB nSBA H H X X L X nOEAB nOEBA nCPAB nCPBA nSAB nSBA X H ↑ X X X L L X H X ↑ ↑ ↑ X X X X TRANSFER STORED DATA TO A OR B A B } nOEAB nOEBA nCPAB nCPBA nSAB nSBA H L H|L H|L H H SH00066 1998 Feb 19 5 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC IIK CONDITIONS RATING UNIT –0.5 to +4.6 V –50 mA –0.5 to +7.0 V VO < 0 –50 mA Output in Off or High state –0.5 to +7.0 V Output in Low state 128 Output in High state –64 DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT O DC output current Tstg Storage temperature range mA –65 to +150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER UNIT DC supply voltage MIN MAX 2.7 3.6 V 0 5.5 V VI Input voltage VIH High-level input voltage VIL Input voltage 0.8 V IOH High-level output current –32 mA Low-level output current 32 Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz 64 ∆t/∆v Input transition rise or fall rate; Outputs enabled 10 ns/V Tamb Operating free-air temperature range +85 °C IOL O 1998 Feb 19 2.0 mA –40 6 V Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIK Input clamp voltage VCC = 2.7V; IIK = –18mA VCC = 2.7 to 3.6V; IOH = –100µA VOH VOL VRST High-level output voltage Low-level output voltage Power-up output low voltage5 Output off current IHOLD Bus H B Hold ld currentt A or B outputs7 2.4 2.5 VCC = 3.0V; IOH = –32mA 2.0 2.3 0.07 0.2 VCC = 2.7V; IOL = 24mA 0.3 0.5 VCC = 3.0V; IOL = 16mA 0.25 0.4 VCC = 3.0V; IOL = 32mA 0.3 0.5 VCC = 3.0V; IOL = 64mA 0.4 0.55 VCC = 3.6V; IO = 1mA; VI = GND or VCC 0.11 0.55 0.1 ±1 0.1 10 0.1 20 0.1 10 Control pins VCC = 3.6V; VI = 5.5V I/O Data pins4 VCC = 3.6V; VI = 0 0.1 -5 VCC = 0V; VI or VO = 0 to 4.5V 0.1 ±100 IPU/PD VCC = 3V; VI = 2.0V –75 –140 VCC = 0V to 3.6V; VCC = 3.6V ±500 V V µA µA µA VO = 5.5V; VCC = 3.0V 45 125 µA Power up/down 3-State output current3 VCC ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don’t care 35 ±100 µA 0.07 0.12 4.9 6 0.07 0.12 0.1 0.2 VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 Quiescent supply current ICCZ ∆ICC 135 V Current into an output in the High state when VO > VCC ICCH ICCL 75 UNIT V VCC = 2.7V; IOL = 100µA VCC = 3V; VI = 0.8V IEX –1.2 VCC = 2.7V; IOH = –8mA VCC = 3.6V; VI = VCC IOFF –0.85 VCC VCC = 0 or 3.6V; VI = 5.5V Input leakage current MAX VCC-0.2 VCC = 3.6V; VI = VCC or GND II TYP1 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = Additional supply current per input pin2 VCC = 3V to 3.6V; One input at VCC-0.6V, Other inputs at VCC or GND 06 mA mA NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ± 0.3V a transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C only. 4. Unused pins at VCC or GND. 5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 6. ICCZ is measured with outputs pulled to VCC or GND. 7. This is the bus hold overdrive current required to force the input to the opposite logic state. 1998 Feb 19 7 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER VCC = 3.3V ± 0.3V WAVEFORM MIN TYP1 VCC = 2.7V MAX UNIT MAX fMAX Maximum clock frequency 1 150 180 MHz tPLH tPHL Propagation delay nAx to nBx or nBx to nAx 2 0.5 0.5 1.9 1.9 3.7 3.7 4.0 4.0 ns tPLH tPHL Propagation delay nCPAB to nBx or nCPBA to nAx 1 1.5 1.5 2.7 2.4 4.5 4.5 4.9 4.9 ns tPLH tPHL Propagation delay nSAB to nBx or nSBA to nAx 3 1.0 1.0 2.3 2.8 4.8 4.8 5.4 5.4 ns tPZH tPZL Output enable time nOEBA to nAx 5 6 1.0 1.0 2.7 2.5 4.6 4.6 5.0 5.0 ns tPHZ tPLZ Output disable time nOEBA to nAx 5 6 1.5 1.5 3.9 2.9 4.9 4.9 4.8 4.6 ns tPZH tPZL Output enable time nOEAB to nBx 5 6 1.0 1.0 2.9 2.7 4.6 4.6 5.0 5.0 ns tPHZ tPLZ Output disable time nOEAB to nBx 5 6 1.5 1.5 3.1 2.8 4.9 4.9 5.2 4.6 ns VCC = 2.7V UNIT NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. AC SETUP REQUIREMENTS GND = 0V, tR = 2.5ns, tF = 2.5ns, CL = 50pF, RL = 500Ω, Tamb = –40 °C to +85 °C LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V MIN TYP MIN ts(H) ts(L) Setup time 1 nAx to nCPAB, nBx to nCPBA 4 1.0 1.9 0.6 0.5 1.1 2.4 ns th(H) th(L) Hold time 1 nAx to nCPAB, nBx to nCPBA 4 1.0 1.0 0.4 0.5 1.0 1.0 ns 1 2.6 2.8 2.2 2.4 2.6 2.8 ns tw(H) Pulse width, High or Low tw(L) nCPAB or nCPBA NOTE: 1. This data sheet limit may vary among suppliers. AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V 1/fMAX nCPBA or nCPAB VM 3.0V or VCC whichever is less VM 3.0V or VCC nAx or nBx VM tPLH tw(L) tPHL VM tPHL VOH tPLH nBx or nAx VOH nAx or nBx VM 0V 0V tw(H) VM VM VM VM VOL VOL SH00030 SH00048 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency 1998 Feb 19 Waveform 2. Propagation Delay, nAx to nBx or nBx to nAx 8 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 3.0V or VCC whichever is less 3.0V or VCC nSBA or nSAB VM 74LVT16652A nOEBA VM VM VM nOEAB 0V 0V tPHL tPZH tPHZ tPLH VOH VOH nAx or nBx VM VY VM VM nAx or nBx 0V VOL SH00050 SH00032 Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level Waveform 3. Propagation Delay, SBA to nAx or SAB to nBx nAx or nBx ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ VM VM VM 3.0V or VCC VM VM ts(L) th(H) nCPBA or nCPAB VM nOEAB 0V tPZL 0V ts(H) 3.0V or VCC nOEBA tPLZ th(L) nAx or nBx 3.0V or VCC VM VM VX VOL VM tW(L) 3.0V or VCC 0V 0V SH00051 NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level SH00049 Waveform 4. Data Setup and Hold Times TEST CIRCUIT AND WAVEFORMS 6V VCC OPEN VIN VOUT PULSE GENERATOR tW 90% RL GND 10% 10% 0V tTHL (tF) CL tTLH (tR) tTLH (tR) RL tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs SWITCH tPHZ/tPZH GND tPLZ/tPZL 6V tPLH/tPHL open VM VM 10% tW 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. AMP (V) 90% 10% SWITCH POSITION TEST AMP (V) VM VM NEGATIVE PULSE D.U.T. RT 90% 74LVT16 Amplitude Rep. Rate tW tR 2.7V ≤10MHz 500ns ≤2.5ns tF ≤2.5ns RT = Termination resistance should be equal to ZOUT of pulse generators. SW00003 1998 Feb 19 9 Philips Semiconductors Low Voltage Products Product specification 3.3V LVT 16-bit bus transceiver and registers (3-State) SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm 1998 Feb 19 10 74LVT16652A SOT371-1 Philips Semiconductors Low Voltage Products Product specification 3.3V LVT 16-bit bus transceiver and registers (3-State) TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm 1998 Feb 19 11 74LVT16652A SOT364-1 Philips Semiconductors Product specification 3.3V LVT 16-bit bus transceiver and registers (3-State) 74LVT16652A Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 12 Date of release: 05-96 9397-750-03561