PHILIPS PHM21NQ15T

PHM21NQ15T
TrenchMOS™ standard level FET
Rev. 02 — 11 September 2003
Product data
M3D879
1. Product profile
1.1 Description
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™ technology.
1.2 Features
■ SOT96 (SO8) footprint compatible
■ Surface mounted package
■ Low thermal resistance
■ Low profile.
1.3 Applications
■ DC-to-DC primary side
■ Portable equipment applications.
1.4 Quick reference data
■ VDS ≤ 150 V
■ Ptot ≤ 62.5 W
■ ID ≤ 22.2 A
■ RDSon ≤ 55 mΩ
2. Pinning information
Table 1:
Pin
Pinning - SOT685-1 (QLPAK), simplified outline and symbol
Description
1,2,3
source (s)
4
gate (g)
5,6,7,8
drain (d)
mb
mounting base
connected to drain
Simplified outline
Symbol
[1]
1
mb
g
MBB076
8
Bottom view
5
MBL585
SOT685-1(QLPAK)
[1]
Shaded area indicates pin 1 identifier.
d
4
s
PHM21NQ15T
Philips Semiconductors
TrenchMOS™ standard level FET
3. Ordering information
Table 2:
Ordering information
Type number
PHM21NQ15T
Package
Name
Description
Version
QLPAK
Plastic surface mounted package; no leads; 8 terminals
SOT685
4. Limiting values
Table 3:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage (DC)
25 °C ≤ Tj ≤ 150 °C
-
150
V
VDGR
drain-gate voltage (DC)
25 °C ≤ Tj ≤ 150 °C; RGS = 20 kΩ
-
150
V
VGS
gate-source voltage (DC)
-
±20
V
ID
drain current (DC)
Tmb = 25 °C; VGS = 10 V; Figure 2 and 3
-
22.2
A
Tmb = 100 °C; VGS = 10 V; Figure 2
-
14
A
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3
-
60
A
Ptot
total power dissipation
Tmb = 25 °C; Figure 1
-
62.5
W
Tstg
storage temperature
−55
+150
°C
Tj
junction temperature
−55
+150
°C
Source-drain diode
IS
source (diode forward) current (DC) Tmb = 25 °C
-
22.2
A
ISM
peak source (diode forward) current Tmb = 25 °C; pulsed; tp ≤ 10 µs
-
60
A
-
250
mJ
-
2.5
mJ
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy
unclamped inductive load; ID = 12 A;
tp = 0.21 ms; VDD ≤ 150 V; RGS = 50 Ω;
VGS = 10 V; starting Tj = 25 °C
EDS(AL)R repetitive drain-source avalanche
energy
unclamped inductive load;
ID = 1.2 A; tp = 0.021 ms; VDD ≤ 100 V;
RGS = 50 Ω; VGS = 10 V
[1]
[2]
[1]
[2]
Duty cycle limited by maximum junction temperature.
Repetitive avalanche failure is not determined simply by thermal effects. Repetitive avalanche transients should only be applied for short
bursts, not every switching cycle.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 11844
Product data
Rev. 02 — 11 September 2003
2 of 13
PHM21NQ15T
Philips Semiconductors
TrenchMOS™ standard level FET
03aa15
120
03aa23
120
Ider
(%)
Pder
(%)
80
80
40
40
0
0
0
50
100
150
200
Tmb (°C)
P tot
P der = ----------------------- × 100%
P
°
0
50
100
150
200
Tmb (°C)
ID
I der = ------------------- × 100%
I
°
tot ( 25 C )
D ( 25 C )
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
03al06
102
Limit RDSon = VDS / ID
tp = 10 µ s
ID
(A)
100 µ s
10
1 ms
DC
10 ms
1
10-1
1
102
10
VDS (V)
103
Tmb = 25 °C; IDM is single pulse; VGS = 10 V
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 11844
Product data
Rev. 02 — 11 September 2003
3 of 13
PHM21NQ15T
Philips Semiconductors
TrenchMOS™ standard level FET
5. Thermal characteristics
Table 4:
Thermal characteristics
Symbol Parameter
Conditions
Min Typ Max Unit
thermal resistance from junction to mounting base Figure 4
Rth(j-mb)
-
-
2
K/W
5.1 Transient thermal impedance
03al05
10
Zth(j-mb)
(K/W)
1
δ = 0.5
0.2
0.1
10-1
0.05
0.02
δ=
P
10-2
tp
T
single pulse
t
tp
T
10-3
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 11844
Product data
Rev. 02 — 11 September 2003
4 of 13
PHM21NQ15T
Philips Semiconductors
TrenchMOS™ standard level FET
6. Characteristics
Table 5:
Characteristics
Tj = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tj = 25 °C
150
-
-
V
Tj = −55 °C
134
-
-
V
Tj = 25 °C
2
3
4
V
Tj = 150 °C
1.2
-
-
V
Tj = −55 °C
-
-
4.4
V
-
-
1
µA
Static characteristics
V(BR)DSS drain-source breakdown voltage
VGS(th)
IDSS
gate-source threshold voltage
drain-source leakage current
ID = 250 µA; VGS = 0 V
ID = 1 mA; VDS = VGS; Figure 9
VDS = 120 V; VGS = 0 V
Tj = 25 °C
Tj = 150 °C
IGSS
gate-source leakage current
VGS = ±20 V; VDS = 0 V
RDSon
drain-source on-state resistance
VGS = 10 V; ID = 15 A; Figure 7 and 8
Tj = 25 °C
Tj = 150 °C
-
-
100
µA
-
10
100
nA
-
40
55
mΩ
-
92
127
mΩ
VGS = 5 V; ID = 3 A; Figure 7 and 8
-
42
-
mΩ
ID = 20 A; VDD = 75 V; VGS = 10 V; Figure 13
-
36.2
-
nC
Dynamic characteristics
Qg(tot)
total gate charge
Qgs
gate-source charge
-
8
-
nC
Qgd
gate-drain (Miller) charge
-
11.6
-
nC
Ciss
input capacitance
-
2080 -
pF
Coss
output capacitance
-
285
pF
Crss
reverse transfer capacitance
td(on)
turn-on delay time
tr
VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 11
-
-
90
-
pF
-
16
-
ns
rise time
-
12
-
ns
td(off)
turn-off delay time
-
50
-
ns
tf
fall time
-
38
-
ns
-
0.83
1.2
V
-
150
-
ns
-
215
-
nC
VDD = 75 V; RL = 75 Ω; VGS = 10 V; RG = 5.6 Ω
Source-drain diode
VSD
source-drain (diode forward) voltage IS = 10 A; VGS = 0 V; Figure 12
trr
reverse recovery time
Qr
recovered charge
IS = 10 A; dIS/dt = −100 A/µs; VGS = 0 V
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 11844
Product data
Rev. 02 — 11 September 2003
5 of 13
PHM21NQ15T
Philips Semiconductors
TrenchMOS™ standard level FET
03al07
60
Tj = 25 °C
03al09
60
10 V 6 V
VDS > ID x RDSon
ID
(A)
5V
4.9 V
40
ID
(A)
40
4.7 V
4.5 V
4.3 V
20
20
4.1 V
3.9 V
150 °C
VGS = 3.7 V
0
Tj = 25 °C
0
0
1
2
3
4
5
VDS (V)
Tj = 25 °C
2
4
VGS (V)
6
Tj = 25 °C and 150 °C; VDS > ID × RDSon
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values.
03al08
80
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
03al51
2.5
Tj = 25 °C
RDSon
0
a
VGS = 4.7 V 4.9 V 5 V
(mΩ)
6V
2
60
10 V
1.5
40
1
20
0.5
0
0
0
20
40
ID (A)
60
Tj = 25 °C
-60
60
120
Tj (°C)
180
R DSon
a = ---------------------------R DSon ( 25 °C )
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values.
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 11844
Product data
0
Rev. 02 — 11 September 2003
6 of 13
PHM21NQ15T
Philips Semiconductors
TrenchMOS™ standard level FET
03aa32
5
ID
(A)
VGS(th)
(V)
4
max
10-2
3
typ
10-3
2
min
10-4
1
10-5
0
10-6
-60
03aa35
10-1
0
60
120
Tj (°C)
180
min
0
2
typ
max
4
VGS (V)
6
Tj = 25 °C
ID = 1 mA; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of
junction temperature.
Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
03al11
104
C
(pF)
Ciss
103
Coss
102
10
10-1
Crss
1
10
2
VDS (V) 10
VGS = 0 V; f = 1 MHz
Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 11844
Product data
Rev. 02 — 11 September 2003
7 of 13
PHM21NQ15T
Philips Semiconductors
TrenchMOS™ standard level FET
03al10
60
03al12
10
ID = 20 A
VGS
(V)
8
VGS = 0 V
IS
(A)
Tj = 25 °C
75 V
VDD = 30 V
40
120 V
6
4
20
150 °C
Tj = 25 °C
2
0
0
0
0.5
1
VSD (V)
1.5
Tj = 25 °C and 150 °C; VGS = 0 V
0
20
30
QG (nC)
40
ID = 20 A; VDD = 30 V, 75 V, 120 V
Fig 12. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values.
Fig 13. Gate-source voltage as a function of gate
charge; typical values.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 11844
Product data
10
Rev. 02 — 11 September 2003
8 of 13
PHM21NQ15T
Philips Semiconductors
TrenchMOS™ standard level FET
7. Package outline
HVSON8: plastic thermal enhanced very thin small outline package; no leads;
8 terminals; body 6 x 5 x 0.85 mm
SOT685-1
0
2.5
X
5 mm
scale
A
B
D
A
A1
c
E
detail X
terminal 1
index area
C
e1
terminal 1
index area
b
e
1
y
y1 C
v M C A B
w M C
4
L
Eh
exposed tie bar (4×)
eh
8
5
Dh
DIMENSIONS (mm are the original dimensions)
UNIT
A (1)
max.
A1
b
c
D (1)
Dh
E (1)
Eh
e
e1
eh
L
v
w
y
y1
mm
1
0.05
0.00
0.5
0.3
0.2
5.15
4.85
3.95
3.65
6.15
5.85
3.65
3.35
1.27
3.81
0.35
0.75
0.50
0.1
0.05
0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
SOT685-1
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
02-08-12
02-11-27
---
Fig 14. SOT685-1 (QLPAK).
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 11844
Product data
Rev. 02 — 11 September 2003
9 of 13
PHM21NQ15T
Philips Semiconductors
TrenchMOS™ standard level FET
8. Soldering
Cu covered
with solder resist
handbook, full pagewidth
solder lands
solder resist
0.075
clearance
0.150
6.00
solder paste
5.90
0.050
4.60
placement area
3.85
0.50 (8×)
occupied area
0.75 (8×)
3.45
2.025
2.175 2.35
2.50
6.40
7.25 7.00
1.905
1.40
1.525
2.30
0.40
0.15
MGX371
1.27
0.05 SP around (4×)
0.60 (4×)
0.40
0.85 (4×)
2.60
5.40
6.25
Dimensions in mm.
Fig 15. Reflow soldering footprint for SOT685-1 (QLPAK).
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 11844
Product data
Rev. 02 — 11 September 2003
10 of 13
PHM21NQ15T
Philips Semiconductors
TrenchMOS™ standard level FET
9. Revision history
Table 6:
Revision history
Rev Date
02
20030911
CPCN
Description
-
Product data (9397 750 11844)
Modifications:
•
•
•
•
01
20030130
-
Section 3 “Ordering information” Addition of ordering information.
Section 4 “Limiting values” Addition of EDS(AL)S.
Section 4 “Limiting values” Addition of EDS(AL)R.
Section 8 “Soldering” Addition of soldering footprint.
Preliminary data (9397 750 10882); initial version.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 11844
Product data
Rev. 02 — 11 September 2003
11 of 13
PHM21NQ15T
Philips Semiconductors
TrenchMOS™ standard level FET
10. Data sheet status
Level
Data sheet status[1]
Product status[2][3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
[2]
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
11. Definitions
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
13. Trademarks
TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V.
12. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
Contact information
For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: [email protected].
Product data
Fax: +31 40 27 24825
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 11844
Rev. 02 — 11 September 2003
12 of 13
Philips Semiconductors
PHM21NQ15T
TrenchMOS™ standard level FET
Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
5.1
6
7
8
9
10
11
12
13
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Transient thermal impedance . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 12
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
© Koninklijke Philips Electronics N.V. 2003.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 11 September 2003
Document order number: 9397 750 11844