INTEGRATED CIRCUITS 74ALVCH16646 16-bit bus transceiver/register (3-State) Product specification IC24 Data Handbook 1998 Sep 03 Philips Semiconductors Product specification 16-bit bus transceiver/register (3-State) 74ALVCH16646 minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. FEATURES • Complies with JEDEC standard no. 8-1A • CMOS low power consumption • MULTIBYTETM flow-through pin-out architecture • Low inductance, multiple VCC and ground pins for minimum noise Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. PIN CONFIGURATION and ground bounce • Direct interface with TTL levels • Current drive ± 24 mA at 3.0 V • Output drive capability 50Ω transmission lines @ 85°C • All inputs have bushold circuitry 1DIR 1 1CPAB 2 1SAB 3 55 1CPBA 54 1SBA GND 4 53 GND 1A0 5 52 1B0 1A1 6 51 1B1 VCC 7 50 VCC 1A2 8 49 1B2 1A3 9 48 1B3 1A4 10 47 1B4 GND 11 46 GND 1A5 12 45 1B5 1A6 13 1A7 14 44 1B6 43 1B7 2A0 15 42 2B0 2A1 16 41 2B1 2A2 17 40 2B2 GND 18 39 GND 2A3 19 38 2B3 2A4 20 37 2B4 2A5 21 36 2B5 VCC 22 2A6 23 35 VCC 34 2B6 DESCRIPTION The 74ALVCH16646 consists of 16 non-inverting bus transceiver circuits with 3-State outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the internal registers. Data on the ‘A’ or ‘B’ bus will be clocked in the internal registers, as the appropriate clock (CPAB or CPBA) goes to a HIGH logic level. Output enable (OE) and direction (DIR) inputs are provided to control the transceiver function. In the transceiver mode, data present at the high-impedance port may be stored in either the ‘A’ or ‘B’ register, or in both. The select source inputs (SAB and SBA) can multiplex stored and real-time (transparent mode) data. The direction (DIR) input determines which bus will receive data when OE is active (LOW). In the isolation mode (OE = HIGH), ‘A’ data may be stored in the ‘B’ register and/or ‘B’ data may be stored in the ‘A’ register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, ‘A’ or ‘B’ may be driven at a time. 56 1OE 2A7 24 33 2B7 GND 25 32 GND 2SAB 26 31 2SBA 2CPAB 27 2DIR 28 To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the 30 2CPBA 29 2OE SY00011 QUICK REFERENCE DATA GND = 0V; Tamb = 25°C; tr = tf ≤ 2.5ns PARAMETER SYMBOL CONDITIONS tPHL/tPLH Propagation delay nAx to nBx CI Input capacitance CPD Power dissipation capacitance per channel VI = GND to VCC1 Fmax Maximum clock frequency VCC = 2.5V, CL = 30pF VCC = 3.3V, CL = 50pF TYPICAL UNIT 2.6 2.7 ns 3.0 pF VCC = 2.5V, CL = 30pF VCC = 3.3V, CL = 50pF Outputs enabled 36 Outputs disabled 4 300 320 pF MHz NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of outputs. ORDERING INFORMATION PACKAGES 56-Pin Plastic TSSOP Type II 1998 Sep 03 TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER –40°C to +85°C 74ALVCH16646 DGG ACH16646 DGG SOT364-1 2 853-2116 19959 Philips Semiconductors Product specification 16-bit bus transceiver/register (3-State) PIN DESCRIPTION 74ALVCH16646 BUSHOLD CIRCUIT PIN NUMBER SYMBOL 1, 28 nDIR NAME AND FUNCTION 2, 27 nCPAB Clock input A-to-B 3, 26 nSAB Select input A-to-B 5, 6, 8, 9, 10, 12, 13, 14 1A0 to 1A7 Data inputs/outputs 4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V) 7, 22, 35, 50 VCC Positive supply voltage 15, 16, 17, 19, 20, 21, 23, 24 2A0 to 2A7 29, 56 nOE 30, 55 nCPBA Clock input B-to-A 31, 54 nSBA Select input B-to-A 42, 41, 40, 38, 37, 36, 34, 33 2B0 to 2B7 Data inputs/outputs VCC 52, 51, 49, 48, 47, 45, 44, 43 Direction control input Data Input Data inputs/outputs Output enable 1B0 to 1B7 SW00050 LOGIC SYMBOL (IEEE/IEC) 1A0 1A1 1A2 1A3 1A4 1A5 13 1A6 14 1A7 56 1OE 1 1DIR 2 1SAB 54 1SBA 2 1CPAB 55 1CPBA 1B0 1B1 52 51 1B2 49 1B3 48 1B4 47 1B5 45 1B6 44 1B7 43 1OE 56 1DIR 1 3EN1[BA] 1CPBA 55 3EN2[AB] C4 1SBA 54 G5 Data inputs/outputs 15 2A0 16 2A1 17 2A2 19 2A3 20 2A4 21 2A5 23 2A6 24 2A7 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7 G3 1CPAB 2 1SAB 3 G7 42 2OE 29 G10 41 40 38 2DIR 28 10EN8[BA] 2CPBA 30 10EN9[AB] C11 2SBA 31 G12 2CPAB 27 2SAB 26 LOGIC SYMBOL 5 6 8 9 10 12 To internal circuit 37 36 34 33 29 2OE 28 2DIR 26 2SAB 1A0 5 C6 C13 G14 31 5 5 1 6D 7 4D 52 1B0 1 31 2 31 2SBA 27 2CPAB 1A1 6 1A2 8 51 49 1B1 30 2CPBA 1A3 9 48 1B3 1A4 1A5 10 12 47 45 1B4 1B5 1A6 13 44 1B6 1A7 14 43 1B7 42 2B0 1 7 SY00013 2A0 15 1 8 12 11D 12 1 13D 14 1 9 1 14 1B2 2A1 16 41 2B1 2A2 17 40 2B2 2A3 19 38 2B3 2A4 20 37 2B4 2A5 21 36 2B5 2A6 23 34 2B6 2A7 24 33 2B7 SY00014 1998 Sep 03 3 Philips Semiconductors Product specification 16-bit bus transceiver/register (3-State) 74ALVCH16646 LOGIC DIAGRAM (one section) OE DIR SBA CPBA SAB CPAB VCC S Y D1 MUX An D2 Q D FFn CP VCC S D1 Y MUX D Q Bn D2 FFn CP 8 IDENTICAL CHANNELS SY00012 FUNCTION TABLE INPUTS nOE nDIR nCPAB nCPBA DATA I/O * nSAB nSBA nAx nBx FUNCTION X X X X ↑ X X ↑ X X X X input un* un* input store A, B unspecified* store B, A unspecified* H H X X ↑ H or L ↑ H or L X X X X input input store A and B data, isolation hold storage L L L L X X X H or L X X L H output input real-time B data to A bus stored B data to A bus L L * un H L X ↑ H X X L X real-time A data to B bus input output H H or L X H X stored A data to B bus The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled, i.e., data at the bus inputs will be stored on every LOW-to-HIGH transition on the clock inputs. = unspecified = HIGH voltage level = LOW voltage level = don’t care = LOW-to-HIGH level transition 1998 Sep 03 4 Philips Semiconductors Product specification 16-bit bus transceiver/register (3-State) 74ALVCH16646 RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER CONDITIONS UNIT MIN MAX DC supply voltage 2.5V range (for max. speed performance @ 30 pF output load) 2.3 2.7 DC supply voltage 3.3V range (for max. speed performance @ 50 pF output load) 3.0 3.6 V VI DC Input voltage range 0 VCC V VO DC output voltage range 0 VCC V –40 +85 °C 0 0 20 10 ns/V Tamb Operating free-air temperature range tr, tf Input rise and fall times VCC = 2.3 to 3.0V VCC = 3.0 to 3.6V ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) SYMBOL VCC IIK PARAMETER CONDITIONS DC supply voltage DC input diode current VI t0 For control pins1 VI DC in input ut voltage IOK DC output diode current VO uVCC or VO t 0 VO DC output voltage Note 1 IO DC output source or sink current VO = 0 to VCC IGND, ICC Tstg PTOT For data inputs1 DC VCC or GND current Storage temperature range Power dissipation per package –plastic thin-medium-shrink (TSSOP) For temperature range: –40 to +125 °C above +55°C derate linearly with 11.3 mW/K above +55°C derate linearly with 8 mW/K NOTE: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Sep 03 5 RATING UNIT –0.5 to +4.6 V –50 mA –0.5 to +4.6 –0.5 to VCC +0.5 V "50 mA –0.5 to VCC +0.5 V "50 mA "100 mA –65 to +150 °C 850 600 mW Philips Semiconductors Product specification 16-bit bus transceiver/register (3-State) 74ALVCH16646 DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER VIH HIGH level Input voltage VIL LOW level Input voltage VOH O HIGH level output voltage TEST CONDITIONS Temp = -40°C to +85°C MIN TYP1 VCC = 2.3 to 2.7V 1.7 1.2 VCC = 2.7 to 3.6V 2.0 1.5 UNIT MAX V VCC = 2.3 to 2.7V 1.2 0.7 VCC = 2.7 to 3.6V 1.5 0.8 V 3 to 3 6V; VI = VIH or VIL; IO = –100µA 100µA VCC = 2 2.3 3.6V; 02 VCC*0.2 VCC VCC = 2.3V; VI = VIH or VIL; IO = –6mA VCC*0.3 VCC*0.08 VCC = 2.3V; VI = VIH or VIL; IO = –12mA VCC*0.6 VCC*0.26 VCC = 2.7V; VI = VIH or VIL; IO = –12mA VCC*0.5 VCC*0.14 VCC = 3.0V; VI = VIH or VIL; IO = –12mA VCC*0.6 VCC*0.09 VCC = 3.0V; VI = VIH or VIL; IO = –24mA VCC*1.0 VCC*0.28 V VCC = 2 2.3 3 to 3 3.6V; 6V; VI = VIH or VIL; IO = 100µA GND 0 20 0.20 V VCC = 2.3V; VI = VIH or VIL; IO = 6mA 0.07 0.40 V VCC = 2.3V; VI = VIH or VIL; IO = 12mA 0.15 0.70 VCC = 2.7V; VI = VIH or VIL; IO = 12mA 0.14 0.40 VCC = 3.0V; VI = VIH or VIL; IO = 24mA 0.27 0.55 Input leakage g current VCC = 2 2.3 3 to 3 3.6V; 6V; VI = VCC or GND 0.1 5 µA µ IOZ 3-State output OFF-state current VCC = 2.7 to 3.6V; VI = VIH or VIL; VO = VCC or GND 0.1 10 µA ICC Quiescent supply current VCC = 2.3 to 3.6V; VI = VCC or GND; IO = 0 0.2 40 µA ∆ICC Additional quiescent supply current VCC = 2.3V to 3.6V; VI = VCC – 0.6V; IO = 0 150 750 µA IBHL Bus hold LOW sustaining current IBHH Bus hold HIGH sustaining current IBHLO Bus hold LOW overdrive current VCC = 3.6V2 500 µA IBHHO Bus hold HIGH overdrive current VCC = 3.6V2 –500 µA VOL II LOW level output voltage VCC = 2.3V; VI = 0.7V2 45 – 0.8V2 75 150 VCC = 2.3V; VI = 1.7V2 –45 2.0V2 –75 VCC = 3.0V; VI = VCC = 3.0V; VI = NOTES: 1. All typical values are at Tamb = 25°C. 2. Valid for data inputs of bus hold parts. 1998 Sep 03 6 –175 V µA µA Philips Semiconductors Product specification 16-bit bus transceiver/register (3-State) 74ALVCH16646 AC CHARACTERISTICS FOR VCC = 2.3V TO 2.7V RANGE GND = 0V; tr = tf ≤ 2.0ns; CL = 30pF LIMITS SYMBOL PARAMETER VCC = 2.5V ± 0.2V WAVEFORM UNIT MIN TYP MAX Propagation delay nAx to nBx, nBx to nAx 1 1.0 2.7 4.8 Propagation delay nCPAB to nBx, nCPBA to nAx 3 1.0 3.4 5.6 Propagation delay nSAB to nBx, nSBA to nAx 2 1.0 3.4 6.8 tPZH/tPZL 3-State output enable time nOE to nAx, nBx 4 1.0 3.3 6.5 ns tPHZ/tPLZ 3-State output disable time nOE to nAx, nBx 4 1.6 2.8 5.7 ns tPZH/tPZL 3-State output enable time nDIR to nAx, nBx 5 1.0 3.4 7.8 ns tPHZ/tPLZ 3-State output disable time nDIR to nAx, nBx 5 1.5 3.0 6.5 ns tW Pulse width HIGH or LOW nCPAB, nCPBA 3 3.3 1.2 ns tSU Set up time nAx to nCPAB, nBx to nCPBA 3 1.6 0.2 ns Hold time nAx to nCPAB, nBx to nCPBA 3 0.6 0.1 ns 3 150 300 MHz tPLH/tPHL th Fmax Maximum clock pulse frequency NOTE: 1. All typical values are at VCC = 2.5V and Tamb = 25°C. ns AC CHARACTERISTICS FOR VCC = 3.0V TO 3.6V RANGE AND VCC = 2.7V GND = 0V; tr = tf = 2.5ns; CL = 50pF LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3V ± 0.3V VCC = 2.7V MIN TYP1, 2 MAX MIN TYP1 MAX UNIT tPHL/tPLH Propagation delay nAx to nBx, nBx to nAx 1 1.0 2.6 3.9 1.0 2.8 4.5 ns tPHL/tPLH Propagation delay nCPAB to nBx, nCPBA to nAx 3 1.4 2.9 4.5 1.4 3.1 5.2 ns tPHL/tPLH Propagation delay nSAB to nBx, nSBA to nAx 2 1.3 3.1 5.3 1.3 3.5 6.4 ns tPZH/tPZL 3-State output enable time nOE to nAx, nBx 4 1.0 2.3 5.1 1.0 3.2 6.2 ns tPHZ/tPLZ 3-State output disable time nOE to nAx, nBx 4 1.0 2.9 4.7 1.0 3.1 5.0 ns tPZH/tPZL 3-State output enable time nDIR to nAx, nBx 5 1.4 3.0 5.1 1.4 3.4 6.2 ns tPHZ/tPLZ 3-State output disable time nDIR to nAx, nBx 5 1.4 2.5 5.3 1.4 3.3 6.0 ns tW Pulse width HIGH or LOW nCPAB, nCPBA 3 3.3 0.7 3.3 1.0 ns tSU Set up time nAx to nCPAB, nBx to nCPBA 3 1.4 0.3 1.7 0.2 ns Hold time nAx to nCPAB, nBx to nCPBA 3 0.7 0.2 0.4 0.1 ns 3 150 320 150 320 MHz th Fmax Maximum clock pulse frequency NOTES: 1. All typical values are at Tamb = 25°C. 2. VCC = 3.3V 1998 Sep 03 7 Philips Semiconductors Product specification 16-bit bus transceiver/register (3-State) ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ AC WAVEFORMS VCC = 2.3 TO 2.7 V RANGE 1. VM = 0.5 V 2. VX = VOL + 0.15V 3. VY = VOH – 0.15V 4. VI = VCC 5. VOL and VOH are the typical output voltage drop that occur with the output load. VCC = 3.0 TO 3.6 V RANGE AND VCC = 2.7 V 1. VM = 1.5 V 2. VX = VOL + 0.3V 3. VY = VOH – 0.3V 4. VI = 2.7 V 5. VOL and VOH are the typical output voltage drop that occur with the output load. 1/fMAX nCPBA or nCPAB VM 74ALVCH16646 nAx or nBx VM ts(H) nCPBA or nCPAB VM ts(L) th(H) 0V SH00033 Waveform 4. Data Setup and Hold Times 3.0V or VCC whichever is less nOE, nDIR VM tw(L) VM 0V nDIR tPLH tPZH VOH VM 3.0V or VCC VM NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM tPHL 0V th(L) VM 0V nAx or nBx VM 3.0V or VCC whichever is less VM tw(H) VM 3.0V or VCC tPHZ VOH VM nAx or nBx VOL VY VM 0V SH00030 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency SH00034 Waveform 5. 3–State Output Enable Time to High Level and Output Disable Time from High Level 3.0V or VCC nSBA or nSAB VM nAx or nBx VM 3.0V or VCC nOE, nDIR 0V tPLH VM tPHL nAx or nBx VM VM VM nDIR VOH 0V tPZL nAx or nBx tPLZ 3.0V or VCC VOL VM nAx or nBx VX VOL SH00031 Waveform 2. Propagation Delay, nSAB to nBx or nSBA to nAx, nAx to nBx or nBx to nAx SH00035 Waveform 6. 3–State Output Enable Time to Low Level and Output Disable Time from Low Level TEST CIRCUIT 3.0V or VCC nSBA or nSAB VM VM S1 VCC 0V tPHL tPLH VOH nAx or nBx VM 0V PULSE GENERATOR VM 500Ω VO VI 2 x VCC Open GND D.U.T. RT VOL 50pF CL 500Ω SH00032 Test Waveform 3. Propagation Delay, nSBA to nAx or nSAB to nBx S1 VCC VI tPLH/tPHL Open t 2.7V VCC tPLZ/tPZL 2 x VCC 2.7V – 3.6V 2.7V tPHZ/tPZH GND SY00003 Load circuitry for switching times 1998 Sep 03 8 Philips Semiconductors Product specification 16-bit bus transceiver/register (3-State) 74ALVCH16646 APPLICATION INFORMATION REAL TIME BUS TRANSFER BUS B TO BUS A A A B nOE L nDIR nCPAB nCPBA nSAB nSBA H X X L X TRANSFER STORED DATA TO A OR B A L nOE L L H nDIR nCPAB nCPBA nSAB nSBA H ↑ X X X L X X ↑ ↑ ↑ X X X X B } nOE L B } nDIR nCPAB nCPBA nSAB nSBA L X X X L A B } } nOE L STORAGE FROM A, B, OR A AND B REAL TIME BUS TRANSFER BUS A TO BUS B nDIR nCPAB nCPBA nSAB nSBA L X H|L X H H H|L X H X SH00028 1998 Sep 03 9 Philips Semiconductors Product specification 16-bit bus transceiver/register (3-State) TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm 1998 Sep 03 10 74ALVCH16646 SOT364-1 Philips Semiconductors Product specification 16-bit bus transceiver/register (3-State) NOTES 1998 Sep 03 11 74ALVCH16646 Philips Semiconductors Product specification 16-bit bus transceiver/register (3-State) 74ALVCH16646 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 12 Date of release: 08-98 9397-750-04688