PHILIPS PEMD15

PEMD15; PUMD15
NPN/PNP resistor-equipped transistors;
R1 = 4.7 kΩ, R2 = 4.7 kΩ
Rev. 03 — 2 September 2009
Product data sheet
1. Product profile
1.1 General description
NPN/PNP Resistor-Equipped Transistors (RET)
Table 1.
Product overview
Type number
Package
NXP
JEITA
PNP/PNP
complement
NPN/NPN
complement
PEMD15
SOT666
-
PEMB15
PEMH15
PUMD15
SOT363
SC-88
PUMB15
PUMH15
1.2 Features
n
n
n
n
Built-in bias resistors
Simplifies circuit design
Reduces component count
Reduces pick and place costs
1.3 Applications
n Low current peripheral driver
n Control of IC inputs
n Replaces general-purpose transistors in digital applications
1.4 Quick reference data
Table 2.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCEO
collector-emitter voltage
open base
-
-
50
V
IO
output current (DC)
-
-
100
mA
R1
bias resistor 1 (input)
3.3
4.7
6.1
kΩ
R2/R1
bias resistor ratio
0.8
1
1.2
PEMD15; PUMD15
NXP Semiconductors
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
2. Pinning information
Table 3.
Pinning
Pin
Description
Simplified outline
1
GND (emitter) TR1
2
input (base) TR1
3
output (collector) TR2
4
GND (emitter) TR2
5
input (base) TR2
6
output (collector) TR1
6
5
4
Symbol
6
5
R1
4
R2
TR2
1
2
3
TR1
001aab555
R2
1
R1
2
3
006aaa143
3. Ordering information
Table 4.
Ordering information
Type number
Package
Name
Description
Version
PEMD15
-
plastic surface mounted package; 6 leads
SOT666
PUMD15
SC-88
plastic surface mounted package; 6 leads
SOT363
4. Marking
Table 5.
Marking codes
Type number
Marking code[1]
PEMD15
5E
PUMD15
D0*
[1]
* = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
PEMD15_PUMD15_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 2 September 2009
2 of 10
PEMD15; PUMD15
NXP Semiconductors
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Per transistor; for the PNP transistor with negative polarity
VCBO
collector-base voltage
open emitter
-
50
V
VCEO
collector-emitter voltage
open base
-
50
V
VEBO
emitter-base voltage
open collector
-
10
V
VI
input voltage TR1
positive
-
+30
V
negative
-
−10
V
positive
-
+10
V
negative
input voltage TR2
-
−30
V
IO
output current (DC)
-
100
mA
ICM
peak collector current
-
100
mA
Ptot
total power dissipation
Tamb ≤ 25 °C
SOT363
[1]
-
200
mW
SOT666
[1][2]
-
200
mW
Tstg
storage temperature
−65
+150
°C
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
−65
+150
°C
Per device
Ptot
total power dissipation
Tamb ≤ 25 °C
SOT363
[1]
-
300
mW
SOT666
[1][2]
-
300
mW
[1]
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2]
Reflow soldering is the only recommended soldering method.
PEMD15_PUMD15_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 2 September 2009
3 of 10
PEMD15; PUMD15
NXP Semiconductors
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
6. Thermal characteristics
Table 7.
Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor
thermal resistance from
junction to ambient
Rth(j-a)
in free air
SOT363
[1]
-
-
625
K/W
SOT666
[1][2]
-
-
625
K/W
SOT363
[1]
-
-
416
K/W
SOT666
[1][2]
-
-
416
K/W
Per device
Rth(j-a)
thermal resistance from
junction to ambient
in free air
[1]
Device mounted on a FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Reflow soldering is the only recommended soldering method.
7. Characteristics
Table 8.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
-
-
100
nA
Per transistor; for the PNP transistor with negative polarity
ICBO
collector-base cut-off VCB = 50 V; IE = 0 A
current
ICEO
collector-emitter
cut-off current
VCE = 30 V; IB = 0 A
-
-
1
µA
VCE = 30 V; IB = 0 A;
Tj = 150 °C
-
-
50
µA
IEBO
emitter-base cut-off
current
VEB = 5 V; IC = 0 A
-
-
0.9
mA
hFE
DC current gain
VCE = 5 V; IC = 10 mA
30
-
-
VCEsat
collector-emitter
saturation voltage
IC = 10 mA; IB = 0.5 mA
-
-
150
VI(off)
off-state input voltage VCE = 5 V; IC = 100 µA
-
1.1
0.5
V
VI(on)
on-state input voltage VCE = 0.3 V; IC = 20 mA
2.5
1.9
-
V
R1
bias resistor 1 (input)
3.3
4.7
6.1
kΩ
R2/R1
bias resistor ratio
0.8
1
1.2
Cc
collector capacitance VCB = 10 V; IE = ie = 0 A;
f = 1 MHz
TR1 (NPN)
-
-
2.5
pF
TR2 (PNP)
-
-
3
pF
PEMD15_PUMD15_3
Product data sheet
mV
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 2 September 2009
4 of 10
PEMD15; PUMD15
NXP Semiconductors
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
006aaa030
103
hFE
(1)
(2)
(3)
006aaa031
1
VCEsat
(V)
102
(1)
(2)
(3)
10−1
10
1
10−1
1
102
10
10−2
1
IC (mA)
VCE = 5 V
IC/IB = 20
(1) Tamb = 150 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(3) Tamb = −40 °C
Fig 1.
TR1 (NPN): DC current gain as a function of
collector current; typical values
Fig 2.
006aaa032
10
102
10
IC (mA)
TR1 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa033
10
VI(off)
(V)
VI(on)
(V)
(1)
(1)
1
(2)
(2)
1
(3)
10−1
10−1
(3)
1
102
10
10−1
10−2
10−1
IC (mA)
VCE = 0.3 V
VCE = 5 V
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
TR1 (NPN): On-state input voltage as a
function of collector current; typical values
Fig 4.
TR1 (NPN): Off-state input voltage as a
function of collector current; typical values
PEMD15_PUMD15_3
Product data sheet
10
IC (mA)
(1) Tamb = −40 °C
Fig 3.
1
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 2 September 2009
5 of 10
PEMD15; PUMD15
NXP Semiconductors
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
006aaa213
103
006aaa214
−1
hFE
(2)
VCEsat
(V)
(1)
102
(3)
(2) (1)
−10−1
(3)
10
1
−10−1
−1
−10
−102
−10−2
−1
I C (mA)
VCE = −5 V
IC/IB = 20
(1) Tamb = 150 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(3) Tamb = −40 °C
Fig 5.
−102
−10
I C (mA)
TR2 (PNP): DC current gain as a function of
collector current; typical values
006aaa215
−10
Fig 6.
TR2 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa216
−10
VI(off)
(V)
VI(on)
(V)
(1)
(1)
(2)
−1
−1
(3)
(2)
(3)
−10−1
−10−1
−1
−10
−102
−10−1
−10−2
−10−1
I C (mA)
VCE = −0.3 V
VCE = −5 V
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
TR2 (PNP): On-state input voltage as a
function of collector current; typical values
Fig 8.
TR2 (PNP): Off-state input voltage as a
function of collector current; typical values
PEMD15_PUMD15_3
Product data sheet
−10
I C (mA)
(1) Tamb = −40 °C
Fig 7.
−1
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 2 September 2009
6 of 10
PEMD15; PUMD15
NXP Semiconductors
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
8. Package outline
2.2
1.8
6
1.1
0.8
5
1.7
1.5
0.45
0.15
4
6
0.6
0.5
5
4
0.3
0.1
2.2 1.35
2.0 1.15
1.7
1.5
pin 1
index
1.3
1.1
pin 1 index
1
2
3
1
0.25
0.10
0.3
0.2
0.65
3
0.18
0.08
0.27
0.17
0.5
1.3
1
Dimensions in mm
Fig 9.
2
06-03-16
Package outline SOT363 (SC-88)
Dimensions in mm
04-11-08
Fig 10. Package outline SOT666
9. Packing information
Table 9.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number Package Description
Packing quantity
3000 4000
8000
10000
PEMD15
-
-
-315
-
SOT666
2 mm pitch, 8 mm tape and reel
4 mm pitch, 8 mm tape and reel
PUMD15
SOT363
-
-115
-
-
4 mm pitch, 8 mm tape and reel; T1
[2]
-115
-
-
-135
4 mm pitch, 8 mm tape and reel; T2
[3]
-125
-
-
-165
[1]
For further information and the availability of packing methods, see Section 12.
[2]
T1: normal taping
[3]
T2: reverse taping
PEMD15_PUMD15_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 2 September 2009
7 of 10
PEMD15; PUMD15
NXP Semiconductors
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
10. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PEMD15_PUMD15_3
20090902
Product data sheet
-
PEMD15_PUMD15_2
Modifications:
•
This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
•
Figure 9 “Package outline SOT363 (SC-88)”: updated
PEMD15_PUMD15_2
20050425
Product data sheet
-
PUMD15_1
PUMD15_1
20040204
Product specification
-
-
PEMD15_PUMD15_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 2 September 2009
8 of 10
PEMD15; PUMD15
NXP Semiconductors
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
11. Legal information
11.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
11.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
11.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
11.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
12. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PEMD15_PUMD15_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 2 September 2009
9 of 10
PEMD15; PUMD15
NXP Semiconductors
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 4.7 kΩ
13. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
10
11
11.1
11.2
11.3
11.4
12
13
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
Packing information. . . . . . . . . . . . . . . . . . . . . . 7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 8
Legal information. . . . . . . . . . . . . . . . . . . . . . . . 9
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 9
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Contact information. . . . . . . . . . . . . . . . . . . . . . 9
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 2 September 2009
Document identifier: PEMD15_PUMD15_3