INTEGRATED CIRCUITS 74F862, 74F863 Bus transceivers (3-State) Product specification Supersedes data of 1999 Jan 08 IC15 Data Handbook 2000 Mar 24 Philips Semiconductors Product specification 74F862, 74F863 Bus transceivers (3-State) FEATURES ORDERING INFORMATION • Provide high performance bus interface buffering for wide data/address paths or buses carrying parity COMMERCIAL RANGE VCC = 5V±10%; Ta = 0°C to +70°C PKG DWG # 24-pin Plastic Slim Dual In-line (300mil) Package N74F862N, N74F863N SOT222-1 24-pin Plastic Small Outline Large1 N74F862D, N74F863D SOT137-1 PACKAGES • High impedance NPN base inputs for reduced loading (20µA in High and Low states) • IIL is 20µA vs. 1000µA for AM29861 series • Buffered control inputs for light loading, or increased fan-in as required with MOS microprocessors • Positive and negative over-shoots are clamped to ground • 3-State outputs glitch free during power-up and power-down • Slim dual In-line (DIP) 300mil package • Broadside pinout compatible with AMD AM29862–29863 • Outputs sink 64mA NOTE: 1. Thermal mounting techniques are recommended. See SMD Process Applications for a discussion of thermal considerations for surface mounted devices. PIN CONFIGURATION DESCRIPTION The 74F862 and 74F863 bus transceivers provide high performance bus interface buffering for wide data/address paths of buses carrying parity. The 74F863 9-bit bus transceiver has NOR-ed transmit and receive output enables for maximum control flexibility. TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F862 6.0ns 150mA 74F863 6.0ns 115mA OEBA 1 24 VCC A0 2 23 B0 A1 3 22 B1 A2 4 21 B2 A3 5 20 B3 A4 6 19 B4 A5 7 18 B5 A6 8 17 B6 A7 9 16 B7 A8 10 15 B8 A9 11 14 B9 GND 12 13 OEAB TOP VIEW SF00518 2000 Mar 24 2 853-0881 23378 Philips Semiconductors Product specification Bus transceivers (3-State) 74F862, 74F863 PIN CONFIGURATION PIN CONFIGURATION 74F863 74F862 OEBA 1 24 VCC A0 2 23 B0 A1 3 22 B1 A2 4 21 A3 5 20 A4 6 19 18 7 A5 17 8 A6 16 9 A7 15 10 A8 1 24 VCC A0 2 23 B0 A1 3 22 B1 A2 4 21 B2 A3 5 20 B3 A4 6 19 B4 A5 7 18 B5 A6 8 17 B6 A7 9 16 B7 A8 10 15 B8 OEBA1 11 14 OEAB0 GND 12 13 OEAB1 B2 B3 B4 B5 B6 B7 B8 A9 11 14 B9 GND 12 13 OEAB TOP VIEW OEBA0 TOP VIEW SF00521 LOGIC SYMBOL LOGIC SYMBOL 74F862 2 3 4 5 6 7 74F863 8 9 10 11 2 3 4 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 13 1 SF01441 5 6 7 8 9 10 A0 A1 A2 A3 A4 A5 A6 A7 A8 OEAB OEBA 1 OEBA0 11 OEBA1 14 OEAB0 13 OEAB1 B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B0 B1 B2 B3 B4 B5 B6 B7 B8 23 22 21 20 19 18 17 16 15 14 23 22 21 20 19 18 17 16 15 VCC = Pin 24 GND = Pin 12 VCC = Pin 24 GND = Pin 12 SF00522 LOGIC SYMBOL (IEEE/IEC) 23 ∆ 1 2 ∆ 3 22 4 21 5 EN2(AB) 1 23 2 3 22 4 21 20 5 20 6 19 6 19 7 18 7 18 8 17 8 17 9 16 9 16 10 15 10 15 11 14 11 14 SF00523 2000 Mar 24 EN1(BA) & ∆ ∆ 2 74F863 & ∆ EN1(BA) EN2(AB) ∆ 2 1 11 14 13 ∆ 74F862 1 13 ∆ LOGIC SYMBOL (IEEE/IEC) SF00525 SF00526 3 Philips Semiconductors Product specification Bus transceivers (3-State) 74F862, 74F863 LOGIC DIAGRAM LOGIC DIAGRAM 74F862 74F863 OEAB0 OEAB OEAB1 10 10 An 9 Bn An 9 Bn OEBA0 OEBA OEBA1 SF00531 SF00532 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS 74F862 74F863 DESCRIPTION LOAD VALUE HIGH/LOW A0 – A9 Data transmit inputs 3.5/0.117 70µA/70µA B0 – B9 Data receive inputs 3.5/0.117 70µA/70µA OEBA Transmit output enable input 1.0/0.033 20µA/20µA OEAB Receive output enable input 1.0/0.033 20µA/20µA A0 – A9 Data transmit outputs 1200/106.7 24mA/64mA B0 – B9 Data receive outputs 1200/106.7 24mA/64mA A0 – A9 Data transmit inputs 3.5/0.117 70µA/70µA B0 – B9 Data receive inputs 3.5/0.117 70µA/70µA OEBAn Transmit output enable input 1.0/0.033 20µA/20µA OEABn Receive output enable input 1.0/0.033 20µA/20µA A0 – A9 Data transmit outputs 1200/106.7 24mA/64mA B0 – B9 Data receive outputs 1200/106.7 24mA/64mA NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state. FUNCTION TABLE FOR 74F862 INPUTS OPERATING MODES OEAB OEBA 74F862 L H A data to B bus H L B bus to A data H H Z H = High voltage level L = Low voltage level Z = High impedance “off” state FUNCTION TABLE FOR 74F863 INPUTS OPERATING MODES OEAB0 OEAB1 OEBA0 OEBA1 74F863 L L0 L L H X X H A data to B bus H X X H L L L L B bus to A data H H H H Z H = High voltage level L = Low voltage level Z = High impedance “off” state 2000 Mar 24 74F(U.L.) HIGH/LOW 4 Philips Semiconductors Product specification Bus transceivers (3-State) 74F862, 74F863 ABSOLUTE MAXIMUM RATINGS Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range. SYMBOL PARAMETER RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to +5.5 V IOUT Current applied to output in Low output state 128 mA 0 to +70 °C –65 to +150 °C Ta Tstg Operating free-air temperature range Storage temperature RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS UNIT MIN NOM MAX 5.0 5.5 VCC Supply voltage 4.5 VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –24 mA IOL Low-level output current 64 mA Ta Operating free-air temperature range 70 °C 2000 Mar 24 0 5 V V Philips Semiconductors Product specification Bus transceivers (3-State) 74F862, 74F863 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL LIMITS TEST CONDITIONS1 PARAMETER MIN VOH O Low level output voltage Low-level VIK Input clamp voltage II Input current at maximum input voltage IIH High-level input current IIL Low-level input current IIL + IOZL IOS IOH 1 mA O = –1 VCC = MIN, VIL = MAX MAX, VIH = MIN IOH 24 mA O = –24 High-level High level output voltage VOL O IIH + IOZH VCC = MIN, VIL = MAX MAX, VIH = MIN VCC = MIN, VIL = MAX MAX, VIH = MIN 2.4 ±5%VCC 2.4 ±10%VCC 2.0 V ±5%VCC 2.0 V V 3.3 V IOL = –48 mA ±10%VCC 0.38 0.55 V IOL = 64 mA ±5%VCC 0.42 0.55 V –0.73 –1.2 V 100 µA OEAB, OEBA OEABn, OEBAn VCC = 0.0 V, VI = 7.0 V An, Bn VCC = 5.5 V, VI = 5.5 V 1 mA VCC = MAX, VI = 2.7 V 20 µA VCC = MAX, VI = 0.5 V –20 µA VCC = MAX, VO = 2.7 V 70 µA VCC = MAX, VO = 0.5 V –70 µA –225 mA 145 195 mA 140 195 mA ICCZ 165 220 mA ICCH 90 130 mA 120 170 mA 130 160 mA An, Bn Off-state output current Low-level voltage applied Short-circuit output current3 VCC = MAX ICCH ICC UNIT MAX ±10%VCC VCC = MIN, II = IIK Off-state output current High-level voltage applied An, Bn TYP2 74F863 Supply current total 74F862 ICCL ICCL VCC = MAX VCC = MAX ICCZ –100 NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5 V, Ta = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 2000 Mar 24 6 Philips Semiconductors Product specification Bus transceivers (3-State) 74F862, 74F863 AC ELECTRICAL CHARACTERISTICS 74F863 SYMBOL PARAMETER TEST CONDITION Ta = +25°C VCC = 5 V CL = 50 pF, RL = 500 Ω Ta = 0°C to +70°C VCC = 5 V ±10% CL = 50 pF, RL = 500 Ω MIN TYP MAX MIN MAX UNIT tPLH tPHL Propagation delay An or Bn Waveform 1 4.0 3.0 6.0 5.0 9.0 8.0 3.5 2.5 10.0 9.0 ns tPLH tPHL Propagation delay Bn or An Waveform 1 4.0 2.5 6.0 5.0 9.0 8.0 3.5 2.5 10.0 9.0 ns tPZH tPZL Output Enable time High or Low level OEBAn to An Waveform 3 Waveform 4 6.0 4.0 8.0 6.0 11.5 10.0 5.0 4.0 13.0 11.0 ns tPZH tPZL Output Enable time High or Low level OEABn to Bn Waveform 3 Waveform 4 6.0 4.0 8.0 6.0 11.0 10.0 5.0 4.0 13.0 11.0 ns tPHZ tPLZ Output Disable time High or Low level OEBAn to An Waveform 3 Waveform 4 3.5 2.5 5.5 5.0 9.0 8.5 3.0 2.0 9.5 9.5 ns tPHZ tPLZ Output Disable time High or Low level OEABn to Bn Waveform 3 Waveform 4 3.5 2.5 5.5 4.5 8.5 8.5 3.0 2.0 9.5 9.5 ns AC ELECTRICAL CHARACTERISTICS 74F862 SYMBOL PARAMETER TEST CONDITION Ta = +25°C VCC = 5 V CL = 50 pF, RL = 500 Ω Ta = 0°C to +70°C VCC = 5 V ±10% CL = 50 pF, RL = 500 Ω UNIT MIN TYP MAX MIN MAX Waveform 2 4.0 1.5 6.0 3.5 9.0 6.5 3.0 1.5 10.0 7.0 ns Propagation delay Bn or An Waveform 2 4.0 1.5 6.0 3.5 9.0 6.5 3.5 1.5 10.0 7.0 ns tPZH tPZL Output Enable time High or Low level OEBAn to An Waveform 3 Waveform 4 6.5 6.0 8.5 7.5 12.0 12.0 5.5 5.0 13.5 14.0 ns tPZH tPZL Output Enable time High or Low level OEABn to Bn Waveform 3 Waveform 4 6.5 6.0 8.5 7.5 12.0 12.0 5.5 5.0 13.5 14.0 ns tPHZ tPLZ Output Disable time High or Low level OEBAn to An Waveform 3 Waveform 4 3.0 2.5 5.0 4.0 8.5 8.5 2.5 2.0 9.5 9.0 ns tPHZ tPLZ Output Disable time High or Low level OEABn to Bn Waveform 3 Waveform 4 3.0 2.5 5.0 4.0 8.5 8.5 2.5 2.0 9.5 9.0 ns tPLH tPHL Propagation delay An or Bn tPLH tPHL 2000 Mar 24 7 Philips Semiconductors Product specification Bus transceivers (3-State) 74F862, 74F863 AC WAVEFORMS VM An, Bn OEBAn OEABn VM tPLH Bn, An VM tPHZ tPZH tPHL VM VM VOH –0.3 V VM An, Bn 0V VM SF00535 Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level SF00202 Waveform 1. Propagation Delay for Non-inverting Output OEBAn OEABn VM VM tPZL An or Bn VM VM tPLH tPHL tPLZ An, Bn VM VOL +0.3 V SF00536 Bn or An VM VM Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level SF00534 Waveform 2. Propagation Delay for Inverting Output NOTE: For all waveforms, VM = 1.5V. TEST CIRCUITS AND WAVEFORMS VCC 7.0V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% Test Circuit for Open Collector Outputs POSITIVE PULSE 90% VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00128 2000 Mar 24 8 Philips Semiconductors Product specification 74F862, 74F863 Bus transceivers (3-State) DIP24: plastic dual in-line package; 24 leads (300 mil) 2000 Mar 24 9 SOT222-1 Philips Semiconductors Product specification 74F862, 74F863 Bus transceivers (3-State) SO24: plastic small outline package; 24 leads; body width 7.5 mm 2000 Mar 24 10 SOT137-1 Philips Semiconductors Product specification 74F862, 74F863 Bus transceivers (3-State) NOTES 2000 Mar 24 11 Philips Semiconductors Product specification 74F862, 74F863 Bus transceivers (3-State) Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 2000 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Date of release: 03-00 Document order number: 2000 Mar 24 12 9397 750 06999