INTEGRATED CIRCUITS 74F595 8-bit shift register with output laches (3-State) Product specification IC15 Data Handbook 1990 Apr 18 Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) FEATURES 74F595 PIN CONFIGURATION • Low noise, now switching feedthrough current • Controlled output edge rates • High impedance PNP base inputs for reduced loading Q1 1 16 VCC Q2 2 15 Q0 Q3 3 14 DS Q4 4 13 OE Q5 5 12 STCP Q6 6 11 SHCP Q7 7 10 SHR GND 8 9 QS (20µA in High and Low states) • 8-bit serial-in, parallel-out shift register with storage • 3-state outputs • Shift register has direct clear • Guaranteed shift frequency-DC to 100MHz SF01096 DESCRIPTION The 74F595 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-State outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct overriding clear, serial input and serial output pins for cascading. Both the shift register and storage register clocks are positive edge-triggered. If the user wishes to connect both clocks together, the shift register state will always be one clock pulse ahead of the storage register. TYPE TYPICAL fMAX TYPICAL SUPPLY CURRENT (TOTAL) 74F595 130MHz 65mA ORDERING INFORMATION This device uses patented circuitry to control system noise and internal ground bounce. This is done by eliminating switching feedthrough current and controlling both Low-to-High and High-to-Low slew rates. DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C 16-pin plastic DIP N74F595N SOT38-4 16-pin plastic SO N74F595D SOT109-1 PKG DWG # INPUT AND OUTPUT LOADING AND FAN-OUT TABLE 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW Serial data input 1.0/0.033 20µA/20µA SHCP Shift register clock pulse input (active rising edge) 1.0/0.033 20µA/20µA STCP Storage register clock pulse input (active rising edge) 1.0/0.033 20µA/20µA SHR PINS Ds DESCRIPTION Shift register reset input (active Low) 1.0/0.033 20µA/20µA OE Output Enable input (active Low) 1.0/0.033 20µA/20µA Qs Serial expansion output 50/33 1.0mA/20mA Data outputs 150/40 3.0mA/24mA Q0–Q7 NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. 1990 Apr 18 2 853–1096 99392 Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) LOGIC SYMBOL 74F595 IEC/IEEE SYMBOL (IEEE/IEC) 13 14 12 Ds 10 EN3 C2 SRG8 13 OE 12 STCP 11 SHCP 10 SHR 11 Qs 14 9 R C1/ 1D 3 2D 15 1 Q0 Q1 Q2 Q3 Q4 Q5 Q6 2 Q7 3 15 1 2 3 4 5 6 4 7 5 6 VCC = Pin 16 GND = Pin 8 SF01097 3 2D 7 9 SF01098 MODE SELECT – FUNCTION TABLE INTERNAL SHIFT REGISTERS INPUTS OE SHR H H INTERNAL STORAGE REGISTER OUTPUTS OPERATING MODES SHCP STCP Dn O0 O1–O7 Q0–Q7 Q0–Q7 QS H ↑ ↑ X O0 O1–O7 Q0–Q7 Z Q7 No Change L X ↑ X L0 L Q0–Q7 Z L L L X ↑ X L0 L Q0–Q7 Q0–Q7 L Clear shift register, hold latch H H ↑ ↑ ds Ds o0–o6 Q0–Q7 Z o6 L H ↑ ↑ ds Ds o0–o6 Q0–Q7 Q0–Q7 o6 H H ↑ ↑ X O0 O1–O7 o0–o7 Z Q7 L H ↑ ↑ X O0 O1–O7 o0–o7 o0–o7 Q7 H H ↑ ↑ ds Ds o0–o6 o0–o7* Z o6 L H ↑ ↑ ds Ds o0–o6 o0–o7* o0–o* o6 Shift Store Store then Shift Store, H = High voltage level L = Low voltage level X = Don’t care Z = High impedance dn (on)=Lower case letters indicate the state of the referenced input (or output) one setup time prior to the Low-to-High clock transition ↑ = Low-to-High clock transition ↑ = Not a Low-to-High clock transition * = When clocking both SHCP and STCP simultaneously the Shift Register state will always be one clock pulse ahead of the Storage Register 1990 Apr 18 3 Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) 74F595 LOGIC DIAGRAM OE STCP SHCP SHR Ds 13 12 11 10 14 D CP CLR S R CP CLR S R CP CLR S R CP CLR S R CP CLR S R CP CLR S R CP CLR S R CP CLR Q R Q CP S Q R Q CP S Q R Q CP S Q R Q CP S Q R Q CP S Q R Q CP S Q R Q CP S Q R Q CP S Q Q Q Q Q Q Q Q 15 1 2 3 4 5 6 7 9 VCC = Pin 16 GND = Pin 8 1990 Apr 18 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Qs SF01099 4 Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) 74F595 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL PARAMETER RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to +VCC V Qs 40 mA IOUT O Current applied to output in Low output state Q0–Q7 48 mA Tamb Operating free-air temperature range 0 to +70 °C Tstg Storage temperature range –65 to +150 °C RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER UNIT MIN NOM MAX 5.0 5.5 VCC Supply voltage 4.5 VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH O High level output current High-level IOL O Low level output current Low-level Tamb Operating free-air temperature range 1990 Apr 18 V V Qs –1 mA Q0–Q7 –3 mA Qs 20 mA Q0–Q7 24 mA 70 °C 0 5 Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) 74F595 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) LIMITS SYMBOL TEST CONDITIONSNO TAG PARAMETER Qs VOH O High level output voltage High-level Q0 Q7 Q0–Q7 Qs VOL O Low level output voltage Low-level Q0 Q7 Q0–Q7 IOH = 1mA O =–1mA VCC = MIN, VIL = MAX MAX, VIH=MIN IOH = 3mA O =–3mA IOL O = 20mA VCC = MIN, VIL = MAX MAX, VIH = MIN, IOL O = 24mA MIN ±10%VCC 2.5 ±5%VCC 2.7 ±10%VCC 2.4 ±5%VCC 2.7 TYP NO TAG MAX UNIT V 3.4 V V 3.3 V ±10%VCC 0.30 0.50 V ±5%VCC 0.30 0.50 V ±10%VCC 0.35 0.50 V ±5%VCC 0.35 0.50 V –0.73 –1.2 V VIK Input clamp voltage VCC = MIN, II = IIK II Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA IIH High-level input current VCC = MAX, VI = 2.7V 20 µA IIL Low-level input current VCC = MAX, VI = 0.5V –20 mA IOZH Off-state output current, High level of voltage applied Q0–Q7 only VCC = MAX, VO = 2.7V 50 µA IOZL Off-state output current, Low level of voltage applied Q0–Q7 only VCC = MAX, VO = 0.5V –50 µA IOS Short-circuit output currentNO TAG –150 mA 55 80 mA 70 100 mA 65 95 mA VCC = MAX –60 ICCH ICC Supply current (total) ICCL VCC = MAX ICCZ NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 1990 Apr 18 6 Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) 74F595 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITION VCC = +5V Tamb = +25°C CL = 50pF, RL = 500Ω MIN TYP VCC = +5V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω MAX MIN UNIT MAX fMAX Maximum clock frequency–SHCP to Qs Waveform NO TAG 115 135 tPLH tPHL Propagation delay SHCP to Qs Waveform NO TAG 6.0 2.5 8.0 4.5 10.5 7.5 5.0 2.5 12.5 7.5 ns tPLH tPHL Propagation delay STCP to Q0–Q7 Waveform NO TAG 5.5 3.0 8.0 5.0 10.0 8.0 4.5 3.0 13.0 8.5 ns tPHL Propagation delay SHR to Qs Waveform NO TAG 3.5 5.5 8.0 3.0 8.5 ns tPZH tPZL Output Enable time OE to Q0–Q7 Waveform 5 Waveform 6 3.5 3.0 5.5 5.5 9.0 8.5 2.5 2.5 10.5 10.5 ns tPHZ tPLZ Output Disable time OE to Q0–Q7 Waveform 5 Waveform 6 2.0 4.0 4.0 6.0 7.0 9.0 1.5 3.0 8.5 10.5 ns 90 MHz AC SETUP REQUIREMENTS LIMITS SYMBOL PARAMETER VCC = +5V Tamb = +25°C CL = 50pF, RL = 500Ω TEST CONDITION MIN TYP MAX VCC = +5V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω MIN UNIT MAX ts(H) ts(L) Setup time, High or Low Ds to SHCP Waveform 3 2.0 2.0 2.5 2.5 ns th(H) th(L) Hold time, High or Low Ds to SHCP Waveform 3 0 0 0 0 ns ts(L) Setup time, Low SHR to STCP Waveform 3 4.5 5.0 ns ts(H) Setup time, High SHCP to STCP Waveform 4 4.5 5.0 ns tW(H) tW(L) SHCP Pulse width, High or Low Waveform NO TAG 3.5 4.0 4.0 4.0 ns tW(H) tW(L) STCP Pulse width, High or Low Waveform NO TAG 4.0 3.0 4.0 3.5 ns tW(L) SHR Pulse width, Low Waveform NO TAG 3.0 3.0 ns tREC Recovery time, SHR to SHCP Waveform NO TAG 3.0 3.0 ns AC WAVEFORMS For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance. 1990 Apr 18 7 Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) 74F595 1/fMAX SHR SHCP, STCP VM VM VM tw(H) VM tw(L) tREC tw(L) VM SHCP tPHL tPLH tPHL VM VM QS, Q0–Q7 VM Qs SF01100 SF01101 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Widths, and Maximum Clock Frequency Ds VM ts(H) VM th(H)=0 VM SHCP VM ts(L) Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay, and Master Reset to Clock Recovery Time VM SHR SHCP th(L)=0 VM STCP VM VM ts(H) ts(L) VM SF01103 SF01102 Waveform 3. Data Setup and Hold Times 1990 Apr 18 VM Waveform 4. Setup and Hold Times 8 Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) 74F595 AC WAVEFORMS (Continued) For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance. VM OE tPZH VM tPZL VOH -0.3V tPHZ Q0–Q7 VM OE VM tPLZ VM Q0–Q7 VM 0V VOL +0.3V SF01105 SF01104 Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level TEST CIRCUIT AND WAVEFORMS VCC 7.0V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% 90% Test Circuit for 3-State Outputs POSITIVE PULSE VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00777 1990 Apr 18 9 Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) DIP16: plastic dual in-line package; 16 leads (300 mil) 1990 Apr 18 10 74F595 SOT38-4 Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) SO16: plastic small outline package; 16 leads; body width 3.9 mm 1990 Apr 18 11 74F595 SOT109-1 Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) NOTES 1990 Apr 18 12 74F595 Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) 74F595 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 13 Date of release: 10-98 9397-750-05143