INTEGRATED CIRCUITS 74F377A Octal D-type flip-flop with enable Product specification IC15 Data Handbook 1996 Mar 12 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74F377A FEATURES DESCRIPTION • High impedance inputs for reduced loading (20µA in Low and The 74F377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low. High states) • Ideal for addressable register applications • Enable for address and data synchronization applications • Eight edge–triggered D–type flip–flops • Buffered common clock • See ’F273A for Master Reset version • See ’F373 for transparent latch version • See ’F374 for 3–State version The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation. TYPE TYPICAL fMAX TYPICAL SUPPLY CURRENT (TOTAL) 74F377A 165MHz 29mA ORDERING INFORMATION PACKAGES COMMERCIAL RANGE VCC = 5V±10%; Tamb = 0°C to +70°C PKG. DWG. # 20–pin plastic DIP N74F377AN SOT146-1 20–pin plastic SOL N74F377AD SOT163-1 INPUT AND OUTPUT LOADING AND FAN–OUT TABLE 74F(U.L.) HIGH/LOW LOAD VALUE HIGH/LOW Data inputs 1.0/0.033 20µA/20µA Clock pulse input (active rising edge) 1.0/0.033 20µA/20µA Enable input (active–Low) 1.0/0.033 20µA/20µA 50/33 1.0mA/20mA PINS DESCRIPTION D0 – D7 CP E Q0 – Q7 Data outputs PIN CONFIGURATION LOGIC SYMBOL E 1 20 VCC Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 9 12 Q4 11 1 Q3 GND 10 4 7 8 13 14 17 18 D0 D1 D2 D3 D4 D5 D6 D7 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 2 5 6 9 12 15 16 19 CP E 11 CP VCC = Pin 20 GND = Pin 10 SF00350 1996 Mar 12 3 2 SF00351 853–0026 16555 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74F377A LOGIC SYMBOL (IEEE/IEC) 1 FUNCTION TABLE INPUTS G1 11 2 2D 4 5 7 6 8 9 13 12 14 15 17 16 18 19 OPERATING MODE CP Dn Qn l ↑ h H Load “1” l ↑ l L Load “0” 1C2 3 OUTPUTS E h ↑ X no change Hold (do nothing) H X X no change H = High voltage level h = High voltage level one set-up time prior to the Low-to-High clock transition L = Low voltage level l = Low voltage level one set-up time prior to the Low-to-High clock transition X = Don’t care ↑ = Low-to-High clock transition SF00352 LOGIC DIAGRAM D0 D1 3 D2 4 D4 D3 7 D5 13 8 D6 14 D7 17 18 1 E D Q D CP CP Q D CP Q D CP Q D CP Q D CP Q D CP Q D CP Q CP 11 2 Q0 5 Q1 6 9 Q2 Q3 VCC = Pin 20 GND = Pin 10 1996 Mar 12 12 Q4 15 Q5 16 Q6 19 Q7 SF00353 3 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74F377A ABSOLUTE MAXIMUM RATINGS (Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL PARAMETER RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to VCC V IOUT Current applied to output in Low output state 40 mA Tamb Operating free air temperature range Tstg Storage temperature range 0 to +70 °C –65 to +150 °C RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL LIMITS UNIT MIN NOM MAX 5.0 5.5 VCC Supply voltage 4.5 VIH High–level input voltage 2.0 VIL Low–level input voltage 0.8 V V V IIk Input clamp current –18 mA IOH High–level output current –1 mA IOL Low–level output current 20 mA +70 °C Tamb Operating free air temperature range 0 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER E & CP inputs VOH High-level output voltage Other inputs VOL Low-level output voltage TEST LIMITS CONDITIONS1 TYP2 ±10%VCC 2.5 VIH = 4.5V3, IOH = MAX ±5%VCC 2.7 VCC = MIN, VIL = MAX, ±10%VCC 2.5 V VIH = MIN, IOH = MAX ±5%VCC 2.7 V VCC = MIN, VIL = MAX, ±10%VCC 0.35 0.50 V VIH = MIN, IOL = MAX ±5%VCC 0.35 0.50 V –0.73 -1.2 100 V µA VCC = MIN, VIL = Input clamp voltage Input current at maximum input voltage IIH High–level input current VCC = MIN, II = IIK VCC = 0.0V, VI = 7.0V VCC = MAX, VI = 2.7V IIL Low–level input current VCC = MAX, VI = 0.5V IOS Short circuit output ICC Supply current (total) VCC = MAX ICCH MAX 0.0V3, VIK II current4 MIN UNIT VCC = MAX V 3.4 –60 27 V 20 µA –20 µA –150 mA 40 mA ICCL VCC = MAX 29 43 mA Notes to DC electrical characteristics 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. To reduce the effect of external noise during test. Special test conditions are not necessary for the ’377A. 4. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 1996 Mar 12 4 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74F377A AC CHARACTERISTICS LIMITS SYMBOL PARAMETER fMAX Maximum clock frequency tPLH tPHL Propagation delay CP to Qn Tamb = +25oC VCC = +5.0V CL = 50pF RL = 500Ω WAVEFORM MIN TYP 1 150 165 1 3.0 4.5 5.0 6.5 Tamb =0oC to +70oC VCC = +5.0V ±10% CL = 50pF RL = 500Ω MAX MIN UNIT MAX 120 8.0 9.0 2.5 4.0 MHz 9.0 10.5 ns AC SETUP REQUIREMENTS LIMITS SYMBOL PARAMETER Tamb = +25oC VCC = +5.0V CL = 50pF RL = 500Ω WAVEFORM MIN TYP Tamb = 0oC to +70oC VCC = +5.0V ±10% CL = 50pF RL = 500Ω MAX MIN UNIT MAX ts(H) ts(L) Setup time, High or Low Dn to CP 2 2.5 2.5 2.5 2.5 ns th(H) th(L) Hold time, High or Low Dn to CP 2 1.0 0.0 1.0 0.0 ns ts(H) ts(L) Setup time, High or Low E to CP 2 3.0 4.0 3.0 4.5 ns th(H) th(L) Hold time, High or Low E to CP 2 0.0 0.0 0.0 0.0 ns tw(H) tw(L) Clock Pulse width High or Low 1 4.0 4.0 5.0 4.0 ns AC WAVEFORMS 1/fmax Dn CP VM VM VM VM VM tw(H) th tPHL Qn tw(L) VM ts tPLH VM E VM VM SF00294 VM VM th = 0 th = 0 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width and Maximum Clock Frequency ts(H) ts(L) CP VM NOTE: For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance. SF01237 Waveform 2. Data and Enable Setup and Hold Times 1996 Mar 12 VM 5 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74F377A TEST CIRCUIT AND WAVEFORM VCC 7.0V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% 90% Test Circuit for Open Collector Outputs POSITIVE PULSE VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00128 1996 Mar 12 6 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74F377A DIP20: plastic dual in-line package; 20 leads (300 mil) 1996 Mar 12 7 SOT146-1 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74F377A SO20: plastic small outline package; 20 leads; body width 7.5 mm 1996 Mar 12 8 SOT163-1 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74F377A NOTES 1996 Mar 12 9 Philips Semiconductors Product specification Octal D-type flip-flop with enable 74F377A Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 10 Date of release: 10-98 9397-750-05121