INTEGRATED CIRCUITS 74ALVCH16832 7-bit to 28-bit address register/driver with 3-state outputs Product data File under Integrated Circuits — ICL03 2001 Dec 14 Philips Semiconductors Product data 7-bit to 28-bit address register/driver with 3-state outputs FEATURES 74ALVCH16832 PIN CONFIGURATION • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 • Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA • Bus hold on data inputs eliminates the need for external pullup/pulldown resistors DESCRIPTION This 7 channel 1-bit to 4-bit address register/driver is designed for 2.3 V to 3.6 V VCC operation. This device is ideal for use in applications in which a single address bus is driving four separate memory locations. The 74ALVCH16832 can be used as a buffer or a register, depending on the logic level of the select (SEL) input. When SEL is a logic high, the device is in the buffer mode. The outputs follow the inputs and are controlled by the two output-enable (OE) inputs. Each OE controls two groups of seven outputs. When SEL is a logic low, the device is in the register mode. The register is an edge-triggered D-type flip-flop. On the positive transition of the clock (CLK) input, data at the A inputs is stored in the internal registers. OE operates the same as in the buffer mode. When OE is a logic low, the outputs are in a normal logic state, (high or low logic level). When OE is a logic high, the outputs are in the high-impedance state. Neither SEL of OE affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active buss-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The 74ALVCH16832 is characterized for operation from –40 to +85° C. PIN DESCRIPTION PIN(S) SYMBOL 1, 2, 4, 5, 28. 29, 31, 32, 33, 34, 36, 37, 41, 42, 44, 45, 47, 48, 49, 50, 54, 55, 57, 58, 60, 61, 63, 64 1Yn, 2Yn, 3Yn, 4Yn FUNCTION Outputs 4Y1 1 64 1Y2 3Y1 2 63 2Y2 GND 3 62 GND 2Y1 4 61 3Y2 1Y1 5 60 4Y2 VCC 6 59 VCC A1 7 58 1Y3 GND 8 57 2Y3 A2 9 56 GND GND 10 55 3Y3 A3 11 54 4Y3 VCC 12 53 GND NC 13 52 VCC GND 14 51 GND CLK 15 50 1Y4 OE1 16 49 2Y4 OE2 17 48 3Y4 SEL 18 47 4Y4 GND 19 46 GND A4 20 45 1Y5 A5 21 44 2Y5 VCC 22 43 V CC GND 23 42 3Y5 A6 24 41 4Y5 GND 25 40 GND A7 26 39 GND VCC 27 38 VCC 4Y7 28 37 1Y6 3Y7 29 36 2Y6 GND 30 135 GND 2Y7 31 34 3Y6 1Y7 32 33 4Y6 SV01912 3, 8, 10, 14, 19, 23, 25, 30, 35, 39, 40, 46, 51, 53, 56, 62 GND Ground 6, 12, 22, 27, 38, 43, 52, 59 VCC Supply voltage 7, 9, 11, 20, 21, 24, 26 An Inputs 16, 17 OE1, OE2 Output enable 15 CLK Clock 18 SEL Select ORDERING INFORMATION PACKAGES 64-pin Plastic TSSOP 2001 Dec 14 TEMPERATURE RANGE ORDER CODE DWG NUMBER –40 to +85 °C 74ALVCH16832DGG SOT646-1 2 853-2311 27460 Philips Semiconductors Product data 7-bit to 28-bit address register/driver with 3-state outputs 74ALVCH16832 LOGIC DIAGRAM (POSITIVE LOGIC) OE2 16 5 1Y1 OE1 17 4 CLK 15 2Y1 CLK 2 3Y1 A1 7 D Q 1 SEL 4Y1 18 to 6 other channels SV01913 FUNCTION TABLE Inputs Output SEL CLK A Y H X X X Z L H X L L L H X H H L L ↑ L L L L ↑ H H OE ABSOLUTE MAXIMUM RATINGS Over recommended operating free-air temperature range (unless otherwise noted).1 SYMBOL VCC PARAMETER CONDITIONS Supply voltage range RATING UNIT –0.5 to +4.6 V –0.5 to +4.6 V VI Input voltage range See Note 2 VO Output voltage range See Notes 2 and 3 –0.5 to VCC +0.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA Continuous output current "50 mA Continuous current through each VCC or GND "100 mA 106 °C/W –65 to +150 °C IO ICC, IGND ΘJA Package thermal impedance Tstg Storage temperature range See Note 4 NOTES: 1. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ”recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 3. This value is limited to 4.6 V maximum. 4. The package thermal impedance is calculated in accordance with JESD 51. 2001 Dec 14 3 Philips Semiconductors Product data 7-bit to 28-bit address register/driver with 3-state outputs 74ALVCH16832 RECOMMENDED OPERATING CONDITIONS All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. LIMITS SYMBOL VCC VIH VIL PARAMETER CONDITIONS Supply voltage High level input voltage High-level Low-level input voltage UNIT MIN MAX 2.3 3.6 VCC = 2.3 V to 2.7 V 1.7 — VCC = 2.7 V to 3.6 V 2 — VCC = 2.3 V to 2.7 V — 0.35 × VCC VCC = 2.3 V to 2.7 V — 0.7 VCC = 2.7 V to 3.6 V — 0.8 V V V VI Input voltage 0 VCC V VO Output voltage 0 VCC V VCC = 2.3 V — –12 VCC = 2.7 V — –12 VCC = 3 V — –24 IOH IOL High-level output current Low-level output current ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature 2001 Dec 14 VCC = 2.3 V 12 VCC = 2.7 V 12 VCC = 3 V 24 –40 4 mA mA 10 ns/V +85 °C Philips Semiconductors Product data 7-bit to 28-bit address register/driver with 3-state outputs 74ALVCH16832 ELECTRICAL CHARACTERISTICS Over recommended operating free-air temperature range (unless otherwise noted). LIMITS SYMBOL VCC MIN TYP1 MAX 2.3 V to 3.6 V VCC–0.2 — — IOH = –4 mA 2.3 V 1.2 — — IOH = –6 mA 2.3 V 2.0 — — 2.3 V 1.7 — — 2.7 V 2.2 — — 3V 2.4 — — IOH = –24 mA 3V 2 — — IOL = 100 µA 2.3 V to 3.6 V — — 0.2 IOL = 4 mA 2.3 V — — 0.45 IOL = 6 mA 2.3 V — — 0.4 2.3 V — — 0.7 2.7 V — — 0.4 3V — — 0.55 VI = VCC or GND 3.6 V — — ±5 VI = 0.7 V 2.3 V 45 — — VI = 1.7 V 2.3 V –45 — — VI = 0.8 V 3V 75 — — 3V –75 — — 3.6 V — — ±500 3.6 V — — ±10 µA PARAMETER TEST CONDITIONS IOH = –100 µA VOH IOH = –12 mA VOL IOL O = 12 mA IOL = 24 mA II II(hold) VI = 2 V VI = 0 to 3.6 V2 UNIT V V µA µA IOZ VO = VCC or GND ICC VI = VCC or GND, IO = 0 3.6 V — — 40 µA One input at VCC – 0.6 V, Other inputs at VCC or GND 3 V to 3.6 V — — 750 µA — 4.5 — VI = VCC or GND 33V 3.3 — 5 — VO = VCC or GND 3.3 V — 7.5 — ∆ICC Control inputs Ci Co Data inputs Outputs pF pF NOTES: 1. All typical values are at VCC = 3.3 V, Tamb = 25°C. 2. This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. 2001 Dec 14 5 Philips Semiconductors Product data 7-bit to 28-bit address register/driver with 3-state outputs 74ALVCH16832 TIMING REQUIREMENTS Over recommended operating free-air temperature range (unless otherwise noted) (see Figures 1 through 3). VCC = 1.8 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 2.7 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX Clock frequency — — — 150 — 150 — 150 MHz tW Pulse duration, CLK high or low — — 3.3 — 3.3 — 3.3 — ns tSU Setup time, A data before CLK ↑ — — 2 — 2 — 1.6 — ns Hold time, A data after CLK ↑ — — 0.7 — 0.5 — 1.1 — ns fCLK th SWITCHING CHARACTERISTICS Over recommended operating free-air temperature range (unless otherwise noted) (see Figures 1 through 3). PARAMETER FROM (INPUT) TO (OUTPUT) fMAX A tpd Y CLK SEL VCC = 2.5 V ± 0.2 V VCC = 1.8 V VCC = 3.3 V ± 0.3 V VCC = 2.7 V MIN MAX MIN MAX MIN MAX MIN — — 150 — — — 1.2 4 — — 1.1 — — 1.3 MAX 150 — 150 — — 4.1 1.6 3.6 4.5 — 4.4 1.5 3.9 5.2 — 5.2 1.7 4.4 UNIT MHz ns ten OE Y — — 1.1 5.1 — 5 1.2 4.3 ns tdis OE Y — — 1.4 5.5 — 4.7 1.6 4.5 ns OPERATING CHARACTERISTICS, Tamb = 25 °C SYMBOL Cpd 2001 Dec 14 PARAMETER Power dissipation capacitance ca acitance per driver All outputs enabled All outputs disabled TEST CONDITIONS VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V TYP TYP TYP — 119 132 — 22 25 0 f = 10 MHz CL = 0, 6 UNIT pF Philips Semiconductors Product data 7-bit to 28-bit address register/driver with 3-state outputs 74ALVCH16832 PARAMETER MEASUREMENT INFORMATION VCC = 1.8 V S1 1 kΩ From Output Under Test 2 × VCC TEST Open S1 GND CL = 30 pF (see Note A) tpd Open tPLZ/tPZL 2 × VCC 1 kΩ tPHZ/tPZH GND Load Circuit VCC Timing Input tw VCC/2 VCC 0V Input tsu VCC/2 0V th Voltage Waveforms Pulse Duration VCC Data Input VCC/2 VCC/2 VCC/2 0V Voltage Waveforms Setup and Hold Times Output Control (low-level enabling) VCC/2 VCC/2 tPLZ Output Waveform 1 S1 at 2 x VCC (see Note B) 0V tPLH 0V tPZL VCC Input VCC VCC/2 VCC/2 tPHL VCC VCC/2 tPZH VOL + 0.15 V VOL tPHZ VOH Output VCC/2 Output Waveform 2 S1 at GND (see Note B) VCC/2 VOL Voltage Waveforms Propagation Delay Times VCC/2 VOH VOH – 0.15 V 0V Voltage Waveforms Enable and Disable Times SV01911 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 1. Load circuit and voltage waveforms 2001 Dec 14 7 Philips Semiconductors Product data 7-bit to 28-bit address register/driver with 3-state outputs 74ALVCH16832 PARAMETER MEASUREMENT INFORMATION VCC = 2.5 V ± 0.2 V S1 500 Ω From Output Under Test 2 × VCC TEST Open S1 GND CL = 30 pF (see Note A) tpd Open tPLZ/tPZL 2 × VCC 500 Ω tPHZ/tPZH GND Load Circuit VCC Timing Input tw VCC/2 VCC 0V Input tsu VCC/2 0V th Voltage Waveforms Pulse Duration VCC Data Input VCC/2 VCC/2 VCC/2 0V Voltage Waveforms Setup and Hold Times Output Control (low-level enabling) VCC/2 VCC/2 tPLZ Output Waveform 1 S1 at 2 x VCC (see Note B) 0V tPLH 0V tPZL VCC Input VCC VCC/2 VCC/2 tPHL VCC VCC/2 tPZH VOL + 0.15 V VOL tPHZ VOH Output VCC/2 Output Waveform 2 S1 at GND (see Note B) VCC/2 VOL Voltage Waveforms Propagation Delay Times VCC/2 VOH VOH – 0.15 V 0V Voltage Waveforms Enable and Disable Times SV01849 Figure 2. Load circuit and voltage waveforms NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. 2001 Dec 14 8 Philips Semiconductors Product data 7-bit to 28-bit address register/driver with 3-state outputs 74ALVCH16832 PARAMETER MEASUREMENT INFORMATION VCC = 2.7 V and 3.3 V ± 0.3 V 6V S1 500 Ω From Output Under Test Open TEST S1 tpd tPLZ/tPZL Open 6V tPHZ/tPZH GND GND CL = 50 pF (see Note A) 500 Ω Load Circuit 2.7 V Timing Input tw 1.5 V 2.7 V 0V Input tsu 1.5 V 0V th Voltage Waveforms Pulse Duration 2.7 V Data Input 1.5 V 1.5 V 1.5 V 0V Voltage Waveforms Setup and Hold Times Output Control (low-level enabling) 1.5 V 1.5 V tPLZ Output Waveform 1 S1 at 6 V (see Note B) 0V tPLH 0V tPZL 2.7 V Input 2.7 V 1.5 V 1.5 V tPHL 3V 1.5 V tPZH VOL + 0.3 V tPHZ VOL VOH Output 1.5 V Output Waveform 2 S1 at GND (see Note B) 1.5 V VOL Voltage Waveforms Propagation Delay Times 1.5 V VOH VOH – 0.3 V 0V Voltage Waveforms Enable and Disable Times SV01850 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 3. Load circuit and voltage waveforms 2001 Dec 14 9 Philips Semiconductors Product data 7-bit to 28-bit address register/driver with 3-state outputs TSSOP64: plastic thin shrink small outline package; 64 leads; body width 6.1 mm 2001 Dec 14 10 74ALVCH16832 SOT646-1 Philips Semiconductors Product data 7-bit to 28-bit address register/driver with 3-state outputs NOTES 2001 Dec 14 11 74ALVCH16832 Philips Semiconductors Product data 7-bit to 28-bit address register/driver with 3-state outputs 74ALVCH16832 Data sheet status Data sheet status [1] Product status [2] Definitions Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Koninklijke Philips Electronics N.V. 2001 All rights reserved. Printed in U.S.A. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 Date of release: 12-01 For sales offices addresses send e-mail to: [email protected]. Document order number: 2001 Dec 14 12 9397 750 09243