INTEGRATED CIRCUITS DATA SHEET TZA1000 QIC read-write amplifier Preliminary specification Supersedes data of 1998 Mar 11 File under Integrated Circuits, IC01 1998 Mar 17 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 • Input for fast reader/writer (track height servo) signal selection FEATURES • 3-wire serial interface for programming • Power fail detection on both 5 and 12 V lines (status can be read from the read register) • On-chip Digital-to-Analog Converters (DAC) for: – MR (Magneto Resistive) sense bias current • Write unsafe detection – MR DC bias current • Provides an accurate reference voltage (for AD conversion) – Write current • Low noise differential input stage: typically 0.65 nV/√Hz (Zi = 0 Ω) • Very simple interconnection with the SZA1000 QIC digital equalizer • Magnetic feedback circuit to handle large output signals • +5 V ±10% and +12 V ±10% supply voltages • MR DC bias current circuit • Low power standby, active and test modes. • Very fast write current rise and fall times with near rail-to-rail voltage swing RELATED DOCUMENTS • Maximum write current of 100 mA: ready for high coercivity tape • SZA1000 QIC digital equalizer data sheet • Application notes for TZA1000 and SZA1000. • Low noise read amplifier for reading track height servo signals with the write coil Both are available from Philips Semiconductors. • Very few external components required • On board registers for easy format or bit rate selection GENERAL DESCRIPTION • Fast read-after-write recovery time The TZA1000 is a single-chip read-write amplifier for single-channel QIC (Quarter Inch Cartridge) systems with MR heads. It can be used with both SIG (Sensor in Gap)and yoke-type MR heads and is designed to be used in conjunction with the Philips SZA1000 digital equalizer IC (although it can also function as a stand alone unit). This combination is flexible enough to be used with all popular tape backup formats including QIC 80, QIC 3010, QIC 3020, QIC 3080, QIC 5010, Travan 1, Travan 2, Travan 3 and Travan 4 and to be forward compatible with their single channel successors. • Test circuit for yoke-type heads • Switchable differentiator for yoke-type heads, with programmable cut-off frequencies • Anti-aliasing low-pass filter, with programmable cut-off frequencies • AGC (Automatic Gain Control) options: internally (digitally) controlled, externally controlled or fixed gain • Hold input for fast AGC freeze QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDD1 read circuit supply voltage 4.5 5 5.5 V VDD2 FB and write circuit supply voltage 4.5 5 5.5 V VDD3 sense current circuit supply voltage 10.8 12 13.2 V IDD1; IDD2 read/FB and write circuit supply current − 69 − mA Iwrite = 30 mA − 105 − mA Read mode Write mode IDD3 sense current circuit supply current Isense = 16 mA 15.0 16.2 19.0 mA Vn(i)(eq) equivalent input noise voltage Zsource = 0 Ω − 0.65 0.8 nV/√Hz fclk clock frequency − − 24 MHz Tamb recommended operating temperature 0 − 70 °C Tj recommended junction temperature 0 − 125 °C Rth(j-a) thermal resistance from junction to ambient − 66 − K/W 1998 Mar 17 in free air 2 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 ORDERING INFORMATION TYPE NUMBER TZA1000 1998 Mar 17 PACKAGE NAME SO24 DESCRIPTION plastic small outline package; 24 leads; body width 7.5 mm 3 VERSION SOT137-1 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... ISENSE 8 5 SENSE CURRENT SOURCE 0 to 30 mA DAC (I) 7+1-bit SIG/ YOKE INA 6 MR HEAD VDD1 5 V VDD2 5 V 19 VARIABLE GAIN 10 to 25 dB 4 to 19 dB PREAMP INB 7 17 OUTA HPF 1 to 10 MHz 22 dB LPF 1 to 10 MHz 0 dB 18 OUTB Philips Semiconductors VDD3 9 QIC read-write amplifier BLOCK DIAGRAM handbook, full pagewidth 1998 Mar 17 12 V 4/34/40 dB 13 HOLD −10 dB AGC CONTROL CIRCUIT −4 dB 4 BIASA 24 BIAS (YOKE) BIASB 23 INTERNAL REFERENCE VOLTAGES 13 dB TEST GEN BIAS + FB DAC (V) WRITER WY 1 3 DAC (I) 20 15 CONTROL CIRCUIT TZA1000 WRITE CIRCUIT 10 to 100 mA BANDGAP REF 5-bit SERVO PREAMP WX LEVEL DETECTOR 10 11 VDD3 WRITE UNSAFE DETECTOR 12 VDD1 POWER FAIL DETECTOR 22 Vref CLK SDIO SCLK SDEN RESET 7-bit CURRENT REF 21 Iref 14 4 2 16 VSS1 VSS2 MGG660 WD Fig.1 Block diagram. TZA1000 WGATE Preliminary specification TOGGLE WDI to WD Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 PINNING SYMBOL PIN DESCRIPTION TYPE(1) WX 1 write current to head O VSS1 2 large signal ground P WY 3 write current to head O WD 4 write data I(2) VDD1 5 large signal +5 V P INA 6 read signal from MR INB 7 read signal from MR handbook, halfpage WX 1 24 BIASA I VSS1 2 23 BIASB I WY 3 22 RESET WD 4 21 Iref ISENSE 8 sense current for MR O VDD3 9 +12 V for sense current supply P SCLK 10 serial interface clock I(2) INA 6 SDEN 11 serial interface enable I(2) INB 7 18 OUTB SDIO 12 serial interface data I/O I/O ISENSE 8 17 VDD2 hold AGC; active LOW I(2) VDD3 9 16 VSS2 SCLK 10 15 CLK SDEN 11 14 WGATE HOLD 13 WGATE 14 write gate; active LOW I(2) CLK 15 clock input I(2) VSS2 16 small signal ground P VDD2 17 small signal +5 V P OUTB 18 output to equalizer O OUTA 19 output to equalizer O Vref 20 2 V reference output O Iref 21 current reference resistor note 3 RESET 22 reset for microcontroller; active LOW O BIASB 23 bias current for yoke heads O BIASA 24 bias current for yoke heads O VDD1 5 19 OUTA TZA1000 SDIO 12 13 HOLD MGG659 Fig.2 Pin configuration. Notes 1. Pin type abbreviations: O = output, I = input, P = power supply. 2. Digital inputs: LOW: <0.3VDD ; HIGH: >0.7VDD. 3. Use only for connecting current reference resistor. See Chapter “Equivalent pin circuits” for the I/O configuration of the analog pins. 1998 Mar 17 20 Vref 5 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 The AGC will maintain outputs OUTA and OUTB at 1.1 V (p-p). Additional level adjustment points are provided by the 34 or 40 dB preamplifier gain switch (see Table 11) and the −10 or −4 dB bias output attenuation switch (see Table 9). FUNCTIONAL DESCRIPTION The preamplifier The gain and dynamic range of the symmetrical low noise preamplifier can be varied to accommodate a wide variation in input signal amplitude (see Table 11). The 40 dB and 34 dB gain settings are provided for normal use. The 40 dB setting offers the lowest noise figure. The 4 dB gain setting is intended for IC testing only. High-pass filter The HPF (High-Pass Filter) is used to differentiate yoke-type head signals. It is followed by an additional gain stage (21 dB). The HPF cut-off frequency is coupled to the cut-off frequency of the LPF (Low-Pass Filter), and is selectable in 4 steps: 1, 2, 4 and 10 MHz (see Table 2). The HPF can be bypassed for SIG heads (see Table 8). The servo preamplifier This low noise preamplifier can be used for reading signals, such as QIC 3095 (Travan 4) servo signals, via the recording head write coil. Servo mode is selected either by resetting bits AI0 and AI1 in the control register (see Table 9) or by means of the HOLD pin (the HSM control bit must be set when HOLD goes LOW; see Table 7). When servo mode is selected, the maximum total gain is set automatically regardless of, and without overwriting, gain settings. Fast switch-over from read mode to servo mode can thus be achieved without having to alter register values. Low-pass filter The second order low-pass filter is used to attenuate high frequency noise above the signal bandwidth, mainly to provide anti-aliasing filtering for the A/D converter in the digital equalizer. The cut-off frequency of the LPF is selectable in 4 steps: 1, 2, 4 and 10 MHz (see Table 2). Sense current circuit The sense current circuit is a programmable current source, operating from the 12 V supply (VDD3). It can be programmed to supply a current between 0 and 15 mA, with 7-bit resolution. The current range can be doubled, then ranging from 0 to 30 mA, by setting the SDB bit in the control register (see Table 15). The sense current circuit can be disabled by resetting the ENS bit (see Table 4). Variable gain stage and AGC The input to the variable gain stage can be switched to the preamplifier output, to the output of the bias/FB (Feed Back) circuit, or to the servo preamplifier output. When using magnetic feedback, the bias/FB circuit output should be selected (see Table 9). The AGC range is 15 dB. The gain is programmable in 1 dB steps (see Table 12). If the output signal is too small, a digital control circuit will increase the gain from minimum to maximum in approximately 10 ms. If the output signal is too large, the gain will be reduced from maximum to minimum in approximately 0.2 ms. These values assume a 24 MHz clock frequency. The upper limit of the gain control range can be extended by 6 dB by setting the G6DB bit in the control register via the serial interface (see Table 13). This is the only circuit on the IC that uses the 12 V supply. The output must be decoupled with a low impedance capacitor (10 µF recommended) to reduce noise coupling into the head. For the current source circuit to operate correctly, the voltage difference between VDD3 (pin 9) and ISENSE (pin 8) must be at least 1.6 V. The AGC is frozen while the HOLD input is LOW, the TZA1000 is writing, or the IC is in servo mode. The AGC can be operated internally, running on the CLK clock signal on pin 15 (HOLD HIGH and GFXD LOW; see Table 12), or externally by means of a software algorithm (GFXD HIGH). When operated externally, either the DN bit in the status read register (see Table 17) or the level measurement in the digital equalizer IC (SZA1000) can be used as input to the algorithm. 1998 Mar 17 6 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 Bias and magnetic feedback circuit Write circuit This circuit can be used to generate AC and DC bias currents (for a yoke-type MR head, for instance). The DC bias output voltage is programmable between 0 and 1.4 V, with 5-bit resolution (see Table 3). The DC current generated is this voltage divided by the total bias resistance (head coil + total series resistance). The write circuit is a differential current source that can generate a near rail-to-rail output voltage to get the shortest current transition time. Writing is enabled when WGATE is LOW. The polarity of the current depends on the WD input pin. The WDM bit in the control register determines the write signal mode: WD (Non-Return to Zero) or WDI (Return to Zero; see Table 14). When WDI mode is selected, the polarity of the write current is reversed at every falling edge of the WD input. When WD mode is selected, the polarity of the write current is reversed when the polarity of WD changes. The write current is programmable between 0 and 125 mA, with 7-bit resolution (see Table 14). The AC signal input to the circuit can be switched to the preamplifier output (see Table 10). In this way, magnetic feedback inside the head can be achieved. This limits head distortion, and prevents head saturation from large tape signals, like QIC 80 recordings. The open loop gain of the feedback loop depends on head sensitivity, the selected sense current (see Table 15), and the selected preamplifier gain (see Table 11). The values of the external resistors connected in series with the bias conductor can be used to set the gain. For loop stability at high frequencies, the bandwidth of the magnetic feedback amplifier is limited to 5 MHz. The IC is specified for a write current of up to 100 mA. Overshoot caused by an inductive load can be minimized by means of a single external resister local to the IC. Write unsafe detector The write unsafe detector will detect an open write coil, or one shorted to ground. The circuit is enabled only while the TZA1000 is writing. A resistance to GND or VDD of less than 10 Ω, or a series resistance greater that about 300 Ω, will be detected (these values are write-current dependant). If an error occurs, the WUS status bit is set. This bit can be read via the serial interface. The WUS bit will remain set until the status byte is read. In closed loop mode, the effective cut-off frequency for the playback signals will increase with the feedback factor. For this reason the read signal can be taken from the output of the bias circuit. To prevent loop instability at low frequencies, the preamplifier input capacitors should be chosen such that the cut-off frequency at that point is well above, or well below, the internal cut-off frequency of the AC coupling between the preamplifier and the bias circuit (input impedance of the preamplifier is typically 2 kΩ). Power fail detector The power fail detector will detect a low voltage on the 5 V (VDD1) or 12 V (VDD3) supply lines. The thresholds are 3.75 V for VDD1 and 9 V for VDD3. A power failure is detected if the voltage is below the threshold for 1 µs or longer. If a 5 V power failure occurs, the status bit PF5 is set. If a 12 V power failure occurs, the status bit PF12 is set. These bits can be read via the serial interface, and will remain HIGH until the status byte is read. The maximum (peak AC) current that the bias circuit can deliver can be adjusted to achieve an optimum balance between required current range and power consumption (see Table 3). The AC circuit is switched off when the TZA1000 is writing, and the maximum current is switched to 10 mA. This limits power dissipation during writing. Test generator When a 5 V power failure occurs, the RESET output goes LOW and the write circuit is disabled (in addition to PF5 being set). The RESET output has an internal 18 kΩ pull down resistor to guarantee a LOW level at the output even when a power failure occurs. During normal operation, the RESET pin should not be held LOW by an external circuit, since this will switch the IC into test mode. This circuit generates a test signal with a frequency 1⁄16 that of the signal at the CLK input (pin 15). By switching the AC input of the bias circuit to the internal test generator (see Table 10), the read channel can be tested. The differential output value is typically 100 mV (p-p). This facility can also be used to adjust the DC bias voltage while monitoring the signal at the read element in the head. The optimum DC bias level setting is just before the output from the read head reaches its peak. 1998 Mar 17 7 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 DACs Clock handling There are 3 internal DACs: The TZA1000 has 2 clock inputs: 1. The Sense DAC: current DAC; 7-bit resolution CLK: the general clock input, pin 15 2. The Write DAC: current DAC; 7-bit resolution SCLK: the serial interface clock input, pin 10. 3. The Bias DAC: voltage DAC; 5-bit resolution. CLK is used for status register read and write cycle timing and for operating the internal AGC. When the AGC is not being used and serial communications are not active, CLK may be switched off. This can help reduce crosstalk on the printed circuit board. The Sense and Write DAC current settings are a function of the reference current Iref (at the Iref pin). Iref is multiplied by a 7-bit factor: S0 to S6 for the sense DAC, W0 to W6 for the write DAC (see Tables 14 and 15). If the resistance between Iref and GND is increased (or decreased), the DAC output currents will be decreased (or increased) by the same factor. In this way, the DAC output current ranges can be adjusted. When accessing the status register, the CLK frequency must be at least 16 × SCLK frequency. It is recommended that the 24 MHz clock supplied by the SZA1000 be used directly. The current values specified, and the equations used to calculate Sense and Write currents (see Tables 14 and 15), are for a 430 Ω resistance between Iref and GND. This resistance can be varied between 250 Ω and 1 kΩ, giving a ±2 × DAC modification range. For reasons of noise and stability, the voltage at the Iref pin should not be used in any other part of the circuit. 1998 Mar 17 Serial interface The 3 wire serial interface recognizes 8-bit addresses and 8-bit data. To read data from the status register, hex address FF must be transmitted. The IC will then respond with the contents of the 8-bit status register. 8 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... SDEN Philips Semiconductors QIC read-write amplifier andbook, full pagewidth 1998 Mar 17 WRITE SETTINGS SCLK SDIO A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 3-STATE 9 READ STATUS SDEN SCLK SDIO A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 ADDRESS AND DATA FROM MICROCONTROLLER D6 D5 D4 D3 D2 DATA FROM IC D1 D0 3-STATE MGG661 Preliminary specification TZA1000 Fig.3 Timing diagrams. D7 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 CONTROL REGISTER The control register contains six 8-bit entries configured as shown in Table 1. Table 1 Control register settings ADDRESS D7 D6 D5 D4 D3 D2 D1 D0 0 − FC1 FC0 ENFB1 ENFB0 ENS ENRD ENREF 1 HSM DIFF AI1 AI0 FBI1 FBI0 PG1 PG0 2 − − G6DB GFXD G3 G2 G1 G0 3 − − − B4 B3 B2 B1 B0 4 WDM W6 W5 W4 W3 W2 W1 W0 5 SDB S6 S5 S4 S3 S2 S1 S0 Control bits Control bit functions are detailed in Tables 2 to 17. Table 2 HPF and LPF cut-off frequency Table 3 FC1 FC0 FREQUENCY 0 0 1 MHz 0 1 2 MHz 1 0 4 MHz 1 1 10 MHz Bias current settings; note 1 ENFB1 ENFB0 BIAS CIRCUIT Ibias(min) Ibias(max) 0 0 off 0 0 0 1 on −10 mA +10 mA 1 0 on 0 +10 mA 1 1 on −10 mA +20 mA Note 1. Control bits B0 to B4 make up a 5-bit number between 0 and 31. The DC bias voltage between BIASA and BIASB (pins 23 and 24) is B × 45 mV. BIASA is positive with respect to BIASB. Table 4 Sense current circuit Table 6 Internal reference voltages ENS SENSE CURRENT CIRCUIT ENREF INTERNAL REF. VOLTAGES 0 disabled 0 disabled 1 enabled 1 enabled Table 5 Read circuits (excluding preamplifiers) Table 7 HOLD pin function ENRD READ CIRCUITS HSM 0 disabled 0 AGC hold on or off 1 enabled 1 select servo or data preamplifier 1998 Mar 17 10 FUNCTION Philips Semiconductors Preliminary specification QIC read-write amplifier Table 8 TZA1000 HPF circuit Table 9 DIFF HPF CIRCUIT 0 bypassed 1 on Variable gain circuit input select HSM HOLD AI1 AI0 INPUT 0 X 0 0 servo preamplifier 0 X 0 1 preamplifier 0 X 1 0 bias output −10 dB 0 X 1 1 bias output −4 dB 1 1 0 0 servo preamplifier 1 1 0 1 preamplifier 1 1 1 0 bias output −10 dB 1 1 1 1 bias output −4 dB 1 0 X X servo preamplifier Table 10 Bias circuit input Table 11 Preamplifier gain FBI1 FBI0 INPUT PG1 PG0 GAIN 0 0 no signal 0 0 0 0 1 preamplifier 0 1 34 dB 1 0 test generator 1 0 4 dB 1 1 preamplifier 1 1 40 dB Table 12 AGC setting HSM HOLD GFXD AGC 0 1 0 on 0 0 0 frozen at last value 1 1 0 on 1 0 0 no AGC at servo mode: maximum gain X X 1 off, gain set by G0 to G3; note 1 Note 1. Control bits G0 to G3 make up a 4-bit number used to program the gain in 1 dB steps (from 4 to 19 dB if G6DB is 0, from 10 to 25 dB if G6DB is 1; see Table 13). Table 13 Variable gain circuit range select 1998 Mar 17 G6DB RANGE 0 4 to 19 dB 1 10 to 25 dB 11 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 Table 14 Write mode select; note 1 WDM EXPECTED INPUT SIGNAL FUNCTION 0 WDI on 1 WD bypassed Note 1. Control bits W0 to W6 make up a 7-bit number between 0 and 127. Write current is 125 × ( W + 1 ) -------------------------------------- mA (Rref = 430 Ω). 128 Table 15 Sense current range select; note 1 SDB CURRENT 0 0 to 15 mA 1 0 to 30 mA Note 15 × ( S + 1 ) 1. Control bits S0 to S6 make up a 7-bit number between 0 and 127. Sense current is --------------------------------- mA when SDB = 0 128 30 × ( S + 1 ) and --------------------------------- mA when SDB = 1 (Rref = 430 Ω). 128 Status A status byte, located at address FF, contains the following status bits: Table 16 Status byte settings ADDRESS D7 D6 D5 D4 D3 D2 D1 D0 FF AG3(1) AG2(1) AG1(1) AG0(1) DN(2) PF5(3) WUS(4) PF12(5) Notes 1. Actual gain. Allows the gain to be determined while the AGC is on. 2. This bit can be used for microcontroller gain control, with the AGC off (see Table 17). 3. Power failure detected on the +5 V supply (VDD1). 4. Write unsafe detected: head open or short circuited. 5. Power failure detected on the +12 V supply (VDD3). Table 17 Sense current range select. 1998 Mar 17 DN GAIN 0 can be increased 1 can be decreased 12 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDD1 read circuit supply voltage −0.3 +5.5 V VDD2 FB and write circuit supply voltage −0.3 +5.5 V VDD3 sense current circuit supply voltage −0.3 +13.2 V IDD1 read circuit supply current − 150 mA IDD2 FB and write circuit supply current − 35 mA IDD3 sense current circuit supply current − 35 mA II(n) input current on remaining pins −10 +10 mA Ptot maximum total power dissipation − 1000 mW Tamb ambient temperature 0 +70 °C Tj junction temperature 0 +135 °C Tstg storage temperature −50 +150 °C VES(HB) electrostatic handling: human body model note 2 −1000 +1000 V VES(MM) electrostatic handling: machine model note 3 −200 +200 V note 1 Notes 1. Maximum permissible ambient temperature is dependent on internal dissipation. Tj is the discriminating factor. Tj = (Rth(j-a) × Ptot) + Tamb, where Ptot is the total dissipation in the package. 2. Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor. 3. Equivalent to discharging a 200 pF capacitor through a 25 Ω series resistor and a 2.5 µH series inductance. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient in free air QUALITY SPECIFICATION In accordance with “SNW-FQ-611E ”. 1998 Mar 17 13 VALUE UNIT 66 K/W Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 CHARACTERISTICS VDD1 = VDD2 = 5 V ±5%; VDD3 = 12 V ±5%; Tamb = 25 °C ±5%; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDD1 read circuit supply voltage 4.5 5.0 5.5 V VDD2 FB and write circuit supply voltage 4.5 5.0 5.5 V VDD3 sense current circuit supply voltage 10.8 12.0 13.2 V IDD1 read circuit supply current IDD2 Rd Ibias = −10 to +10 mA − 31 − mA Wr Iwrite = 30 mA − 70 − mA max gain − 38 − mA − 36 − mA FB and write circuit supply current Rd Wr IDD3 sense current circuit supply current Isense = 16 mA 15.0 16.2 19.0 mA Vref reference voltage pin 20; IO = 0 to 3 mA 1.9 2.0 2.1 V I20 current on pin 20 (Vref) source − − 3.0 mA sink − − 50 µA V21 voltage at pin 21 (Iref) 1.2 1.3 1.4 V Iref reference current (pin 21) 1 3 5 mA PG1 = 1; PG0 = 1 37 38.6 41 dB PG1 = 0; PG0 = 1 32 32.7 34 dB PG1 = 1; PG0 = 0 3 4.1 6 dB Read section Gv(pa) preamplifier voltage gain Gv(agc) AGC amplifier voltage gain G6DB = 1; G = 15; note 1 23 24.4 26 dB ∆Gv(agc) AGC voltage gain control range note 2 − 22 − dB Gv(yoke) yoke amplifier voltage gain 19 21 23 dB fcoupling −3 dB AC coupling frequency input to output 2 5 10 kHz f−3dB(cutoff)(HPF) HPF −3 dB cut-off frequency f−3dB(cutoff)(LPF) Vn(i)(eq)(preamp) 1998 Mar 17 LPF −3 dB cut-off frequency equivalent input noise voltage: preamplifier FC1 = FC1 = 0 − 1.0 − MHz FC1 = 0; FC1 = 1 − 2.0 − MHz FC1 = 1; FC1 = 0 − 4.7 − MHz FC1 =FC1 = 1 − 10 − MHz FC1 = FC1 = 0 − 1.1 − MHz FC1 = 0; FC1 = 1 − 2 − MHz FC1 = 1; FC1 = 0 − 4.3 − MHz FC1 =FC1 = 1 − 11 − MHz Zsource = 0 Ω − 0.65 0.8 nV/√Hz 14 Philips Semiconductors Preliminary specification QIC read-write amplifier SYMBOL PARAMETER TZA1000 CONDITIONS Zi input impedance VI(6,7) DC input voltage; pins 6 and 7 THD total harmonic distortion Gv(servo) servo preamplifier voltage gain WX-WY to output Vn(i)(eq)(servo) equivalent input noise voltage: servo pre-amp VI(1,3)) DC input voltage pins 1 and 3 Isense sense current Rref = 430 Ω; S = 64; note 3 all conditions; note 4 MIN. 1 at 34 and 40 dB gain settings; Vo(p-p) = 1 V Zsource = 0 Ω TYP. 1.84 MAX. 4 UNIT kΩ 1.2 1.3 1.4 V − − −40 dB 62 66 70 dB − 1.8 2.8 nV/√Hz 2.4 2.5 2.6 V 14.6 15.2 15.8 mA Isense(max) maximum sense current 33 − − mA ∆VVDD3-ISENSE voltage difference between VDD3 and ISENSE (pins 9 and 8) 1.6 − 13.2 V RESDAC(SENSE) sense DAC resolution − 7 − bits Zo(sense) output impedance of sense current source 10 − − kΩ Gv(FB) FB amplifier voltage gain 11.5 13 14.5 dB B(-3dB) −3 dB bandwidth of FB amplifier − 5 − MHz fcoupling(FBamp) −3 dB AC coupling of FB amplifier − 3 − kHz Ibias bias current amplitude (peak-to-peak) ENFB1 = 0; ENFB0 = 1 −10 − +10 mA ENFB1 = 1; ENFB0 = 0 0 − +9 mA ENFB1 = ENFB0 = 1 −10 − +20 mA VO(23,24) DC voltage level of FB outputs (pins 23 and 24) B = 0; see Table 3 1.6 1.8 2.0 V ∆VBIASA-BIASB voltage difference between BIASA and BIASB (pins 23 and 24) at maximum DC bias voltage B = 31; see Table 3; bias load 88 Ω 1.4 1.52 1.6 V RESDAC(BIAS) bias DAC resolution − 5 − bits VO(18,19) read amplifier DC output voltage (pins 18 and 19) 2.4 2.5 2.6 V ∆VOO(18,19) read amplifier DC offset voltage (voltage change at pins 18 and 19) − − 100 mV Vo(rms)(18,19) output voltage (RMS value; pins 18 and 19) − − 0.5 V Io guaranteed output current 1.5 − − mA VO(AGCL) lower AGC detection voltage level at OUTB 2.15 2.2 2.25 V VO(AGCH) upper AGC detection voltage level at OUTB 2.75 2.8 2.85 V 1998 Mar 17 f = 1 kHz; Io(sen) = 16 mA 15 Philips Semiconductors Preliminary specification QIC read-write amplifier SYMBOL PARAMETER TZA1000 CONDITIONS Vhys(AGC) hysteresis in AGC detection level BAGC AGC bandwidth fclk operational clock note 5 Iwrite write current Iwrite(max) MIN. TYP. MAX. UNIT 65 75 85 mV − 1.5 − MHz 0 24 24 MHz Rhead = 10 Ω; Rref = 430Ω; 0-peak; W = 32; note 6 27.3 28.8 30.3 mA maximum write current Rhead = 10 Ω; note 7 60 80 − mA ∆Iwrite difference between positive and negative write currents Iwrite = 30 mA; − 0 5 % tt(iwrite)(Rload) write current transition time note 8 Write section resistive load resistive load, 10 Ω − 4 − ns head load Rhead = 10 Ω; Lhead = 200 nH − 6 12 ns Vo(p-p)(1,3) output voltage swing (peak-to-peak value) 3 − − V tR-W read to write time − 0.2 − µs tW-R write to read time − 10 − µs ∆tWD WD pulse asymmetry − 0 1 ns tWDIH WDI pulse time HIGH 5 − − ns tWDIL WDI pulse time LOW 5 − − ns Rdet(WUS) WUS detection resistance level short circuited to VDD or − VSS; Iwrite = 30 mA − 10 Ω open; Iwrite = 30 mA − − Ω in WDI mode; note 9 150 Notes 1. G is a 4-bit number contained in control bits G0 to G3 (see Table 12). 2. 6 dB step via a fixed setting, and 16 dB (in 1 dB steps) via AGC control. 3. S is a 7-bit number contained in control bits S0 to S6 (see Table 15). 4. The TZA1000 is guaranteed to operate reliably with sense currents of up to 33 mA. 5. The operational clock frequency (pin 15) must be >16 times higher the SCLK frequency to ensure reliable serial transfer. 6. W is a 7-bit number contained in control bits W0 to W6 (see Table 14). A more accurate calculation of the write current would be given by: Ic = It − 0.003 × It2, where It = 125 (W + 1) / 128, It the target current and Ic the write current. 7. The TZA1000 is guaranteed to supply a write current of up to 60 mA. 8. 10 to 90% of a total current reversal. 9. Difference between negative-to-positive and positive-to-negative current slopes. 1998 Mar 17 16 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 EQUIVALENT PIN CIRCUITS PIN 1 DESCRIPTION EQUIVALENT PIN CIRCUIT write output stage VDD 1 WX MGG662 3 write output stage VDD 3 WY MGG663 1,3,20 servo input configuration WX 1 3 700 Ω 700 Ω 2.5 V Vref 20 6,7,20 WY MGG664 input configuration INA 6 7 INB 5 kΩ 5 kΩ 1.4 V Vref 20 MGG665 8 sense output configuration 12 V 50 Ω 8 MGG666 1998 Mar 17 17 ISENSE Philips Semiconductors Preliminary specification QIC read-write amplifier PIN 10 TZA1000 DESCRIPTION EQUIVALENT PIN CIRCUIT digital input configuration VDD SCLK 10 MGG667 11 digital input configuration VDD SDEN 11 MGG668 13 digital input configuration VDD HOLD 13 MGG669 14 digital input configuration VDD WGATE 14 MGG670 15 digital input configuration VDD CLK 15 MGG671 1998 Mar 17 18 Philips Semiconductors Preliminary specification QIC read-write amplifier PIN 18 TZA1000 DESCRIPTION EQUIVALENT PIN CIRCUIT output configuration VDD 25 Ω 18 OUTB 2.3 mA DC: 2.5 V MGG672 19 output configuration VDD 25 Ω 19 OUTA 2.3 mA DC: 2.5 V MGG673 20 Vref output configuration VDD 50 Ω 20 Vref 6 kΩ MGG674 22 reset output configuration VDD 22 RESET 18 kΩ MGG675 1998 Mar 17 19 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 PACKAGE OUTLINE SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 D E A X c HE y v M A Z 13 24 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.61 0.60 0.30 0.29 0.050 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT137-1 075E05 MS-013AD 1998 Mar 17 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-01-24 97-05-22 20 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 SOLDERING Wave soldering Introduction Wave soldering techniques can be used for all SO packages if the following conditions are observed: There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. • The longitudinal axis of the package footprint must be parallel to the solder flow. • The package footprint must incorporate solder thieves at the downstream end. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Reflow soldering Reflow soldering techniques are suitable for all SO packages. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. 1998 Mar 17 21 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Mar 17 22 Philips Semiconductors Preliminary specification QIC read-write amplifier TZA1000 NOTES 1998 Mar 17 23 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com © Philips Electronics N.V. 1998 SCA57 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 545102/00/02/pp24 Date of release: 1998 Mar 17 Document order number: 9397 750 03524