PHILIPS 74LVC3GU04

74LVC3GU04
Triple inverter
Rev. 03 — 01 February 2005
Product data sheet
1. General description
The 74LVC3GU04 is a high-performance, low-power, low-voltage, Si-gate CMOS device
superior to most advanced CMOS compatible TTL families.
Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these
devices in a mixed 3.3 V and 5 V environment.
The 74LVC3GU04 provides three inverters. Each inverter is a single stage with unbuffered
output.
2. Features
■
■
■
■
■
■
■
■
■
■
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
◆ JESD8-7 (1.65 V to 1.95 V)
◆ JESD8-5 (2.3 V to 2.7 V)
◆ JESD8-B/JESD36 (2.7 V to 3.6 V).
ESD protection:
◆ HBM EIA/JESD22-A114-B exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V.
±24 mA output drive at VCC = 3.0 V
CMOS low power consumption
Latch-up performance exceeds 250 mA
Multiple package options
Specified from −40 °C to +85 °C and from −40 °C to +125 °C.
74LVC3GU04
Philips Semiconductors
Triple inverter
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; Tamb = 25 °C.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
-
2.3
-
ns
CL = 30 pF; RL = 500 Ω;
VCC = 2.5 V
-
1.8
-
ns
CL = 50 pF; RL = 500 Ω;
VCC = 2.7 V
-
2.6
-
ns
CL = 50 pF; RL = 500 Ω;
VCC = 3.3 V
-
2.3
-
ns
CL = 50 pF; RL = 500 Ω;
VCC = 5.0 V
-
1.7
-
ns
-
5
-
pF
-
7
-
pF
CL = 30 pF; RL = 1 kΩ;
tPHL, tPLH propagation delay
inputs nA to outputs nY VCC = 1.8 V
input capacitance
CI
power dissipation
capacitance per gate
CPD
[1] [2]
VCC = 3.3 V
[1]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
[2]
The condition is VI = GND to VCC.
4. Ordering information
Table 2:
Ordering information
Type number
Package
Name
Description
Version
74LVC3GU04DP −40 °C to +125 °C
Temperature range
TSSOP8
plastic thin shrink small outline package; 8 leads; body
width 3 mm; lead length 0.5 mm
SOT505-2
74LVC3GU04DC −40 °C to +125 °C
VSSOP8
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
SOT765-1
74LVC3GU04GT −40 °C to +125 °C
XSON8
plastic extremely thin small outline package; no leads;
8 terminals; body 1 × 1.95 × 0.5 mm
SOT833-1
5. Marking
Table 3:
Marking codes
Type number
Marking code
74LVC3GU04DP
VU04
74LVC3GU04DC
VU4
74LVC3GU04GT
VU4
9397 750 14546
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 01 February 2005
2 of 16
74LVC3GU04
Philips Semiconductors
Triple inverter
6. Functional diagram
1
1A
1Y
7
3
2A
2Y
5
6
3A
3Y
2
1
1
7
3
1
5
6
1
2
mna720
mna721
Fig 1. Logic symbol
Fig 2. IEC logic symbol
VCC
100 Ω
A
VCC
Y
mna636
Fig 3. Logic diagram (one gate)
7. Pinning information
7.1 Pinning
U04
1A
1
3Y
2
2A
3
GND
4
U04
8
VCC
7
1Y
6
3A
5
2Y
1A
1
8
VCC
3Y
2
7
1Y
2A
3
6
3A
GND
4
5
2Y
mnb120
001aac021
Transparent top view
Fig 4. Pin configuration TSSOP8 and
VSSOP8
9397 750 14546
Product data sheet
Fig 5. Pin configuration XSON8
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 01 February 2005
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74LVC3GU04
Philips Semiconductors
Triple inverter
7.2 Pin description
Table 4:
Pin description
Symbol
Pin
Description
1A
1
data input
3Y
2
data output
2A
3
data input
GND
4
ground (0 V)
2Y
5
data output
3A
6
data input
1Y
7
data output
VCC
8
supply voltage
8. Functional description
8.1 Function table
Table 5:
Function table [1]
Input nA
Output nY
L
H
H
L
[1]
H = HIGH voltage level;
L = LOW voltage level.
9. Limiting values
Table 6:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
VI
Conditions
input voltage
[1]
[1]
Max
Unit
−0.5
+6.5
V
−0.5
+6.5
V
VO
output voltage
active mode
−0.5
VCC + 0.5
V
IIK
input diode current
VI < 0 V
-
−50
mA
IOK
output diode current
VO > VCC or VO < 0 V
-
±50
mA
IO
output source or sink
current
VO = 0 V to VCC
-
±50
mA
-
±100
mA
−65
+150
°C
-
300
mW
ICC, IGND VCC or GND current
Tstg
storage temperature
Ptot
power dissipation
[1]
Tamb = −40 °C to +125 °C
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
9397 750 14546
Product data sheet
Min
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 01 February 2005
4 of 16
74LVC3GU04
Philips Semiconductors
Triple inverter
10. Recommended operating conditions
Table 7:
Recommended operating conditions
Symbol
Parameter
VCC
Conditions
Min
Typ
Max
Unit
supply voltage
1.65
-
5.5
V
VI
input voltage
0
-
5.5
V
VO
output voltage
active mode
0
-
VCC
V
Power-down mode;
VCC = 0 V
0
-
5.5
V
−40
-
+125
°C
Tamb
ambient temperature
tr, tf
input rise and fall times VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 5.5 V
0
-
20
ns/V
0
-
10
ns/V
11. Static characteristics
Table 8:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Tamb = −40 °C to +85
Conditions
Min
Typ
Max
Unit
V
°C [1]
VIH
HIGH-level input voltage
VCC = 1.65 V to 5.5 V
0.75 × VCC -
-
VIL
LOW-level input voltage
VCC = 1.65 V to 5.5 V
-
-
0.25 × VCC V
VOH
HIGH-level output voltage
VI = VIH or VIL
IO = −100 µA;
VCC = 1.65 V to 5.5 V
VCC − 0.1
-
-
V
IO = −4 mA; VCC = 1.65 V
1.2
-
-
V
IO = −8 mA; VCC = 2.3 V
1.9
-
-
V
IO = −12 mA; VCC = 2.7 V
2.2
-
-
V
IO = −24 mA; VCC = 3.0 V
2.3
-
-
V
IO = −32 mA; VCC = 4.5 V
3.8
-
-
V
IO = 100 µA;
VCC = 1.65 V to 5.5 V
-
-
0.1
V
IO = 4 mA; VCC = 1.65 V
-
-
0.45
V
IO = 8 mA; VCC = 2.3 V
-
-
0.3
V
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 12 mA; VCC = 2.7 V
-
-
0.4
V
IO = 24 mA; VCC = 3.0 V
-
-
0.55
V
IO = 32 mA; VCC = 4.5 V
-
-
0.55
V
ILI
input leakage current
VI = 5.5 V or GND;
VCC = 5.5 V
-
±0.1
±5
µA
ICC
quiescent supply current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
0.1
10
µA
CI
input capacitance
-
5
-
pF
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Product data sheet
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Rev. 03 — 01 February 2005
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74LVC3GU04
Philips Semiconductors
Triple inverter
Table 8:
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +125 °C
VIH
HIGH-level input voltage
VCC = 1.65 V to 5.5 V
0.8 × VCC
-
-
V
VIL
LOW-level input voltage
VCC = 1.65 V to 5.5 V
-
-
0.2 × VCC
V
VOH
HIGH-level output voltage
VI = VIH or VIL
VCC − 0.1
-
-
V
IO = −100 µA;
VCC = 1.65 V to 5.5 V
LOW-level output voltage
VOL
IO = −4 mA; VCC = 1.65 V
0.95
-
-
V
IO = −8 mA; VCC = 2.3 V
1.7
-
-
V
IO = −12 mA; VCC = 2.7 V
1.9
-
-
V
IO = −24 mA; VCC = 3.0 V
2.0
-
-
V
IO = −32 mA; VCC = 4.5 V
3.4
-
-
V
IO = 100 µA;
VCC = 1.65 V to 5.5 V
-
-
0.1
V
VI = VIH or VIL
IO = 4 mA; VCC = 1.65 V
-
-
0.70
V
IO = 8 mA; VCC = 2.3 V
-
-
0.45
V
IO = 12 mA; VCC = 2.7 V
-
-
0.60
V
IO = 24 mA; VCC = 3.0 V
-
-
0.80
V
-
-
0.80
V
ILI
input leakage current
VI = 5.5 V or GND;
VCC = 5.5 V
IO = 32 mA; VCC = 4.5 V
-
-
±20
µA
ICC
quiescent supply current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
40
µA
[1]
All typical values are measured at Tamb = 25 °C.
12. Dynamic characteristics
Table 9:
Dynamic characteristics
GND = 0 V; for test circuit see Figure 7.
Symbol
Parameter
Tamb = −40 °C to +85
tPHL, tPLH
Conditions
Min
propagation delay
nA to nY
power dissipation
capacitance per gate
Unit
VCC = 1.65 V to 1.95 V
0.5
2.3
5.0
ns
VCC = 2.3 V to 2.7 V
0.3
1.8
4.0
ns
VCC = 2.7 V
0.3
2.6
4.5
ns
VCC = 3.0 V to 3.6 V
0.3
2.3
3.7
ns
0.3
1.7
3.0
ns
-
7
-
pF
VCC = 3.3 V
9397 750 14546
Product data sheet
Max
see Figure 6
VCC = 4.5 V to 5.5 V
CPD
Typ
°C [1]
[2] [3]
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 01 February 2005
6 of 16
74LVC3GU04
Philips Semiconductors
Triple inverter
Table 9:
Dynamic characteristics …continued
GND = 0 V; for test circuit see Figure 7.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +125 °C
tPHL, tPLH
propagation delay
nA to nY
see Figure 6
VCC = 1.65 V to 1.95 V
0.5
-
6.3
ns
VCC = 2.3 V to 2.7 V
0.3
-
4.0
ns
VCC = 2.7 V
0.3
-
5.6
ns
VCC = 3.0 V to 3.6 V
0.3
-
4.5
ns
VCC = 4.5 V to 5.5 V
0.3
-
3.8
ns
[1]
All typical values are measured at nominal VCC and Tamb = 25 °C.
[2]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
[3]
The condition is VI = GND to VCC.
13. Waveforms
VI
VM
nA input
GND
t PHL
t PLH
VOH
VM
nY output
VOL
mna344
Measurement points are given in Table 10.
VOL and VOH are typical output voltage drop that occur with the output load.
Fig 6. The input (nA) to output (nY) propagation delays
Table 10:
Measurement points
Supply voltage
Input
Output
VCC
VM
VM
1.65 V to 1.95 V
0.5 × VCC
0.5 × VCC
2.3 V to 2.7 V
0.5 × VCC
0.5 × VCC
2.7 V
1.5 V
1.5 V
3.0 V to 3.6 V
1.5 V
1.5 V
4.5 V to 5.5 V
0.5 × VCC
0.5 × VCC
9397 750 14546
Product data sheet
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Rev. 03 — 01 February 2005
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74LVC3GU04
Philips Semiconductors
Triple inverter
VEXT
VCC
PULSE
GENERATOR
VI
RL
VO
D.U.T.
CL
RT
RL
mna616
Test data is given in Table 11.
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse
generator.
Fig 7. Load circuitry for switching times
Table 11:
Test data
Supply voltage
Input
Load
VCC
VI
tr, tf
CL
RL
tPLH, tPHL
1.65 V to 1.95 V
VCC
≤ 2.0 ns
30 pF
1 kΩ
open
2.3 V to 2.7 V
VCC
≤ 2.0 ns
30 pF
500 Ω
open
2.7 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
3.0 V to 3.6 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
4.5 V to 5.5 V
VCC
≤ 2.5 ns
50 pF
500 Ω
open
9397 750 14546
Product data sheet
VEXT
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 01 February 2005
8 of 16
74LVC3GU04
Philips Semiconductors
Triple inverter
14. Additional characteristics
Rbias = 560 kΩ
VCC
0.47 µF
input
output
VI
(f = 1 kHz)
100 µF
A IO
GND
mna050
∆I
g fs = --------o∆V i
VO is constant.
Fig 8. Test set-up for measuring forward transconductance
mnb108
160
gfs
(mA/V)
120
80
40
0
0
1
2
3
4
5
6
VCC (V)
Tamb = 25 °C.
Fig 9. Typical forward transconductance as a function of supply voltage
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Product data sheet
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Rev. 03 — 01 February 2005
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74LVC3GU04
Philips Semiconductors
Triple inverter
15. Application information
Some applications for the 74LVC3GU04 are:
• Linear amplifier (see Figure 10)
• Crystal oscillator (see Figure 11).
Remark: All values given are typical values unless otherwise specified.
R2
VCC
1 µF
R1
U04
ZL
mna052
ZL > 10 kΩ.
R1 ≥ 3 kΩ.
R2 ≤ 1 MΩ.
Open loop amplification: AOL = 20.
A OL
R1
1 + ------- ( 1 + A OL )
R2
Voltage amplification: A V = – ----------------------------------------- .
Vo(p-p) = VCC − 1.5 V centered at 0.5 × VCC.
Unity gain bandwidth product is 5 MHz.
Fig 10. Linear amplifier application
R1
R2
U04
C1
C2
out
mna053
C1 = 47 pF.
C2 = 22 pF.
R1 = 1 MΩ to 10 MΩ.
R2 optimum value depends on the frequency and required stability against changes in VCC or
average minimum ICC (ICC = 2 mA at VCC = 3.3 V and f = 10 MHz).
Fig 11. Crystal oscillator application
9397 750 14546
Product data sheet
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Rev. 03 — 01 February 2005
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74LVC3GU04
Philips Semiconductors
Triple inverter
16. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
D
E
A
SOT505-2
X
c
HE
y
v M A
Z
5
8
A
A2
(A3)
A1
pin 1 index
θ
Lp
L
1
4
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(1)
e
HE
L
Lp
v
w
y
Z(1)
θ
mm
1.1
0.15
0.00
0.95
0.75
0.25
0.38
0.22
0.18
0.08
3.1
2.9
3.1
2.9
0.65
4.1
3.9
0.5
0.47
0.33
0.2
0.13
0.1
0.70
0.35
8°
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
SOT505-2
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
02-01-16
---
Fig 12. Package outline SOT505-2 (TSSOP8)
9397 750 14546
Product data sheet
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Rev. 03 — 01 February 2005
11 of 16
74LVC3GU04
Philips Semiconductors
Triple inverter
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
D
E
SOT765-1
A
X
c
y
HE
v M A
Z
5
8
Q
A
A2
A1
pin 1 index
(A3)
θ
Lp
1
4
e
L
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(2)
e
HE
L
Lp
Q
v
w
y
Z(1)
θ
mm
1
0.15
0.00
0.85
0.60
0.12
0.27
0.17
0.23
0.08
2.1
1.9
2.4
2.2
0.5
3.2
3.0
0.4
0.40
0.15
0.21
0.19
0.2
0.13
0.1
0.4
0.1
8°
0°
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT765-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
02-06-07
MO-187
Fig 13. Package outline SOT765-1 (VSSOP8)
9397 750 14546
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 01 February 2005
12 of 16
74LVC3GU04
Philips Semiconductors
Triple inverter
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
1
2
SOT833-1
b
4
3
4×
(2)
L
L1
e
8
7
6
e1
5
e1
e1
8×
A
(2)
A1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A (1)
max
A1
max
b
D
E
e
e1
L
L1
mm
0.5
0.04
0.25
0.17
2.0
1.9
1.05
0.95
0.6
0.5
0.35
0.27
0.40
0.32
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT833-1
---
MO-252
---
EUROPEAN
PROJECTION
ISSUE DATE
04-07-22
04-11-09
Fig 14. Package outline SOT833-1 (XSON8)
9397 750 14546
Product data sheet
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Rev. 03 — 01 February 2005
13 of 16
74LVC3GU04
Philips Semiconductors
Triple inverter
17. Revision history
Table 12:
Revision history
Document ID
Release date
Data sheet status
Change notice
Doc. number
Supersedes
74LVC3GU04_3
20050201
Product data sheet
-
9397 750 14546
74LVC3GU04_2
Modifications:
•
Changed: type number 74LVC3GU04GT.
74LVC3GU04_2
20041027
Product data sheet
-
9397 750 13795
74LVC3GU04_1
74LVC3GU04_1
20040512
Product data sheet
-
9397 750 13191
-
9397 750 14546
Product data sheet
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Rev. 03 — 01 February 2005
14 of 16
74LVC3GU04
Philips Semiconductors
Triple inverter
18. Data sheet status
Level
Data sheet status [1]
Product status [2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
[2]
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
19. Definitions
20. Disclaimers
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
21. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: [email protected]
9397 750 14546
Product data sheet
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Rev. 03 — 01 February 2005
15 of 16
74LVC3GU04
Philips Semiconductors
Triple inverter
22. Contents
1
2
3
4
5
6
7
7.1
7.2
8
8.1
9
10
11
12
13
14
15
16
17
18
19
20
21
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 4
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Additional characteristics . . . . . . . . . . . . . . . . . 9
Application information. . . . . . . . . . . . . . . . . . 10
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 15
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information . . . . . . . . . . . . . . . . . . . . 15
© Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 01 February 2005
Document number: 9397 750 14546
Published in The Netherlands