INTEGRATED CIRCUITS 74ABT648 Octal transceiver/register, inverting (3-State) Product specification Supersedes data of 1995 Apr 17 IC23 Data Handbook 1998 Jun 08 Philips Semiconductors Product specification Octal bus transceiver/register, inverting (3-State) 74ABT648 The 74ABT648 transceiver/register consists of bus transceiver circuits with inverting 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (OE) and DIR pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both. FEATURES • Combines 74ABT245 and 74ABT374 type functions in one device • Independent registers for A and B buses • Multiplexed real-time and stored data • Output capability: +64mA/–32mA • Power-up 3-state • Power-up reset • Live insertion/extraction permitted • Latch-up protection exceeds 500mA per Jedec Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 The Select (SAB, SBA) pins determine whether data is stored or transferred through the device in real–time. The DIR determines which bus will receive data when the OE is active (Low). In the isolation mode (OE = High), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register. Outputs from real-time, or stored registers will be inverted. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B may be driven at a time. The examples on the next page demonstrate the four fundamental bus management functions that can be performed with the 74ABT648. and 200 V per Machine Model DESCRIPTION The 74ABT648 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 5.9 ns tPLH tPHL Propagation delay An to Bn or Bn to An CL = 50pF; VCC = 5V CIN Input capacitance CP, S, OE, DIR VI = 0V or VCC 4 pF CI/O I/O capacitance Outputs disabled; VO = 0V or VCC 7 pF ICCZ Total supply current Outputs disabled; VCC =5.5V 110 µA ORDERING INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 24-Pin Plastic DIP PACKAGES –40°C to +85°C 74ABT648 N 74ABT648 N SOT222-1 24-Pin plastic SO –40°C to +85°C 74ABT648 D 74ABT648 D SOT137-1 24-Pin Plastic SSOP Type II –40°C to +85°C 74ABT648 DB 74ABT648 DB SOT340-1 24-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT648 PW 74ABT648PW DH SOT355-1 PIN CONFIGURATION PIN DESCRIPTION CPAB 1 24 VCC SAB 2 23 CPBA DIR 3 22 SBA A0 4 21 OE A1 5 20 B0 A2 6 19 B1 A3 7 18 B2 A4 8 17 B3 A5 9 16 B4 A6 10 15 B5 A7 11 14 B6 GND 12 13 B7 PIN NUMBER SYMBOL 1, 23 CPAB / CPBA 2, 22 SAB / SBA FUNCTION A to B clock input / B to A clock input A to B select input / B to A select input 3 DIR 4, 5, 6, 7, 8, 9, 10, 11 Direction control input A0 – A7 Data inputs/outputs (A side) 20, 19, 18, 17, 16, 15, 14, 13 B0 – B7 Data inputs/outputs (B side) 21 OE 12 GND Ground (0V) 24 VCC Positive supply voltage Output enable input (active-Low) SA00082 1998 Jun 08 2 853–1613 19516 Philips Semiconductors Product specification Octal bus transceiver/register, inverting (3-State) LOGIC SYMBOL 74ABT648 LOGIC SYMBOL (IEEE/IEC) 21 4 5 6 7 8 9 10 G3 11 3EN1 [BA] 3 A0 A1 1 CPAB 2 SAB 3 DIR 23 CPBA 22 SBA 21 OE B0 20 A2 A3 A4 A5 A6 A7 3EN2 [AB] 22 G6 2 G7 23 C4 1 C5 4 ≥1 ∇1 6 4D 20 6 1 B1 19 B2 18 B3 17 B4 16 B5 15 B6 14 5D 7 1 7 ≥1 2∇ B7 13 SA00083 5 19 6 18 7 17 8 16 9 15 10 14 11 13 SA00156 REAL TIME BUS TRANSFER BUS B TO BUS A REAL TIME BUS TRANSFER BUS A TO BUS B L 1998 Jun 08 X X X L OE L DIR CPAB CPBA SAB SBA H X X L OE X 3 } DIR CPAB CPBA SAB SBA TRANSFER STORED DATA TO A OR B } L } } OE STORAGE FROM A, B, OR A AND B DIR CPAB CPBA SAB SBA OE DIR CPAB CPBA SAB SBA L H ↑ X L X L L H H or L X L X X ↑ X X L H H or L X H H X ↑ ↑ X X H X SA00177 Philips Semiconductors Product specification Octal bus transceiver/register, inverting (3-State) 74ABT648 FUNCTION TABLE INPUTS OPERATING MODE DIR CPAB CPBA SAB SBA An Bn X X ↑ X X X Input Unspecified output* Store A, B unspecified X X X ↑ X X Unspecified output* Input Store B, A unspecified H H X X ↑ H or L ↑ H or L X X X X Input Input Store A and B data Isolation, hold storage L L L L X X X H or L X X L H Output Input Real time B data to A bus Stored B data to A bus L L H L X ↑ * DATA I/O OE = = = = H X X L X Real time A data to B bus Input Output H H or L X H X Stored A data to B bus High voltage level Low voltage level Don’t care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the OE input. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock. LOGIC DIAGRAM OE 21 3 DIR CPBA SBA 23 22 1 CPAB 2 SAB 1of 8 Channels 1D C1 Q A0 4 20 B0 1D C1 Q A1 A2 A3 A4 A5 A6 A7 5 19 6 18 7 17 8 DETAIL A X 7 16 9 15 10 14 11 13 B1 B2 B3 B4 B5 B6 B7 SA00081 1998 Jun 08 4 Philips Semiconductors Product specification Octal bus transceiver/register, inverting (3-State) 74ABT648 ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC IIK CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA output in Off or High state –0.5 to +5.5 V output in Low state 128 mA –65 to 150 °C DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT DC output current Tstg Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER LIMITS DC supply voltage UNIT Min Max 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level Input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 10 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range 1998 Jun 08 2.0 5 V Philips Semiconductors Product specification Octal bus transceiver/register, inverting (3-State) 74ABT648 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Min VIK VOH I Input clamp voltage High-level output voltage Tamb = –40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = –18mA Typ Max –0.9 –1.2 Min UNIT Max –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 3.2 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.7 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.3 2.0 V VRST Power-up output low voltage3 VCC = 5.5V; IO = 1mA; VI = GND or VCC 0.13 0.55 0.55 V VOL Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V I Power-off leakage current VCC = 0.0V; VI or VO ≤ 4.5V ±5.0 ±100 ±100 µA Power–up/down 3-State output current4 VCC = 2.1V; VO = 0.5V; VI = GND or VCC; VOE = Don’t care ±5.0 ±50 ±50 µA Input leakage Control pins VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA current Data pins VCC = 5.5V; VI = GND or 5.5V ±5 ±100 ±100 µA OFF I PU/ PD II IIH + IOZH 3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH 5.0 50 50 µA IIL + IOZL 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH –5.0 –50 –50 µA Output high leakage current VCC = 5.5V; VO = 5.5 V; VI = GND or VCC 5.0 50 50 µA Output current1 VCC = 5.5V; VO = 2.5V –65 –180 –180 mA VCC = 5.5V; Outputs High, VI = GND or VCC 110 250 250 µA VCC = 5.5V; Outputs Low, VI = GND or VCC 20 30 30 mA VCC = 5.5V; Outputs 3-State; VI = GND or VCC 110 250 250 µA VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND; VCC = 5.5V 0.3 1.5 1.5 mA I CEX IO ICCH ICCL Quiescent supply current ICCZ ∆ICC Additional supply current per input pin2 –50 –50 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1 to VCC = 5V ± 10% a transition time of up to 100µsec is permitted. 1998 Jun 08 6 Philips Semiconductors Product specification Octal bus transceiver/register, inverting (3-State) 74ABT648 AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = -40 to +85oC VCC = +5.0V ±0.5V Tamb = +25oC VCC = +5.0V WAVEFORM Min Typ Max Min UNIT Max fMAX Maximum clock frequency 1 125 200 tPLH tPHL Propagation delay CPAB to Bn or CPBA to An 1 2.2 1.7 5.3 5.9 6.8 7.4 125 2.2 1.7 7.8 8.4 MHz ns tPLH tPHL Propagation delay An to Bn or Bn to An 2 3 1.0 1.5 3.6 4.2 5.1 5.6 1.0 1.5 6.1 6.3 ns tPLH tPHL Propagation delay SAB to Bn or SBA to An 2 3 1.5 1.5 4.9 5.4 6.1 6.9 1.5 1.5 7.1 7.7 ns tPZH tPZL Output enable time OE to An or Bn 5 6 1.0 2.1 4.3 5.5 5.3 7.4 1.0 2.1 6.3 8.8 ns tPHZ tPLZ Output disable time OE to An or Bn 5 6 1.5 1.5 6.2 6.0 7.3 7.0 1.5 1.5 8.3 7.5 ns tPZH tPZL Output enable time DIR to An or Bn 5 6 1.2 2.5 4.8 6.0 5.7 9.0 1.2 2.5 6.7 9.5 ns tPHZ tPLZ Output disable time DIR to An or Bn 5 6 1.5 1.5 5.9 6.3 6.7 7.2 1.5 1.5 7.7 8.2 ns AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM +25oC Tamb = VCC = +5.0V Tamb = -40 to +85oC VCC = +5.0V ±0.5V Min Typ Min UNIT ts(H) ts(L) Setup time An to CPAB, Bn to CPBA 4 3.0 3.0 1.5 1.0 3.0 3.0 ns th(H) th(L) Hold time An to CPAB, Bn to CPBA 4 0.0 0.0 –0.4 –1.0 0.0 0.0 ns tw(H) tw(L) Pulse width, High or Low CPAB or CPBA 1 3.5 4.0 2.6 1.0 3.5 4.0 ns 1998 Jun 08 7 Philips Semiconductors Product specification Octal bus transceiver/register, inverting (3-State) 74ABT648 AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V 1/fMAX CPBA or CPAB SBA or SAB VM VM tw(H) An or Bn VM VM tPLH tw(L) tPHL An or Bn VM tPLH VM tPHL An or Bn VM An or Bn VM VM SA00087 SA00088 Waveform 2. Propagation Delay, SAB to Bn or SBA to An Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency An or Bn An or Bn SBA or SAB VM VM tPHL VM VM ts(H) tPLH An or Bn VM VM ts(L) th(H) th(L) tW(L) CPBA or CPAB Bn or An VM ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ VM VM VM NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. SA00178 SA00090 Waveform 3. Propagation Delay, An to Bn or Bn to An and SBA to An or SAB to Bn Waveform 4. Data Setup and Hold Times OE OE VM VM VM DIR tPZH An or Bn tPZL tPHZ VM VM DIR VOH –0.3V An or Bn 0V tPLZ VM VOL +0.3V 0V SA00180 SA00179 Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level 1998 Jun 08 8 Philips Semiconductors Product specification Octal bus transceiver/register, inverting (3-State) TEST CIRCUIT AND WAVEFORM 7V 500 Ω From Output Under Test S1 Open GND 500 Ω CL = 50 pF Load Circuit TEST S1 tpd open tPLZ/tPZL 7V tPHZ/tPZH open DEFINITIONS Load capacitance includes jig and probe capacitance; CL = see AC CHARACTERISTICS for value. SA00012 1998 Jun 08 9 74ABT648 Philips Semiconductors Product specification Octal bus transceiver/register, inverting (3-State) DIP24: plastic dual in-line package; 24 leads (300 mil) 1998 Jun 08 10 74ABT648 SOT222-1 Philips Semiconductors Product specification Octal bus transceiver/register, inverting (3-State) SO24: plastic small outline package; 24 leads; body width 7.5 mm 1998 Jun 08 11 74ABT648 SOT137-1 Philips Semiconductors Product specification Octal bus transceiver/register, inverting (3-State) SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm 1998 Jun 08 12 74ABT648 SOT340-1 Philips Semiconductors Product specification Octal bus transceiver/register, inverting (3-State) TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm 1998 Jun 08 13 74ABT648 SOT355-1 Philips Semiconductors Product specification Octal transceiver/register, inverting (3-State) 74ABT648 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 14 Date of release: 06-98 9397-750-04022