PHILIPS TDA4864J

INTEGRATED CIRCUITS
DATA SHEET
TDA4864J; TDA4864AJ
Vertical deflection booster
Product specification
2003 Oct 31
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
FEATURES
GENERAL DESCRIPTION
• Power amplifier with differential inputs
The TDA4864J and TDA4864AJ are deflection boosters
for use in vertical deflection systems for frame frequencies
up to 200 Hz.
• Output current up to 2.5 A (p-p)
• High vertical deflection frequency up to 200 Hz
The TDA4864J needs a separate flyback supply voltage,
so the supply voltages are independently adjustable to
optimize power consumption and flyback time.
• High linear sawtooth signal amplification
• Flyback generator:
– TDA4864J: separate adjustable flyback supply
voltage up to 60 V
For the TDA4864AJ the flyback supply voltage will be
generated internally by doubling the supply voltage and
therefore a separate flyback supply voltage is not needed.
– TDA4864AJ: internally doubled supply voltage
(two supply voltages only for DC-coupled outputs).
Both circuits provide differential input stages.
QUICK REFERENCE DATA
Measurements referenced to pin GND.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VP1
supply voltage 1
9
−
30
V
VP2
supply voltage 2 for vertical output
VP1 − 1
−
60
V
VFB
flyback supply voltage of TDA4864J
VP1 − 1
−
60
V
VP3
flyback generator output voltage of
TDA4864AJ
0
−
VP1 + 2.2 V
Vi
input voltage on
1.6
−
VP1 − 0.5 V
IV-OUT = −1.25 A
pin INN
1.6
−
VP1 − 0.5 V
IP1
supply current 1
during scan
−
6
10
mA
IP2
quiescent supply current 2
IV-OUT = 0
−
25
60
mA
IV-OUT(p-p)
vertical deflection output current
(peak-to-peak value)
−
−
2.5
A
Tamb
ambient temperature
−20
−
+75
°C
pin INP
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
TDA4864J
TDA4864AJ
2003 Oct 31
DBS7P
DESCRIPTION
plastic DIL-bent-SIL power package; 7 leads
(lead length 12/11 mm); exposed die pad
2
VERSION
SOT524-1
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
BLOCK DIAGRAM
handbook, full pagewidth
THERMAL
PROTECTION
DIFFERENTIAL
INPUT
STAGE
TDA4864J
FLYBACK
GENERATOR
VERTICAL
OUTPUT
REFERENCE
CIRCUIT
7
6
5
4
3
2
1
INP
INN
V-OUT
GND
VP2
VFB
VP1
D1
RS1 CS1
C1
RP
R3
C4
C2
deflection
coil
R4
from
deflection controller
R2
R1
VN
Fig.1 Block diagram of TDA4864J.
2003 Oct 31
3
VF
VP
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
handbook, full pagewidth
THERMAL
PROTECTION
DIFFERENTIAL
INPUT
STAGE
TDA4864AJ
VERTICAL
OUTPUT
FLYBACK
GENERATOR
REFERENCE
CIRCUIT
7
6
5
4
3
2
1
INP
INN
V-OUT
GND
VP2
VP3
VP1
CF
RS1 CS1
D1
RP
R3
from
deflection controller
deflection
coil
C1
R6
R2
R1
VN
Fig.2 Block diagram of TDA4864AJ.
2003 Oct 31
C2
R5
4
VP
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
PINNING
PIN
SYMBOL
DESCRIPTION
TDA4864J
TDA4864AJ
VP1
1
1
positive supply voltage 1
VFB
2
−
flyback supply voltage
VP3
−
2
flyback generator output
VP2
3
3
supply voltage 2 for vertical output
GND
4
4
ground or negative supply voltage
V-OUT
5
5
vertical output
INN
6
6
inverted input of differential input stage
INP
7
7
non-inverted input of differential input stage
handbook, halfpage
handbook, halfpage
VP1
1
VP1
1
VFB
2
VP3
2
VP2
3
VP2
3
GND
4
GND
4
V-OUT
5
V-OUT
5
INN
6
INN
6
INP
7
INP
7
TDA4864J
XXXxxx
XXXxxx
Fig.3 Pin configuration of TDA4864J.
2003 Oct 31
TDA4864AJ
Fig.4 Pin configuration of TDA4864AJ.
5
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
FUNCTIONAL DESCRIPTION
Flyback generator
Both the TDA4864J and TDA4864AJ consist of a
differential input stage, a vertical output stage, a flyback
generator, a reference circuit and a thermal protection
circuit.
The flyback generator supplies the vertical output stage
during flyback.
The TDA4864J is used with separate flyback supply
voltage to achieve a short flyback time with minimized
power dissipation.
The TDA4864J operates with a separate flyback supply
voltage (see Fig.1) while the TDA4864AJ generates the
flyback voltage internally by doubling the supply voltage
(see Fig.2).
The TDA4864AJ needs a capacitor CF between
pins VP3 and VP2 (see Fig.2). Capacitor CF is charged
during scan, using the external diode D1 and resistor R5.
During flyback the cathode of capacitor CF is connected to
the positive supply voltage and the flyback voltage is then
twice the supply voltage. For the TDA4864AJ the
resistor R6 in the positive supply line can be used to
reduce the power consumption.
Differential input stage
The differential sawtooth input current signal (coming from
the deflection controller) is connected to the inputs
(inverted signal to pin INN and non-inverted signal to
pin INP). The vertical feedback signal is superimposed on
the inverted signal on pin INN.
In parallel with the deflection coil a damping resistor RP
and an RC combination (RS1 = 5.6 Ω and CS1 = 100 nF)
are needed. Furthermore, another additional
RC combination (RS2 = 5.6 Ω and CS2 = 47 to 150 nF)
can be used to minimize the noise effect and the flyback
time (see Figs 9 and 10).
Vertical output and thermal protection
The vertical output stage is a quasi-complementary
class-B amplifier with a high linearity.
The output stage is protected against thermal overshoots.
For a junction temperature Tj > 150 °C this protection will
be activated and will reduce then the deflection current
(IV-OUT).
2003 Oct 31
6
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages referenced to pin GND; unless
otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VP1
supply voltage 1
−
40
V
VP2
supply voltage 2
−
60
V
VFB
flyback supply voltage of TDA4864J
−
60
V
VP3
flyback generator output voltage of TDA4864AJ
0
VP1 + 3
V
Vi
input voltage on
pin INN
−
VP1
V
pin INP
−
VP1
V
Vo(V-OUT)
output voltage on pin V-OUT
−
62
V
IP2
supply current 2
−
±1.5
A
Io(V-OUT)
output current on pin V-OUT
−
±1.5
A
IVFB
current during flyback of TDA4864J
−
±1.5
A
IVP3
current during flyback of TDA4864AJ
−
±1.5
A
Tstg
storage temperature
−25
+150
°C
Tamb
ambient temperature
−20
+75
°C
Tj
junction temperature
note 1
−
150
°C
Ves
electrostatic discharge voltage on all pins
note 2
−300
+300
V
note 1
Notes
1. Internally limited by thermal protection; will be activated for Tj ≥ 150 °C.
2. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-mb)
PARAMETER
CONDITIONS
thermal resistance from junction to mounting base
note 1
VALUE
UNIT
6
K/W
Note
1. To minimize the thermal resistance from mounting base to heatsink [Rth(mb-h)] follow the recommended mounting
instruction: screw mounting preferred; torque = 40 Ncm; use heatsink compound; isolation plate increases Rth(mb-h).
2003 Oct 31
7
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
CHARACTERISTICS
VP1 = 25 V; Tamb = 25 °C; voltages referenced to pin GND; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VP1
supply voltage 1
9
−
30
V
VP2
supply voltage 2
VP1 − 1 −
60
V
VFB
flyback supply voltage of TDA4864J
VP1 − 1 −
60
V
VP3
flyback generator output voltage of TDA4864AJ IV-OUT = −1.25 A 0
−
VP1 + 2.2 V
IP1
supply current 1
during scan
−
6
10
mA
IP2
quiescent supply current 2
IV-OUT = 0
−
25
60
mA
pin INN
1.6
−
VP1 − 0.5 V
pin INP
1.6
−
VP1 − 0.5 V
pin INN
−
−100
−500
nA
pin INP
−
−100
−500
nA
Differential input stage
Vi
Iq
input voltage on
input quiescent current on
Flyback generator
IVFB
current during flyback of TDA4864J
−
−
±1.5
A
IVP3
current during flyback of TDA4864AJ
−
−
±1.5
A
VVP2-VFB
voltage drop during flyback of TDA4864J
−
−1.5
−
V
IV-OUT = −1.25 A −
−2
−
V
IV-OUT = −1 A
reverse
forward
VVP3-VP1
IV-OUT = 1 A
−
2.2
−
V
IV-OUT = 1.25 A
−
2.5
−
V
IV-OUT = −1 A
−
voltage drop during flyback of TDA4864AJ
reverse
forward
−1.5
−
V
IV-OUT = −1.25 A −
−2
−
V
IV-OUT = 1 A
−
2.2
−
V
IV-OUT = 1.25 A
−
2.5
−
V
Vertical output stage; see Fig.5
IV-OUT
vertical deflection output current
−
−
±1.25
A
IV-OUT(p-p)
vertical deflection output current
(peak-to-peak value)
−
−
2.5
A
Vo(sat)n
output saturation voltage to ground
IV-OUT = 1 A
−
1.4
1.7
V
IV-OUT = 1.25 A
−
1.8
2.3
V
IV-OUT = 1 A
−2.3
−2
−
V
IV-OUT = 1.25 A
−2.8
−2.3
−
V
note 1
−
−
1
%
Vo(sat)p
LIN
output saturation voltage to VP2
non-linearity of output signal
Note
1. Deviation of the output slope at a constant input slope.
2003 Oct 31
8
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
handbook, full pagewidth
input signal
on pin INN
t
input signal
on pin INP
t
VFB(1)
output voltage
on pin V-OUT V
P1
GND
t
deflection current
through the coil
t
MHB718
(1) VFB for TDA4864J; 2VP1 for TDA4864AJ.
Fig.5 Timing diagram.
2003 Oct 31
9
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
INTERNAL PIN CONFIGURATION
handbook, full pagewidth
INP
INN
7
6
V-OUT GND
5
VP2
VFB
VP1
3
2
1
VP2
VP3
VP1
3
2
1
4
TDA4864J
Fig.6 Internal circuits of TDA4864J.
handbook, full pagewidth
INP
INN
7
6
V-OUT GND
5
4
TDA4864AJ
Fig.7 Internal circuits of TDA4864AJ.
2003 Oct 31
10
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
APPLICATION INFORMATION
VF
handbook, full pagewidth
VP
2
> 1 kΩ
1N4448
TDA4864J
2.2 Ω
5
guard output
HIGH = error
3.3 kΩ
BC548
BC556
22 µF
220 kΩ
vertical
output
signal
Fig.8 Application circuit with TDA4864J for external guard signal generation.
handbook, full pagewidth
THERMAL
PROTECTION
DIFFERENTIAL
INPUT
STAGE
TDA4864J
FLYBACK
GENERATOR
VERTICAL
OUTPUT
REFERENCE
CIRCUIT
7
6
5
4
3
2
1
INP
INN
V-OUT
GND
VP2
VFB
VP1
D1
RS1 CS1
CS2
R3
from
deflection controller
(1)
RS2
5.6 Ω
RP
270 Ω
5.6 Ω 100
nF
deflection
coil
1.8 kΩ
R2
R1
1Ω
(1 W)
BYV27
470 µF
470 µF
VN
−8 V
470 µF
4.3 Ω
VF
+50 V
1.8 kΩ
Attention: the heatsink of the IC must be isolated against ground of the application (it is connected to pin GND).
(1) With CS2 (typical value between 47 and 150 nF) the flyback time and the noise behaviour can be optimized.
Fig.9 Application circuit with TDA4864J.
2003 Oct 31
11
VP
+9 V
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
handbook, full pagewidth
THERMAL
PROTECTION
DIFFERENTIAL
INPUT
STAGE
FLYBACK
GENERATOR
VERTICAL
OUTPUT
REFERENCE
CIRCUIT
7
6
5
4
3
2
1
INP
INN
V-OUT
GND
VP2
VP3
VP1
CS2
R3
from
deflection controller
TDA4864AJ
(1)
RS2
5.6 Ω
RP
270 Ω
RS1 CS1
CF
5.6 Ω 100
nF
100 µF
deflection
coil
R1
1Ω
(1 W)
D1
BYV27
470 µF
240 Ω (2 W)
470 µF
1.8 kΩ
R2
R5 (2)
VN
−12.5 V
3.9 Ω
(2 W)
R6 (3)
VP
+12.5 V
1.8 kΩ
Attention: the heatsink of the IC must be isolated against ground of the application (it is connected to pin GND).
(1) With CS2 (typical value between 47 and 150 nF) the flyback time and the noise behaviour can be optimized.
(2) With R5 capacitor CF will be charged during scan and the value (typical value between 150 and 270 Ω) depends on Idefl, tflb and CF.
(3) R6 reduces the power dissipation of the IC. The maximum possible value depends on the application.
Fig.10 Application circuit with TDA4864AJ.
2003 Oct 31
12
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
Example for both TDA4864J and TDA4864AJ
Calculation formulae for power consumption:
Table 1
P IC = P tot – P defl
Values given from application
SYMBOL
VALUE
UNIT
Idefl(max)
0.71
Ldeflcoil
6
mH
Rdeflcoil
6
Ω
RP
270
Ω
R1
1
Ω
R2
1.8
kΩ
1.8
kΩ
R3
(1)
I defl(max)
I defl(max)
P tot = ( V P1 – U D1 ) × ------------------- + V N × -------------------4
4
A
+ ( V P1 – V N ) × 0.01 A + 0.2 W
R deflcoil + R1 2
P defl = -------------------------------- × I defl(max)
3
where
50
V
PIC = power dissipation of the IC
Tamb
60
°C
Ptot = total power dissipation
Tdeflcoil
75
°C
Pdefl = power dissipation of the deflection coil.
Rth(j-mb)
6
K/W
Rth(mb-amb)
8
K/W
VFB
Calculation formulae for maximum required thermal
resistance for the heatsink at Tj(max) = 110 °C:
Note
1. For TDA4864J only.
T j(max) – T amb
R th(mb-amb) =  ----------------------------------- – R th(j-mb) = 19 K/W (max.)


P IC
Table 2
Table 3
Calculated values
VALUE
SYMBOL
UNIT
TDA4864J
TDA4864AJ
VP1
9
12.5
V
VN
−8
−12.5
V
Ptot
3.2
4.4
W
Pdefl
1.2
1.2
W
PIC
2
3.2
W
Rth(tot)
14
14
Tj(max)
88
105
tflb (µs)
VFB (V)
350
30
250
40
210
50
Table 4
tflb as a function of VP1 and VN for TDA4864AJ
tflb (µs)
VP1 (V)
VN (V)
PIC (W)
R6 (Ω)
K/W
360
10
−10
2.5
1
°C
290
12.5
−12.5
3.2
3.9
240
15
−15
3.9
6.8
VP1, VN and VFB are referenced to ground of application;
voltages are calculated with +10% tolerances.
Calculation formulae for supply voltages:
VP1 = −Vo(sat)p + (R1 + Rdeflcoil) × Idefl(max) − U’L + UD1
VN = Vo(sat)n + (R1 + Rdeflcoil) × Idefl(max) + U’L
where
U’L = Ldeflcoil × 2Idefl(max) × fv
fv = vertical deflection frequency
UD1 = forward voltage drop across D1.
2003 Oct 31
tflb as a function of VFB for TDA4864J
13
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
PACKAGE OUTLINE
DBS7P: plastic DIL-bent-SIL power package; 7 leads (lead length 12/11 mm); exposed die pad
SOT524-1
q1
non-concave
x
Eh
Dh
D
D1
view B: mounting base side
P
A2
k
q2
B
E
q
L2
L3
L1
L
1
7
Z
e1
e
Q
w M
bp
0
5
scale
DIMENSIONS (mm are the original dimensions)
UNIT A2(2) bp
mm
c
D(1) D1(2) Dh E(1) Eh
2.7 0.80 0.58 13.2 6.2
2.3 0.65 0.48 12.8 5.8
3.5
10 mm
v M
c
e2
m
e
e1
e2
14.7
3.5 2.54 1.27 5.08
14.3
L
k
3
2
L1
L2
L3
m
12.4 11.4 6.7
11.0 10.0 5.5
4.5
3.7
2.8
P
Q
q
q1
q2
3.4 1.15 17.5
4.85 3.8
3.1 0.85 16.3
3.6
v
w
x
0.8 0.3 0.02
Z(1)
2.92
2.37
Notes
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
2. Plastic surface within circle area D1 may protrude 0.04 mm maximum.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
ISSUE DATE
00-07-03
03-03-12
SOT524-1
2003 Oct 31
EUROPEAN
PROJECTION
14
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
The total contact time of successive solder waves must not
exceed 5 seconds.
SOLDERING
Introduction to soldering through-hole mount
packages
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
This text gives a brief insight to wave, dip and manual
soldering. A more in-depth account of soldering ICs can be
found in our “Data Handbook IC26; Integrated Circuit
Packages” (document order number 9398 652 90011).
Wave soldering is the preferred method for mounting of
through-hole mount IC packages on a printed-circuit
board.
Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.
Soldering by dipping or by solder wave
Driven by legislation and environmental forces the
worldwide use of lead-free solder pastes is increasing.
Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250 °C or 265 °C, depending on solder
material applied, SnPb or Pb-free respectively.
Suitability of through-hole mount IC packages for dipping and wave soldering methods
SOLDERING METHOD
PACKAGE
DIPPING
WAVE
DBS, DIP, HDIP, RDBS, SDIP, SIL
suitable
suitable(1)
PMFP(2)
−
not suitable
Notes
1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
2. For PMFP packages hot bar soldering or manual soldering is suitable.
2003 Oct 31
15
Philips Semiconductors
Product specification
Vertical deflection booster
TDA4864J; TDA4864AJ
DATA SHEET STATUS
LEVEL
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
Development
DEFINITION
I
Objective data
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Production
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification  The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Life support applications  These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes  Philips Semiconductors
reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 Oct 31
16