INTEGRATED CIRCUITS DATA SHEET TDA8764A 10-bit high-speed low-power ADC Product specification File under Integrated Circuits, IC11 2000 Jul 03 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A FEATURES APPLICATIONS • 10-bit resolution (binary or gray code) High-speed analog-to-digital conversion for: • Sampling rate up to 60 MHz • Video data digitizing • DC sampling allowed • Radar pulse analysis • One clock cycle conversion only • High energy physics research • High signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 5 MHz full-scale input at fclk = 60 MHz) • Transient signal analysis • Σ∆ modulators • Medical imaging. • No missing codes guaranteed • In Range (IR) CMOS output GENERAL DESCRIPTION • TTL and CMOS levels compatible digital inputs The TDA8764A is a 10-bit high-speed low-power Analog-to-Digital Converter (ADC) for professional video and other applications. It converts the analog input signal into 10-bit binary or gray coded digital words at a maximum sampling rate of 60 MHz. All digital inputs and outputs are TTL and CMOS compatible, although a low-level sine wave clock input signal is allowed. • 2.7 to 3.6 V CMOS digital outputs • Low-level AC clock input signal allowed • Power dissipation only 312 mW • Low analog input capacitance, no buffer amplifier required • No sample-and-hold circuit required. The device requires an external source to drive its reference ladder. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION TDA8764ATS/6 SSOP28 plastic shrink small outline package; 28 leads; body width 5.3 mm SOT341-1 TDA8764AHL/6 LQFP32 plastic low profile quad flat package; 32 leads; body 5 × 5 × 1.4 mm SOT401-1 QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. 5.0 MAX. 5.25 UNIT VCCA analog supply voltage 4.75 V VCCD digital supply voltage 4.75 5.0 5.25 V VCCO output stages supply voltage 2.7 3.3 3.6 V ICCA analog supply current − 29 37 mA ICCD digital supply current − 33 40 mA ICCO output stages supply current fclk = 60 MHz; ramp input − 0.5 2.0 mA INL integral non-linearity fclk = 60 MHz; ramp input − ±0.8 ±2 LSB DNL differential non-linearity fclk = 60 MHz; ramp input − ±0.35 ±0.9 LSB fclk(max) maximum clock frequency TDA8764ATS and TDA8764AHL − − MHz Ptot total power dissipation fclk = 60 MHz; ramp input − 312 411 mW 2000 Jul 03 2 60 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A BLOCK DIAGRAM handbook, full pagewidth VCCA VCCD CLK 3 (7) 1 (5) OE GRAY 11 (17) 10 15 (21) (16) CLOCK DRIVER VRT (6) 2 (31) 25 (30) 24 (29) 23 analog VI 8 (14) voltage input VRM (28) 22 ANALOG-TO-DIGITAL CONVERTER (27) 21 CMOS OUTPUTS LATCHES 7 (13) RLAD (26) 20 (25) 19 (24) 18 (23) 17 (22) 16 VRB D9 MSB D8 D7 D6 D5 data outputs D4 D3 D2 D1 D0 LSB (19) 13 6 (12) VCCO CMOS OUTPUT IN-RANGE LATCH TDA8764A 4 (8) 12 (18) 5, 27, 28 (9, 1, 3, 4, 10, 11, 32) AGND DGND n.c. 14 (20) OGND The pin numbers given in parenthesis refer to the TDA8764AHL. Fig.1 Block diagram. 2000 Jul 03 TC 9 (15) 3 (2) 26 IR output FCE253 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A PINNING PIN SYMBOL CLK DESCRIPTION TDA8764ATS TDA8764AHL 1 5 clock input TC 2 6 twos complement input (active LOW) VCCA 3 7 analog supply voltage (5 V) AGND 4 8 analog ground n.c. 5 9 not connected VRB 6 12 reference voltage BOTTOM input VRM 7 13 reference voltage MIDDLE input VI 8 14 analog input voltage VRT 9 15 reference voltage TOP input OE 10 16 output enable input (active LOW) VCCD 11 17 digital supply voltage (5 V) DGND 12 18 digital ground VCCO 13 19 supply voltage for output stages (2.7 to 3.6 V) OGND 14 20 output ground GRAY 15 21 gray code input (active HIGH) D0 16 22 data output; bit 0 (LSB) D1 17 23 data output; bit 1 D2 18 24 data output; bit 2 D3 19 25 data output; bit 3 D4 20 26 data output; bit 4 D5 21 27 data output; bit 5 D6 22 28 data output; bit 6 D7 23 29 data output; bit 7 D8 24 30 data output; bit 8 D9 25 31 data output; bit 9 (MSB) IR 26 2 in range data output n.c. 27 1 not connected n.c. 28 3 not connected n.c. − 4 not connected n.c. − 10 not connected n.c. − 11 not connected n.c. − 32 not connected 2000 Jul 03 4 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A handbook, halfpage CLK 1 28 n.c. TC 2 27 n.c. VCCA 3 26 IR AGND 4 25 D9 n.c. 5 24 D8 VRB 6 23 D7 VRM 7 VI 8 21 D5 VRT 9 20 D4 OE 10 19 D3 22 D6 TDA8764ATS V CCD 11 18 D2 DGND 12 17 D1 V CCO 13 16 D0 OGND 14 15 GRAY FCE254 25 D3 26 D4 27 D5 28 D6 29 D7 30 D8 handbook, full pagewidth 31 D9 32 n.c. Fig.2 Pin configuration (SSOP28). n.c. 1 24 D2 IR 2 23 D1 n.c. 3 22 D0 n.c. 4 21 GRAY TDA8764AHL 18 DGND AGND 8 17 VCCD OE 16 20 OGND VRT 15 7 VI 14 VCCA VRM 13 19 VCCO VRB 12 6 n.c. 11 TC n.c. 10 5 n.c. 9 CLK Fig.3 Pin configuration (LQFP32). 2000 Jul 03 5 FCE255 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCCA analog supply voltage note 1 −0.3 +7.0 V VCCD digital supply voltage note 1 −0.3 +7.0 V VCCO output stages supply voltage note 1 −0.3 +7.0 V ∆VCC supply voltage difference between VCCA − VCCD −1.0 +1.0 V VCCA − VCCO −1.0 +4.0 V VCCD − VCCO −1.0 +4.0 V −0.3 +7.0 V AC input voltage for switching (peak-to-peak value) referenced to DGND − VCCD V IO output current − 10 mA Tstg storage temperature −55 +150 °C Tamb ambient temperature −40 +85 °C Tj junction temperature − 150 °C VI input voltage Vi(sw)(p-p) referenced to AGND Note 1. The supply voltages VCCA, VCCD and VCCO may have any value between −0.3 and +7.0 V provided that the supply voltage differences ∆VCC are respected. HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) 2000 Jul 03 PARAMETER CONDITIONS VALUE UNIT SSOP28 110 K/W LQFP32 90 K/W thermal resistance from junction to ambient in free air 6 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A CHARACTERISTICS VCCA = 4.75 to 5.25 V; VCCD = 4.75 to 5.25 V; VCCO = 2.7 to 3.6 V; AGND and DGND shorted together; Tamb = 0 to 70 °C; typical values measured at VCCA = VCCD = 5 V; VCCO = 3.3 V; VRB = 1.3 V; VRT = 3.7 V; CL = 10 pF and Tamb = 25 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies VCCA analog supply voltage 4.75 5.0 5.25 V VCCD digital supply voltage 4.75 5.0 5.25 V VCCO output stages supply voltage 2.7 3.3 3.6 V ∆VCC supply voltage difference between VCCA − VCCD −0.20 − +0.20 V VCCA − VCCO −0.20 − +2.55 V −0.20 − +2.55 V ICCA analog supply current VCCD − VCCO − 29 37 mA ICCD digital supply current − 33 40 mA ICCO output stages supply current − 0.5 2.0 mA fclk = 60 MHz; ramp input Inputs PIN CLK (REFERENCED TO DGND); note 1 VIL LOW-level input voltage 0 − 0.8 V VIH HIGH-level input voltage 2 − VCCD V IIL LOW-level input current VCLK = 0.8 V −1 0 +1 µA IIH HIGH-level input current VCLK = 2 V − 2 10 µA Ci input capacitance − 2 − pF PINS OE; TC AND GRAY (REFERENCED TO DGND); see Tables 3 and 4 VIL LOW-level input voltage 0 − 0.8 V VIH HIGH-level input voltage 2 − VCCD V IIL LOW-level input current VIL = 0.8 V −1 − − µA IIH HIGH-level input current VIH = 2 V − − 1 µA PIN VI (ANALOG INPUT VOLTAGE REFERENCED TO AGND) IIL LOW-level input current VI = VRB = 1.3 V − 0 − µA IIH HIGH-level input current VI = VRT = 3.7 V − 55 − µA Yi input admittance fi = 5 MHz; note 2 Ri input resistance − 45 − kΩ Ci input capacitance 3 5 7 pF 2000 Jul 03 7 Philips Semiconductors Product specification 10-bit high-speed low-power ADC SYMBOL PARAMETER TDA8764A CONDITIONS MIN. TYP. MAX. UNIT Reference voltages for the resistor ladder; see Table 1 VRB reference voltage BOTTOM 1.2 1.3 2.2 V VRT reference voltage TOP 3.4 3.7 VCCA − 0.8 V Vdiff(ref) differential reference voltage VRT − VRB 2.2 2.4 3.2 V Iref reference current − 17.6 − mA RLAD resistor ladder − 136 − Ω TCRLAD temperature coefficient of the resistor ladder − 1860 − ppm − 253 − mΩ/K Voffset(B) offset voltage BOTTOM Vdiff = 2.4 V; note 3 − 200 − mV Voffset(T) offset voltage TOP Vdiff = 2.4 V; note 3 − 190 − mV VI(p-p) analog input voltage (peak-to-peak value) Vdiff = 2.4 V; note 4 1.95 2.01 2.10 V − 0.5 V Vdiff = 2.4 V Outputs PINS D9 TO D0 AND IR (REFERENCED TO OGND) VOL LOW-level output voltage IOL = 1 mA 0 VOH HIGH-level output voltage IOH = −1 mA VCCO − 0.5 − VCCO V IOZ output current in 3-state mode 0.5 V < VO < VCCO −20 − +20 µA 60 − − MHz Switching characteristics PIN CLK; see Fig.5; note 1 fclk(max) maximum clock frequency tCPH clock pulse width HIGH Tamb = 25 °C 7.0 − − ns tCPL clock pulse width LOW Tamb = 25 °C 3.5 − − ns − ±0.8 ±2 LSB ±0.35 ±0.9 LSB − ±1 − LSB − ±0.5 − % Analog signal processing LINEARITY INL integral non-linearity fclk = 60 MHz; ramp input DNL differential non-linearity fclk = 60 MHz; ramp input; − no missing code Eoffset offset error middle code EG gain error (from device to device) note 5 2000 Jul 03 8 Philips Semiconductors Product specification 10-bit high-speed low-power ADC SYMBOL PARAMETER TDA8764A CONDITIONS MIN. TYP. MAX. UNIT BANDWIDTH (fCLK = 60 MHZ) B analog bandwidth full-scale sine wave; note 6 − 30 − MHz 75% full-scale sine wave; note 6 − 45 − MHz small signal at mid-scale; VI = ±10 LSB at code 512; note 6 − 700 − MHz tstLH analog input settling time LOW-to-HIGH full-scale square wave; see Fig.7; note 7 − 5 − ns tstHL analog input settling time HIGH-to-LOW full-scale square wave; see Fig.7; note 7 − 5 − ns HARMONICS (fCLK = 60 MHZ) Hall(FS) harmonics (full-scale); all components fi = 5 MHz second harmonic − −68 − dB third harmonic − −67 − dB SFDR spurious free dynamic range fi = 5 MHz − 72 − dB THD total harmonic distortion fi = 5 MHz − −64 − dB fi = 15 MHz − −57 − dB without harmonics; fclk = 60 MHz; fi = 5 MHz − 58 − dB 57 − dB SIGNAL-TO-NOISE RATIO; note 8 SNRFS signal-to-noise ratio (full-scale) without harmonics; 53 fclk = 60 MHz; fi = 15 MHz EFFECTIVE BITS; note 8 EB effective bits fclk = 60 MHz fi = 5 MHz − 9.3 − bits fi = 10 MHz − 8.9 − bits fi = 15 MHz − 8.8 − bits fi = 20 MHz − 8.6 − bits fclk = 60 MHz − −67 − dB 10−13 − times/ sample TWO-TONE; note 9 TTID two-tone intermodulation distortion BIT ERROR RATE BER 2000 Jul 03 bit error rate fclk = 60 MHz; fi = 5 MHz; − VI = ±16 LSB at code 512 9 Philips Semiconductors Product specification 10-bit high-speed low-power ADC SYMBOL PARAMETER TDA8764A CONDITIONS MIN. TYP. MAX. UNIT Timing (fclk = 60 MHz; CL = 10 pF); see Fig.5 and note 10 tds sampling delay time − 0.7 2 ns th output hold time 4 − − ns td output delay time TDA8764ATS VCCO = 2.7 V − 10 14 ns VCCO = 3.3 V − 9 13 ns VCCO = 2.7 V − 13 17 ns VCCO = 3.3 V − 12 16 ns − − 10 pF 0.2 0.3 − V/ns td output delay time TDA8764AHL CL digital output load capacitance SR slew rate VCCO = 2.7 V 3-state output delay times (fclk = 60 MHz); see Fig.6 tdZH enable HIGH VCCO = 3.3 V − 16 20 ns tdZL enable LOW VCCO = 3.3 V − 30 34 ns tdHZ disable HIGH VCCO = 3.3 V − 25 30 ns tdLZ disable LOW VCCO = 3.3 V − 23 27 ns Notes 1. The rise and fall times of the clock signal must not be less than 0.5 ns. 1 2. The input admittance is Y i = ----- + jωCi Ri 3. Analog input voltages producing code 0 up to and including code 1023: a) Voffset(B) (offset voltage BOTTOM) is the difference between the analog input which produces data equal to 00 and the reference voltage BOTTOM (VRB) at Tamb = 25 °C. b) Voffset(T) (offset voltage TOP) is the difference between VRT (reference voltage TOP) and the analog input which produces data outputs equal to code 1023 at Tamb = 25 °C. 4. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to pins VRB and VRT via offset resistors ROB and ROT as shown in Fig.4. V RT – V RB a) The current flowing into the resistor ladder is I L = ----------------------------------------- and the full-scale input range at the converter, R OB + R L + R OT RL ˙ 8375 × ( V – V ) to cover code 0 to 1023, is V I = R L × I L = ----------------------------------------- × ( V RT – V RB ) = 0. RT RB R OB + R L + R OT b) Since RL, ROB and ROT have similar behaviour with respect to process and temperature variation, the ratio RL ------------------------------------------ will be kept reasonably constant from device to device. Consequently variation of the output R OB + R L + R OT codes at a given input voltage depends mainly on the difference VRT − VRB and its variation with temperature and supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the matching between each of them is then optimized. 5. ( V 1023 – V 0 ) – V i(p-p) E G = ---------------------------------------------------- × 100 V i(p-p) 6. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device. No glitches greater than 2 LSBs, nor any significant attenuation are observed in the reconstructed signal. 2000 Jul 03 10 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A 7. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square wave signal) in order to sample the signal and obtain correct output data. 8. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency (Nyquist frequency). Conversion to signal-to-noise ratio: S/N = EB × 6.02 + 1.76 dB. 9. Intermodulation measured relative to either tone with analog input frequencies of 4.5 and 4.3 MHz. The two input signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter. 10. Output data acquisition: the output data is available after the maximum delay time of td. It is recommended to have the lowest possible output load. These parameters are guaranteed by characterization and not by production test. handbook, halfpage VRT ROT code 1023 RL VRM RLAD IL code 0 ROB VRB FCE256 Fig.4 Explanation of note 4. 2000 Jul 03 11 Philips Semiconductors Product specification 10-bit high-speed low-power ADC Table 1 TDA8764A Output coding and input voltage (typical values; referenced to AGND; VRB = 1.3 V; VRT = 3.7 V; binary/gray codes BINARY OUTPUT BITS STEP VI IR U/F <1.5 0 0 1.5 1 0 0 0 0 1 : 1 0 0 0 0 : : : : : : : : GRAY OUTPUT BITS D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 1022 : 1 1 1 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 1 1023 3.51 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 O/F >3.51 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 Table 2 Output coding and input voltage (typical values; referenced to AGND; binary/twos complement codes BINARY OUTPUT BITS STEP TWOS COMPLEMENT OUTPUT BITS VI IR U/F <1.5 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1.5 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 : 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 1022 : 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 0 1023 3.51 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 O/F >3.51 0 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 Table 3 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 TC mode selection TC OE X 1 high-impedance 0 0 active; twos complement active 1 0 active; binary active Table 4 D9 to D0 IR high-impedance Gray mode selection GRAY OE X 1 high-impedance high-impedance 0 0 active; binary active 1 0 active; gray active 2000 Jul 03 D9 to D0 12 IR Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A t CPL handbook, full pagewidth t CPH VIH 50% CLK VIL sample N sample N + 1 sample N + 2 Vl t ds th HIGH DATA D0 to D9 DATA N-2 DATA N-1 DATA N DATA N+1 50% LOW td FCE257 Fig.5 Timing diagram. handbook, full pagewidth VCCD 50% OE tdHZ tdZH HIGH 90% output data LOW tdLZ 50% tdZL LOW HIGH 50% output data HIGH LOW 10% VCCD 3.3 kΩ TDA8764A 10 pF S1 TEST S1 tdLZ VCCD tdZL VCCD tdHZ DGND tdZH DGND FCE258 OE fOE = 100 kHz. Fig.6 Timing diagram and test conditions of 3-state output delay time. 2000 Jul 03 13 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A t stHL t stLH handbook, full pagewidth code 1023 VI 50% 50% code 0 2 ns 2 ns CLK 50% 50% 0.5 ns 0.5 ns FCE259 Fig.7 Analog input settling-time diagram. 2000 Jul 03 14 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A INTERNAL PIN CONFIGURATIONS handbook, halfpage handbook, halfpage VCCO V CCA D9 to D0 IR VI OGND AGND FCE260 FCE261 Fig.8 CMOS data and in range outputs. Fig.9 Analog input. handbook, halfpage VCCA handbook, halfpage VCCO VRT VRM OE R LAD VRB TC GRAY OGND AGND FCE262 FCE263 Fig.10 OE, GRAY and TC inputs. 2000 Jul 03 Fig.11 VRB, VRM and VRT inputs. 15 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A handbook, halfpage VCCD CLK 1.5V DGND FCE264 Fig.12 CLK input. 2000 Jul 03 16 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A APPLICATION INFORMATION 33 Ω CLK handbook, halfpage n.c. 1 28 2 27 3 26 4 25 5 24 6 23 D7 7 22 (3) TC VCCA 100 nF n.c. IR (2) AGND n.c. V RB(1) 100 nF V RM (1) AGND VI 100 nF V RT (1) AGND D9 D8 D6 TDA8764ATS 8 21 9 20 10 19 11 18 12 17 13 16 14 15 D5 D4 100 nF OE D3 AGND V CCD 100 nF (2) DGND V CCO 100 nF D2 D1 D0 (2) OGND GRAY FCE265 The analog and digital supplies should be separated and well decoupled. An application note is available and describes the design and the realization of a demoboard that uses TDA8764ATS with an application environment. (1) VRB, VRM and VRT are decoupled to AGND. (2) Decoupling capacitor for supplies must be placed close to the device. (3) This resistor is mandatory (33 Ω is its minimum value) and must be near the clock source. Fig.13 Application diagram (SSOP28). 2000 Jul 03 17 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A handbook, full pagewidth n.c. 32 n.c. IR n.c. n.c. 33 Ω CLK D9 31 D8 D7 30 D6 29 28 D5 27 D4 26 D3 25 1 24 2 23 3 22 4 21 TDA8764AHL 20 5 (3) TC VCCA (2) 100 nF AGND 6 19 7 18 8 17 9 10 n.c. n.c. 12 11 n.c. 13 VRB (1) VRM VI (1) 100 nF 100 nF AGND 14 AGND D2 D1 D0 GRAY OGND (2) VCCO 100 nF DGND (2) VCCD 100 nF 16 15 VRT OE (1) 100 nF FCE266 AGND The analog and digital supplies should be separated and well decoupled. An application note is available and describes the design and the realization of a demoboard that uses TDA8764AHL with an application environment. (1) VRB, VRM and VRT are decoupled to AGND. (2) Decoupling capacitor for supplies must be placed close to the device. (3) This resistor is mandatory (33 Ω is its minimum value) and must be near the clock source. Fig.14 Application diagram (LQFP32). 2000 Jul 03 18 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A PACKAGE OUTLINES SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm D SOT341-1 E A X c HE y v M A Z 28 15 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 14 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.0 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 10.4 10.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.1 0.7 8 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT341-1 2000 Jul 03 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 99-12-27 MO-150 19 o Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A SOT401-1 LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm c y X A 17 24 ZE 16 25 e A A2 E HE (A 3) A1 w M pin 1 index θ bp 32 Lp 9 L 1 8 detail X ZD e v M A w M bp D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y mm 1.60 0.15 0.05 1.5 1.3 0.25 0.27 0.17 0.18 0.12 5.1 4.9 5.1 4.9 0.5 7.15 6.85 7.15 6.85 1.0 0.75 0.45 0.2 0.12 0.1 Z D (1) Z E (1) θ 0.95 0.55 7 0o 0.95 0.55 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT401-1 136E01 MS-026 2000 Jul 03 EIAJ EUROPEAN PROJECTION ISSUE DATE 99-12-27 00-01-19 20 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 2000 Jul 03 21 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO REFLOW(1) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 Jul 03 22 Philips Semiconductors Product specification 10-bit high-speed low-power ADC TDA8764A DATA SHEET STATUS DATA SHEET STATUS PRODUCT STATUS DEFINITIONS (1) Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2000 Jul 03 23 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613502/01/pp24 Date of release: 2000 Jul 03 Document order number: 9397 750 06996