PSMN5R0-80PS N-channel 80 V 4.7 mΩ standard level MOSFET Rev. 02 — 23 June 2009 Product data sheet 1. Product profile 1.1 General description Standard level N-channel MOSFET in TO220 package qualified to 175 °C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits High efficiency due to low switching and conduction losses Suitable for standard level gate drive sources 1.3 Applications DC-to-DC converters Motor control Load switching Server power supplies 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 80 V ID drain current Tmb = 25 °C; VGS = 10 V; see Figure 1 - - 100 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 270 W VGS = 10 V; ID = 25 A; VDS = 40 V; see Figure 14; see Figure 15 - 21 - nC - 3.7 4.7 mΩ Dynamic characteristics QGD gate-drain charge Static characteristics RDSon [1] drain-source on-state resistance Measured 3 mm from package. VGS = 10 V; ID = 15 A; Tj = 25 °C; [1] PSMN5R0-80PS NXP Semiconductors N-channel 80 V 4.7 mΩ standard level MOSFET 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 G gate 2 D drain 3 S source mb D mounting base; connected to drain Graphic symbol D mb G mbb076 S 1 2 3 SOT78 (TO-220AB; SC-46) 3. Ordering information Table 3. Ordering information Type number Package Name Description PSMN5R0-80PS TO-220AB; SC-46 plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead SOT78 TO-220AB Version PSMN5R0-80PS_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 23 June 2009 2 of 13 PSMN5R0-80PS NXP Semiconductors N-channel 80 V 4.7 mΩ standard level MOSFET 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 80 V VDGR drain-gate voltage Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ VGS gate-source voltage ID drain current - 80 V -20 20 V VGS = 10 V; Tmb = 100 °C; see Figure 1 - 100 A VGS = 10 V; Tmb = 25 °C; see Figure 1 - 100 A IDM peak drain current tp ≤ 10 µs; pulsed; Tmb = 25 °C; see Figure 3 - 598 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 270 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Source-drain diode IS source current Tmb = 25 °C - 100 A ISM peak source current tp ≤ 10 µs; pulsed; Tmb = 25 °C - 598 A - 396 mJ Avalanche ruggedness non-repetitive VGS = 10 V; Tj(init) = 25 °C; ID = 100 A; Vsup ≤ 80 V; drain-source avalanche RGS = 50 Ω; unclamped energy EDS(AL)S 003aad078 150 ID (A) 03aa16 120 Pder (%) 80 100 (1) 50 40 0 0 0 Fig 1. 50 100 150 Tmb (°C) 200 0 100 150 200 Tmb (°C) Continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature PSMN5R0-80PS_2 Product data sheet 50 © NXP B.V. 2009. All rights reserved. Rev. 02 — 23 June 2009 3 of 13 PSMN5R0-80PS NXP Semiconductors N-channel 80 V 4.7 mΩ standard level MOSFET 003aad299 103 10 μs Limit RDSon = VDS / ID ID (A) 102 100 μs (1) 10 1 ms DC 10 ms 100 ms 1 10-1 10-1 Fig 3. 1 102 10 103 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Rth(j-mb) thermal resistance from see Figure 4 junction to mounting base Min Typ Max Unit - 0.3 0.56 K/W 003aad080 1 Zth(j-mb) (K/W) δ = 0.5 10-1 0.2 0.1 0.05 10-2 0.02 δ= P tp T 10-3 single shot t tp T 10 Fig 4. -4 10-6 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration; typical values PSMN5R0-80PS_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 23 June 2009 4 of 13 PSMN5R0-80PS NXP Semiconductors N-channel 80 V 4.7 mΩ standard level MOSFET 6. Characteristics Table 6. Symbol Characteristics Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = -55 °C 73 - - V ID = 250 µA; VGS = 0 V; Tj = 25 °C 80 - - V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 11; see Figure 12 1 - - V ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 11; see Figure 12 - - 4.6 V ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 11; see Figure 12 2 3 4 V VDS = 80 V; VGS = 0 V; Tj = 25 °C - - 8 µA VDS = 80 V; VGS = 0 V; Tj = 125 °C - - 150 µA VGS = -20 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = 20 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = 10 V; ID = 15 A; Tj = 100 °C; see Figure 13 - - 7 mΩ - 3.7 4.7 mΩ - 0.95 - Ω ID = 0 A; VDS = 0 V; VGS = 10 V - 87 - nC ID = 25 A; VDS = 40 V; VGS = 10 V; see Figure 14; see Figure 15 - 101 - nC ID = 25 A; VDS = 40 V; VGS = 10 V; see Figure 14; see Figure 15 - 26 - nC - 18 - nC Static characteristics V(BR)DSS VGS(th) IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance VGS = 10 V; ID = 15 A; Tj = 25 °C RG internal gate resistance f = 1 MHz (AC) [2] Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGS(th) pre-threshold gate-source charge QGS(th-pl) post-threshold gate-source charge - 8 - nC QGD gate-drain charge - 21 - nC VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 40 V - 4.2 - V Ciss input capacitance - 6793 - pF Coss output capacitance VDS = 12 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; see Figure 16 - 913 - pF Crss reverse transfer capacitance - 350 - pF td(on) turn-on delay time - 33 - ns tr rise time - 21 - ns td(off) turn-off delay time - 73 - ns tf fall time - 14 - ns VDS = 12 V; RL = 0.5 Ω; VGS = 10 V; RG(ext) = 4.7 Ω PSMN5R0-80PS_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 23 June 2009 5 of 13 PSMN5R0-80PS NXP Semiconductors N-channel 80 V 4.7 mΩ standard level MOSFET Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 17 - 0.8 1.2 V trr reverse recovery time - 56 - ns Qr recovered charge IS = 50 A; dIS/dt = 100 A/µs; VGS = 0 V; VDS = 40 V - 116 - nC [1] Tested to JEDEC standards where applicable. [2] Measured 3 mm from package. 003aad081 250 ID (A) 20 10 6 5.5 003aad082 10 RDSon (mΩ) VGS (V) = 5 200 8 5 5.5 150 6 6 100 10 4.5 4 50 20 VGS (V) = 4 0 2 0 Fig 5. 1 2 3 V (V) 4 DS Output characteristics: drain current as a function of drain-source voltage; typical values 003aad083 100 ID (A) 80 0 Fig 6. 50 100 150 200 ID (A) 250 Drain-source on-state resistance as a function of drain current; typical values 003aad087 10000 C (pF) 9000 Ciss 8000 60 7000 6000 40 Crss 5000 Tj = 175 °C 20 4000 25 °C 0 3000 0 Fig 7. 1 2 3 4 VGS (V) 2 5 Transfer characteristics: drain current as a function of gate-source voltage; typical values Fig 8. 6 8 VGS (V) 10 Input and reverse transfer capacitances as a function of gate-source voltage; typical values PSMN5R0-80PS_2 Product data sheet 4 © NXP B.V. 2009. All rights reserved. Rev. 02 — 23 June 2009 6 of 13 PSMN5R0-80PS NXP Semiconductors N-channel 80 V 4.7 mΩ standard level MOSFET 003aad088 140 gfs (S) 120 003aad089 40 RDSon (mΩ) 30 100 80 20 60 40 10 20 0 0 0 Fig 9. 20 40 60 80 100 120 ID (A) Forward transconductance as a function of drain current; typical values 03aa35 10−1 ID (A) 0 5 10 15 VGS (V) 20 Fig 10. Drain-source on-state resistance as a function of gate-source voltage; typical values 003aad280 5 VGS(th) (V) min 10−2 typ max 4 10−3 3 10−4 2 10−5 1 10−6 0 2 4 6 VGS (V) Fig 11. Sub-threshold drain current as a function of gate-source voltage 0 −60 typ min 0 60 120 180 Tj (°C) Fig 12. Gate-source threshold voltage as a function of junction temperature PSMN5R0-80PS_2 Product data sheet max © NXP B.V. 2009. All rights reserved. Rev. 02 — 23 June 2009 7 of 13 PSMN5R0-80PS NXP Semiconductors N-channel 80 V 4.7 mΩ standard level MOSFET 003aad045 2.5 VDS a ID 2.0 VGS(pl) 1.5 VGS(th) VGS 1.0 QGS1 QGS2 QGS 0.5 QGD QG(tot) 003aaa508 0.0 -60 -30 0 30 60 90 120 150 180 Tj (°C) Fig 14. Gate charge waveform definitions Fig 13. Normalized drain-source on-state resistance factor as a function of junction temperature 003aad085 10 VGS (V) 003aad086 104 Ciss 8 C (pF) 6 VDS = 40 V 103 Coss 4 Crss 2 0 0 20 40 60 80 100 120 QG (nC) Fig 15. Gate-source voltage as a function of gate charge; typical values 102 10-1 10 VDS (V) 102 Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values PSMN5R0-80PS_2 Product data sheet 1 © NXP B.V. 2009. All rights reserved. Rev. 02 — 23 June 2009 8 of 13 PSMN5R0-80PS NXP Semiconductors N-channel 80 V 4.7 mΩ standard level MOSFET 003aad084 100 IS (A) 80 60 40 175 °C 20 Tj = 25 °C 0 0 0.2 0.4 0.6 0.8 1 1.2 VSD (V) Fig 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values PSMN5R0-80PS_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 23 June 2009 9 of 13 PSMN5R0-80PS NXP Semiconductors N-channel 80 V 4.7 mΩ standard level MOSFET 7. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 E A A1 p q mounting base D1 D L1(1) L2(1) Q L b1(2) (3×) b2(2) (2×) 1 2 3 b(3×) c e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1(2) b2(2) c D D1 E e L L1(1) L2(1) max. p q Q mm 4.7 4.1 1.40 1.25 0.9 0.6 1.6 1.0 1.3 1.0 0.7 0.4 16.0 15.2 6.6 5.9 10.3 9.7 2.54 15.0 12.8 3.30 2.79 3.0 3.8 3.5 3.0 2.7 2.6 2.2 Notes 1. Lead shoulder designs may vary. 2. Dimension includes excess dambar. OUTLINE VERSION SOT78 REFERENCES IEC JEDEC JEITA 3-lead TO-220AB SC-46 EUROPEAN PROJECTION ISSUE DATE 08-04-23 08-06-13 Fig 18. Package outline SOT78 (TO-220AB) PSMN5R0-80PS_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 23 June 2009 10 of 13 PSMN5R0-80PS NXP Semiconductors N-channel 80 V 4.7 mΩ standard level MOSFET 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes PSMN5R0-80PS_2 20090623 Product data sheet - PSMN5R0-80PS_1 Modifications: PSMN5R0-80PS_1 • Status changed from objective to product. • Various changes to content. 20090507 Objective data sheet - PSMN5R0-80PS_2 Product data sheet - © NXP B.V. 2009. All rights reserved. Rev. 02 — 23 June 2009 11 of 13 PSMN5R0-80PS NXP Semiconductors N-channel 80 V 4.7 mΩ standard level MOSFET 9. Legal information 9.1 Data sheet status Document status [1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PSMN5R0-80PS_2 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 02 — 23 June 2009 12 of 13 PSMN5R0-80PS NXP Semiconductors N-channel 80 V 4.7 mΩ standard level MOSFET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Contact information. . . . . . . . . . . . . . . . . . . . . .12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 23 June 2009 Document identifier: PSMN5R0-80PS_2