PHILIPS 74AUP1Z04GW

74AUP1Z04
Low-power X-tal driver with enable and internal resistor
Rev. 02 — 3 July 2008
Product data sheet
1. General description
The 74AUP1Z04 combines the functions of the 74AUP1GU04 and 74AUP1G04 with
enable circuitry and an internal bias resistor to provide a device optimized for use in
crystal oscillator applications.
When not in use the EN input can be driven HIGH, pulling up the X1 input and putting the
device in a low power disable mode. Schmitt trigger action at the EN input makes the
circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to
3.6 V.
This device is fully specified for partial power-down applications using IOFF at output Y.
The IOFF circuitry disables the output Y, preventing the damaging backflow current through
the device when it is powered down.
The integration of the two devices into the 74AUP1Z04 produces the benefits of a
compact footprint, lower power dissipation and stable operation over a wide range of
frequency and temperature.
2. Features
n Wide supply voltage range from 0.8 V to 3.6 V
n High noise immunity
n ESD protection:
u HBM JESD22-A114E Class 3A exceeds 5000 V
u MM JESD22-A115-A exceeds 200 V
u CDM JESD22-C101C exceeds 1000 V
n Latch-up performance exceeds 100 mA per JESD 78 Class II
n Inputs accept voltages up to 3.6 V
n Low noise overshoot and undershoot < 10 % of VCC
n IOFF circuitry provides partial Power-down mode operation at output Y
n Multiple package options
n Specified from −40 °C to +85 °C and −40 °C to +125 °C
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74AUP1Z04GW
−40 °C to +125 °C
SC-88
plastic surface-mounted package; 6 leads
SOT363
74AUP1Z04GM
−40 °C to +125 °C
XSON6
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1 × 1.45 × 0.5 mm
74AUP1Z04GF
−40 °C to +125 °C
XSON6
plastic extremely thin small outline package; no leads; SOT891
6 terminals; body 1 × 1 × 0.5 mm
4. Marking
Table 2.
Marking
Type number
Marking code
74AUP1Z04GW
a4
74AUP1Z04GM
a4
74AUP1Z04GF
a4
5. Functional diagram
VCC
RPU
X1
3
6
Rbias
EN
4
Y
X2
1
001aae488
RPU = pull-up resistance.
Rbias = bias resistance.
Fig 1.
Logic symbol
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
2 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
6. Pinning information
6.1 Pinning
74AUP1Z04
74AUP1Z04
EN
1
6
EN
1
6
Y
GND
2
5
VCC
Y
GND
2
5
VCC
X1
3
4
X2
X1
3
4
X2
EN
1
6
Y
GND
2
5
VCC
X1
3
4
X2
001aad593
001aad594
Transparent top view
Transparent top view
001aad592
Fig 2.
74AUP1Z04
Pin configuration SOT363
(SC-88)
Fig 3.
Pin configuration SOT886
(XSON6)
Fig 4.
Pin configuration SOT891
(XSON6)
6.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
EN
1
enable input (active LOW)
GND
2
ground (0 V)
X1
3
data input
X2
4
data output
VCC
5
supply voltage
Y
6
data output
7. Functional description
Table 4.
Function table[1]
Input
Output
EN
X1
X2
Y
L
L
H
L
L
H
L
H
H
L
H
L
H
H
L
H
[1]
H = HIGH voltage level; L = LOW voltage level.
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
3 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
Conditions
VI < 0 V
[1]
VO > VCC or VO < 0 V
[1]
Min
Max
Unit
−0.5
+4.6
V
−50
-
mA
−0.5
+4.6
V
-
±50
mA
−0.5
VCC + 0.5
V
VO
output voltage
IO
output current
-
±20
mA
ICC
supply current
-
50
mA
IGND
ground current
−50
-
mA
Tstg
storage temperature
−65
+150
°C
-
250
mW
total power dissipation
Ptot
VO = 0 V to VCC
Tamb = −40 °C to +125 °C
[2]
[1]
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
For SC-88 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 45 °C the value of Ptot derates linearly with 2.4 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Symbol
Parameter
Conditions
VCC
supply voltage
VI
input voltage
0
3.6
V
VO
output voltage
0
VCC
V
Tamb
ambient temperature
−40
+125
°C
∆t/∆V
input transition rise and fall rate
-
200
ns/V
VCC = 0.8 V to 3.6 V
74AUP1Z04_2
Product data sheet
Min
Max
Unit
0.8
3.6
V
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
4 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
0.75 × VCC -
-
V
0.70 × VCC -
-
V
VCC = 0.9 V to 1.95 V
0.65 × VCC -
-
V
VCC = 2.3 V to 2.7 V
1.6
-
-
V
VCC = 3.0 V to 3.6 V
2.0
-
-
V
-
-
0.25 × VCC V
VCC = 0.8 V
-
-
0.30 × VCC V
VCC = 0.9 V to 1.95 V
-
-
0.35 × VCC V
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 3.0 V to 3.6 V
-
-
0.9
V
IO = −20 µA; VCC = 0.8 V to 3.6 V
VCC − 0.1
-
-
V
IO = −1.1 mA; VCC = 1.1 V
0.75 × VCC -
-
V
IO = −1.7 mA; VCC = 1.4 V
1.11
-
-
V
IO = −1.9 mA; VCC = 1.65 V
1.32
-
-
V
IO = −2.3 mA; VCC = 2.3 V
2.05
-
-
V
IO = −3.1 mA; VCC = 2.3 V
1.9
-
-
V
IO = −2.7 mA; VCC = 3.0 V
2.72
-
-
V
IO = −4.0 mA; VCC = 3.0 V
2.6
-
-
V
Tamb = 25 °C
VIH
HIGH-level input voltage
X1 input
VCC = 0.8 V to 3.6 V
EN input
VCC = 0.8 V
VIL
LOW-level input voltage
X1 input
VCC = 0.8 V to 3.6 V
EN input
VOH
HIGH-level output voltage
Y output; VI at X1 input = VIH or VIL
X2 output; VI = GND or VCC
IO = −20 µA; VCC = 0.8 V to 3.6 V
VCC − 0.1
-
-
V
IO = −1.1 mA; VCC = 1.1 V
0.75 × VCC -
-
V
IO = −1.7 mA; VCC = 1.4 V
1.11
-
-
V
IO = −1.9 mA; VCC = 1.65 V
1.32
-
-
V
IO = −2.3 mA; VCC = 2.3 V
2.05
-
-
V
IO = −3.1 mA; VCC = 2.3 V
1.9
-
-
V
IO = −2.7 mA; VCC = 3.0 V
2.72
-
-
V
IO = −4.0 mA; VCC = 3.0 V
2.6
-
-
V
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
5 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VOL
Y output; VI at X1 input = VIH or VIL
LOW-level output voltage
Min
Typ
Max
Unit
IO = 20 µA; VCC = 0.8 V to 3.6 V
-
-
0.1
V
IO = 1.1 mA; VCC = 1.1 V
-
-
0.3 × VCC
V
IO = 1.7 mA; VCC = 1.4 V
-
-
0.31
V
IO = 1.9 mA; VCC = 1.65 V
-
-
0.31
V
IO = 2.3 mA; VCC = 2.3 V
-
-
0.31
V
IO = 3.1 mA; VCC = 2.3 V
-
-
0.44
V
IO = 2.7 mA; VCC = 3.0 V
-
-
0.31
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.44
V
X2 output; VI = GND or VCC
II
input leakage current
IO = 20 µA; VCC = 0.8 V to 3.6 V
-
-
0.1
V
IO = 1.1 mA; VCC = 1.1 V
-
-
0.3 × VCC
V
IO = 1.7 mA; VCC = 1.4 V
-
-
0.31
V
IO = 1.9 mA; VCC = 1.65 V
-
-
0.31
V
IO = 2.3 mA; VCC = 2.3 V
-
-
0.31
V
IO = 3.1 mA; VCC = 2.3 V
-
-
0.44
V
IO = 2.7 mA; VCC = 3.0 V
-
-
0.31
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.44
V
-
-
±0.1
µA
-
-
±0.1
µA
X1 input
VI = EN = VCC; VCC = 0 V to 3.6 V
EN input
VI = GND to 3.6 V;
VCC = 0 V to 3.6 V
Ipu
pull-up current
X1 input; EN = VCC
-
-
15
µA
VI or VO = 0 V to 3.6 V; VCC = 0 V
[1]
-
-
±0.2
µA
[1]
-
-
±0.2
µA
-
-
75
µA
-
-
40
µA
-
1.3
-
pF
-
0.8
-
pF
VI = GND; VCC = 0.8 V to 3.6 V
IOFF
power-off leakage current
∆IOFF
additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
ICC
supply current
VI = GND or VCC; IO = 0 A;
EN = GND; VCC = 0.8 V to 3.6 V
∆ICC
additional supply current
EN input
VI = VCC − 0.6 V; IO = 0 A;
VCC = 3.3 V
CI
input capacitance
X1 input
VCC = 0 V to 3.6 V;
VI = GND or VCC
EN input
VCC = 0 V to 3.6 V;
VI = GND or VCC
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
6 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
CO
X2 output
output capacitance
Min
Typ
Max
Unit
-
1.5
-
pF
-
1.7
-
pF
VCC = 0.8 V
-
-
-
mA/V
VCC = 1.1 V to 1.3 V
0.2
-
9.9
mA/V
VCC = 1.4 V to 1.6 V
3.9
-
17.7
mA/V
VCC = 1.65 V to 1.95 V
7.9
-
24.3
mA/V
VCC = 2.3 V to 2.7 V
18
-
30.7
mA/V
20.5
-
32.4
mA/V
1.08
1.62
3.08
MΩ
0.75 × VCC -
-
V
VCC = 0.8 V
0.70 × VCC -
-
V
VCC = 0.9 V to 1.95 V
0.65 × VCC -
-
V
VCC = 2.3 V to 2.7 V
1.6
-
-
V
VCC = 3.0 V to 3.6 V
2.0
-
-
V
-
-
0.25 × VCC V
-
-
0.30 × VCC V
VO = GND; VCC = 0 V
Y output
VO = GND; VCC = 0 V
gfs
forward transconductance
see Figure 10 and Figure 11
VCC = 3.0 V to 3.6 V
Rbias
bias resistance
EN = GND; fi = 0 Hz; VI = 0 V or
VCC; see Figure 5; for frequency
behavior see Figure 6
Tamb = −40 °C to +85 °C
VIH
HIGH-level input voltage
X1 input
VCC = 0.8 V to 3.6 V
EN input
VIL
LOW-level input voltage
X1 input
VCC = 0.8 V to 3.6 V
EN input
VCC = 0.8 V
VCC = 0.9 V to 1.95 V
-
-
0.35 × VCC V
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 3.0 V to 3.6 V
-
-
0.9
V
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
7 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VOH
Y output; VI at X1 input = VIH or VIL
HIGH-level output voltage
Min
Typ
Max
Unit
IO = −20 µA; VCC = 0.8 V to 3.6 V
VCC − 0.1
-
-
V
IO = −1.1 mA; VCC = 1.1 V
0.7 × VCC
-
-
V
IO = −1.7 mA; VCC = 1.4 V
1.03
-
-
V
IO = −1.9 mA; VCC = 1.65 V
1.30
-
-
V
IO = −2.3 mA; VCC = 2.3 V
1.97
-
-
V
IO = −3.1 mA; VCC = 2.3 V
1.85
-
-
V
IO = −2.7 mA; VCC = 3.0 V
2.67
-
-
V
IO = −4.0 mA; VCC = 3.0 V
2.55
-
-
V
VI at X1 input = VIH or VIL
VOL
LOW-level output voltage
IO = −20 µA; VCC = 0.8 V to 3.6 V
VCC − 0.1
-
-
V
IO = −1.1 mA; VCC = 1.1 V
0.7 × VCC
-
-
V
IO = −1.7 mA; VCC = 1.4 V
1.03
-
-
V
IO = −1.9 mA; VCC = 1.65 V
1.30
-
-
V
IO = −2.3 mA; VCC = 2.3 V
1.97
-
-
V
IO = −3.1 mA; VCC = 2.3 V
1.85
-
-
V
IO = −2.7 mA; VCC = 3.0 V
2.67
-
-
V
IO = −4.0 mA; VCC = 3.0 V
2.55
-
-
V
IO = 20 µA; VCC = 0.8 V to 3.6 V
-
-
0.1
V
IO = 1.1 mA; VCC = 1.1 V
-
-
0.3 × VCC
V
IO = 1.7 mA; VCC = 1.4 V
-
-
0.37
V
IO = 1.9 mA; VCC = 1.65 V
-
-
0.35
V
IO = 2.3 mA; VCC = 2.3 V
-
-
0.33
V
IO = 3.1 mA; VCC = 2.3 V
-
-
0.45
V
IO = 2.7 mA; VCC = 3.0 V
-
-
0.33
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.45
V
IO = 20 µA; VCC = 0.8 V to 3.6 V
-
-
0.1
V
IO = 1.1 mA; VCC = 1.1 V
-
-
0.3 × VCC
V
IO = 1.7 mA; VCC = 1.4 V
-
-
0.37
V
IO = 1.9 mA; VCC = 1.65 V
-
-
0.35
V
IO = 2.3 mA; VCC = 2.3 V
-
-
0.33
V
IO = 3.1 mA; VCC = 2.3 V
-
-
0.45
V
IO = 2.7 mA; VCC = 3.0 V
-
-
0.33
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.45
V
Y output; VI at X1 input = VIH or VIL
X2 output; VI = GND or VCC
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
8 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
II
X1 input
input leakage current
VI = EN = VCC; VCC = 0 V to 3.6 V
Min
Typ
Max
Unit
-
-
±0.5
µA
-
-
±0.5
µA
EN input
VI = GND to 3.6 V;
VCC = 0 V to 3.6 V
Ipu
pull-up current
X1 input; EN = VCC
-
-
15
µA
IOFF
power-off leakage current
VI or VO = 0 V to 3.6 V; VCC = 0 V
[1]
-
-
±0.5
µA
[1]
-
-
±0.6
µA
-
-
75
µA
-
-
50
µA
VCC = 0.8 V
-
-
-
mA/V
VCC = 1.1 V to 1.3 V
-
-
10.8
mA/V
VCC = 1.4 V to 1.6 V
1.8
-
21.2
mA/V
VCC = 1.65 V to 1.95 V
7.5
-
29.9
mA/V
VCC = 2.3 V to 2.7 V
15.0
-
38.0
mA/V
VCC = 3.0 V to 3.6 V
17.8
-
39.2
mA/V
1.07
-
3.11
MΩ
0.75 × VCC -
-
V
0.75 × VCC -
-
V
VCC = 0.9 V to 1.95 V
0.70 × VCC -
-
V
VCC = 2.3 V to 2.7 V
1.6
-
-
V
VCC = 3.0 V to 3.6 V
2.0
-
-
V
-
-
0.25 × VCC V
VCC = 0.8 V
-
-
0.25 × VCC V
VCC = 0.9 V to 1.95 V
-
-
0.30 × VCC V
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 3.0 V to 3.6 V
-
-
0.9
V
VI = GND; VCC = 0.8 V to 3.6 V
∆IOFF
additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
ICC
supply current
VI = GND or VCC; IO = 0 A;
EN = GND; VCC = 0.8 V to 3.6 V
∆ICC
additional supply current
EN input
VI = VCC − 0.6 V; IO = 0 A;
VCC = 3.3 V
gfs
Rbias
forward transconductance
bias resistance
see Figure 10 and Figure 11
EN = GND; fi = 0 Hz; VI = 0 V or
VCC; see Figure 5; for frequency
behavior see Figure 6
Tamb = −40 °C to +125 °C
VIH
HIGH-level input voltage
X1 input
VCC = 0.8 V to 3.6 V
EN input
VCC = 0.8 V
VIL
LOW-level input voltage
X1 input
VCC = 0.8 V to 3.6 V
EN input
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
9 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VOH
Y output; VI at X1 input = VIH or VIL
HIGH-level output voltage
Min
Typ
Max
V
IO = −20 µA; VCC = 0.8 V to 3.6 V
VCC − 0.11 -
-
V
IO = −1.1 mA; VCC = 1.1 V
0.6 × VCC
-
-
V
IO = −1.7 mA; VCC = 1.4 V
0.93
-
-
V
IO = −1.9 mA; VCC = 1.65 V
1.17
-
-
V
IO = −2.3 mA; VCC = 2.3 V
1.77
-
-
V
IO = −3.1 mA; VCC = 2.3 V
1.67
-
-
V
IO = −2.7 mA; VCC = 3.0 V
2.40
-
-
V
IO = −4.0 mA; VCC = 3.0 V
2.30
-
-
V
X2 output; VI = GND or VCC
VOL
LOW-level output voltage
Unit
V
IO = −20 µA; VCC = 0.8 V to 3.6 V
VCC − 0.11 -
-
V
IO = −1.1 mA; VCC = 1.1 V
0.6 × VCC
-
-
V
IO = −1.7 mA; VCC = 1.4 V
0.93
-
-
V
IO = −1.9 mA; VCC = 1.65 V
1.17
-
-
V
IO = −2.3 mA; VCC = 2.3 V
1.77
-
-
V
IO = −3.1 mA; VCC = 2.3 V
1.67
-
-
V
IO = −2.7 mA; VCC = 3.0 V
2.40
-
-
V
IO = −4.0 mA; VCC = 3.0 V
2.30
-
-
V
IO = 20 µA; VCC = 0.8 V to 3.6 V
-
-
0.11
V
IO = 1.1 mA; VCC = 1.1 V
-
-
0.33 × VCC V
IO = 1.7 mA; VCC = 1.4 V
-
-
0.41
V
IO = 1.9 mA; VCC = 1.65 V
-
-
0.39
V
IO = 2.3 mA; VCC = 2.3 V
-
-
0.36
V
IO = 3.1 mA; VCC = 2.3 V
-
-
0.50
V
IO = 2.7 mA; VCC = 3.0 V
-
-
0.36
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.50
V
IO = 20 µA; VCC = 0.8 V to 3.6 V
-
-
0.11
V
IO = 1.1 mA; VCC = 1.1 V
-
-
0.33 × VCC V
IO = 1.7 mA; VCC = 1.4 V
-
-
0.41
V
IO = 1.9 mA; VCC = 1.65 V
-
-
0.39
V
IO = 2.3 mA; VCC = 2.3 V
-
-
0.36
V
IO = 3.1 mA; VCC = 2.3 V
-
-
0.50
V
IO = 2.7 mA; VCC = 3.0 V
-
-
0.36
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.50
V
Y output; VI at X1 input = VIH or VIL
X2 output; VI = GND or VCC
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
10 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
II
X1 input
input leakage current
VI = EN = VCC; VCC = 0 V to 3.6 V
Min
Typ
Max
Unit
-
-
±0.75
µA
-
-
±0.75
µA
EN input
VI = GND to 3.6 V;
VCC = 0 V to 3.6 V
Ipu
pull-up current
X1 input; EN = VCC
-
-
15
µA
IOFF
power-off leakage current
VI or VO = 0 V to 3.6 V; VCC = 0 V
[1]
-
-
±0.75
µA
[1]
-
-
±0.75
µA
-
-
75
µA
-
-
75
µA
VCC = 0.8 V
-
-
-
mA/V
VCC = 1.1 V to 1.3 V
-
-
10.8
mA/V
VCC = 1.4 V to 1.6 V
1.8
-
21.2
mA/V
VCC = 1.65 V to 1.95 V
6.9
-
29.9
mA/V
VCC = 2.3 V to 2.7 V
13.4
-
38.0
mA/V
VCC = 3.0 V to 3.6 V
15.8
-
39.2
mA/V
1.07
-
3.11
MΩ
VI = GND; VCC = 0.8 V to 3.6 V
∆IOFF
additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
ICC
supply current
VI = GND or VCC; IO = 0 A;
EN = GND; VCC = 0.8 V to 3.6 V
∆ICC
additional supply current
EN input
VI = VCC − 0.6 V; IO = 0 A;
VCC = 3.3 V
forward transconductance
gfs
Rbias
[1]
bias resistance
see Figure 10 and Figure 11
EN = GND; fi = 0 Hz; VI = 0 V or
VCC; see Figure 5; for frequency
behavior see Figure 6
Only for output Y and input EN.
Rbias
VCC
II
X1
VI
X2
VO
001aai359
VO – VI
R bias = ------------------II
Fig 5.
Test circuit for measuring bias resistance
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
11 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
001aai159
20
Rbias
(MΩ)
16
(1)
12
8
(2)
4
0
1.0
(3)
1.5
2.0
2.5
3.0
3.5
VCC (V)
(1) fi = 30 kHz.
(2) fi = 1 MHz.
(3) fi = 10 MHz.
Fig 6.
Typical bias resistance versus supply voltage
11. Dynamic characteristics
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Tamb =25 °C
Conditions
Min
Typ[1]
Tamb = −40 °C to +125 °C Unit
Max
Min
Max
Max
(85 °C) (125 °C)
CL = 5 pF
tpd
propagation delay X1 to X2; see Figure 7
[2]
VCC = 0.8 V
-
12.8
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
1.2
3.0
3.9
1.2
3.9
3.9
ns
VCC = 1.4 V to 1.6 V
1.0
2.2
2.6
1.0
2.7
2.7
ns
VCC = 1.65 V to 1.95 V
0.8
1.9
2.3
0.8
2.4
2.5
ns
VCC = 2.3 V to 2.7 V
0.7
1.6
1.9
0.7
2.0
2.0
ns
VCC = 3.0 V to 3.6 V
0.7
1.4
1.6
0.7
1.7
1.7
ns
-
39.2
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
2.5
8.0
10.7
2.3
10.8
10.9
ns
VCC = 1.4 V to 1.6 V
2.2
5.5
6.6
2.0
7.0
7.0
ns
VCC = 1.65 V to 1.95 V
1.8
4.4
5.5
1.7
5.9
6.0
ns
VCC = 2.3 V to 2.7 V
1.5
3.5
4.1
1.4
4.4
4.5
ns
VCC = 3.0 V to 3.6 V
1.5
3.1
3.5
1.4
3.8
3.8
ns
[2]
X1 to Y; see Figure 8
VCC = 0.8 V
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
12 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
Table 8.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Tamb =25 °C
Conditions
Tamb = −40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
-
20.9
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
1.4
4.1
5.4
1.3
5.6
5.6
ns
VCC = 1.4 V to 1.6 V
1.3
2.9
3.6
1.2
3.8
3.8
ns
VCC = 1.65 V to 1.95 V
1.2
2.5
3.0
1.1
3.2
3.2
ns
VCC = 2.3 V to 2.7 V
0.9
2.0
2.4
0.8
2.5
2.5
ns
0.9
1.8
2.1
0.8
2.3
2.3
ns
-
46.6
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
2.7
9.2
12.4
2.5
12.7
12.7
ns
VCC = 1.4 V to 1.6 V
2.5
6.3
7.8
2.2
8.2
8.2
ns
Max
Max
(85 °C) (125 °C)
CL = 10 pF
tpd
propagation delay X1 to X2; see Figure 7
[2]
VCC = 0.8 V
VCC = 3.0 V to 3.6 V
[2]
X1 to Y; see Figure 8
VCC = 0.8 V
VCC = 1.65 V to 1.95 V
2.3
5.0
6.2
2.2
6.7
6.7
ns
VCC = 2.3 V to 2.7 V
1.8
4.0
4.7
1.7
5.0
5.1
ns
VCC = 3.0 V to 3.6 V
1.9
3.6
4.2
1.8
4.5
4.5
ns
-
28.9
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
1.7
5.2
7.1
1.6
7.2
7.3
ns
VCC = 1.4 V to 1.6 V
1.6
3.6
4.4
1.6
4.7
4.8
ns
CL = 15 pF
tpd
propagation delay X1 to X2; see Figure 7
[2]
VCC = 0.8 V
VCC = 1.65 V to 1.95 V
1.3
3.0
3.7
1.3
3.9
4.0
ns
VCC = 2.3 V to 2.7 V
1.0
2.4
2.9
1.0
3.1
3.1
ns
1.1
2.2
2.5
1.0
2.7
2.7
ns
VCC = 3.0 V to 3.6 V
[2]
X1 to Y; see Figure 8
VCC = 0.8 V
-
53.9
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
3.1
10.4
14.2
2.8
14.6
14.7
ns
VCC = 1.4 V to 1.6 V
2.9
7.0
8.5
2.7
9.2
9.3
ns
VCC = 1.65 V to 1.95 V
2.5
5.6
6.9
2.3
7.4
7.5
ns
VCC = 2.3 V to 2.7 V
2.1
4.5
5.4
2.0
5.7
5.7
ns
VCC = 3.0 V to 3.6 V
2.3
4.1
4.7
2.1
5.1
5.1
ns
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
13 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
Table 8.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Tamb =25 °C
Conditions
Tamb = −40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
-
52.8
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
2.4
8.5
11.8
2.3
12.2
12.4
ns
VCC = 1.4 V to 1.6 V
2.2
5.6
6.8
2.0
7.5
7.6
ns
VCC = 1.65 V to 1.95 V
2.0
4.5
5.6
1.9
6.2
6.2
ns
VCC = 2.3 V to 2.7 V
1.5
3.7
4.2
1.4
4.6
4.6
ns
1.7
3.3
3.7
1.6
4.0
4.2
ns
-
77.6
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
3.7
13.8
19.2
3.3
19.8
20.1
ns
VCC = 1.4 V to 1.6 V
3.4
9.2
11.2
3.1
12.2
12.3
ns
Max
Max
(85 °C) (125 °C)
CL = 30 pF
propagation delay X1 to X2; see Figure 7
tpd
[2]
VCC = 0.8 V
VCC = 3.0 V to 3.6 V
[2]
X1 to Y; see Figure 8
VCC = 0.8 V
VCC = 1.65 V to 1.95 V
3.4
7.4
8.8
3.1
9.7
9.7
ns
VCC = 2.3 V to 2.7 V
2.6
5.9
6.7
2.4
7.4
7.4
ns
VCC = 3.0 V to 3.6 V
3.2
5.4
6.2
2.9
6.7
6.9
ns
VCC = 0.8 V
-
6.8
-
-
-
-
pF
VCC = 1.1 V to 1.3 V
-
12.0
-
-
-
-
pF
VCC = 1.4 V to 1.6 V
-
18.2
-
-
-
-
pF
VCC = 1.65 V to 1.95 V
-
19.2
-
-
-
-
pF
VCC = 2.3 V to 2.7 V
-
21.9
-
-
-
-
pF
VCC = 3.0 V to 3.6 V
-
24.9
-
-
-
-
pF
CL = 5 pF, 10 pF, 15 pF and 30 pF
power dissipation
capacitance
CPD
fi = 1 MHz; EN = GND;
VI = GND to VCC
[3][4][5]
[1]
All typical values are measured at nominal VCC.
[2]
tpd is the same as tPLH and tPHL.
[3]
All specified values are the average typical values over all stated loads.
[4]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
[5]
Feedback current is included in the CPD.
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
14 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
12. Waveforms
VI
VM
X1 input
GND
tPLH
tPHL
VOH
VM
X2 output
VOL
mnb099
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.
Fig 7.
The input (X1) to output (X2) propagation delays
VI
VM
X1 input
GND
tPLH
tPHL
VOH
VM
Y output
VOL
mnb100
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.
Fig 8.
Table 9.
The input (X1) to output (Y) propagation delays
Measurement points
Supply voltage
Output
Input
VCC
VM
VM
VI
tr = tf
0.8 V to 3.6 V
0.5 × VCC
0.5 × VCC
VCC
≤ 3.0 ns
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
15 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
VCC
VEXT
5 kΩ
G
VI
VO
DUT
RT
CL
RL
001aac521
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 9.
Table 10.
Load circuitry for switching times
Test data
Supply voltage
Load
VEXT
RL[1]
VCC
CL
0.8 V to 3.6 V
5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ
[1]
tPLH, tPHL
tPZH, tPHZ
tPZL, tPLZ
open
GND
2 × VCC
For measuring enable and disable times RL = 5 kΩ, for measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ.
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
16 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
001aad074
30
gfs
(mA/V)
20
Rbias
VCC
10
0.47 µF X
1
X2
100 µF
Vi
Io
0
0
1
2
3
4
VCC (V)
001aai360
Tamb = 25 °C.
∆I O
g fs = --------∆V I
fi = 1 kHz.
VO is constant.
Fig 10. Test set-up for measuring forward
transconductance
Fig 11. Typical forward transconductance as a
function of supply voltage
13. Application information
Crystal controlled oscillator circuits are widely used in clock pulse generators because of
their excellent frequency stability and wide operating frequency range. The use of the
74AUP1Z04 provides the additional advantages of low power dissipation, stable operation
over a wide range of frequency and temperature and a very small footprint. This
application information describes crystal characteristics, design and testing of crystal
oscillator circuits based on the 74AUP1Z04.
13.1 Crystal characteristics
Figure 12 is the equivalent circuit of a quartz crystal.
The reactive and resistive component of the impedance of the crystal alone and the
crystal with a series and a parallel capacitance is shown in Figure 13.
CX1
=
CX0
LX1
RX1
001aai361
Fig 12. Equivalent circuit of a crystal
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
17 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
+
resistance
CX1
CX0
(1)
LX1
R1
0
fr
fa
f
reactance
RX1
+
CX0
(2)
LX1
resistance
RL
CX1
0
fL
fa
f
reactance
RX1
CL
+
Rp
resistance
CX1
(3)
CL
CX0
LX1
0
fr
fL
fa
RX1
f
reactance
001aai362
(1) resonance
(2) anti-resonance
(3) load resonance
Fig 13. Reactance and resistance characteristics of a crystal
13.1.1 Design
Figure 14 shows the recommended way to connect a crystal to the 74AUP1Z04. This
circuit is basically a Pierce oscillator circuit in which the crystal is operating at its
fundamental frequency and is tuned by the parallel load capacitance of C1 and C2. C1 and
C2 are in series with the crystal. They should be approximately equal. R1 is the
drive-limiting resistor and is set to approximately the same value as the reactance of C1 at
the crystal frequency (R1 = XC1). This will result in an input to the crystal of 50 % of the
rail-to-rail output of X2. This keeps the drive level into the crystal within drive specifications
(the designer should verify this). Overdriving the crystal can cause damage.
The internal bias resistor provides negative feedback and sets a bias point of the inverter
near mid-supply, operating the 74AUP1GU04 portion in the high gain linear region.
To calculate the values of C1 and C2, the designer can use the formula:
C1 × C2
C L = ------------------- + C s
C1 + C2
CL is the load capacitance as specified by the crystal manufacturer, Cs is the stray
capacitance of the circuit (for the 74AUP1Z04 this is equal to an input capacitance
of 1.5 pF).
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
18 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
74AUP1GU04
portion
74AUP1G04
portion
Rbias
X1
system
load
Y
X2
Xtal
C2
R1
Csys
Rsys
C1
001aai363
Fig 14. Crystal oscillator configuration for the 74AUP1Z04
13.1.2 Testing
After the calculations are performed for a particular crystal, the oscillator circuit should be
tested. The following simple checks will verify the prototype design of a crystal controlled
oscillator circuit. Perform them after laying out the board:
• Test the oscillator over worst-case conditions (lowest supply voltage, worst-case
crystal and highest operating temperature). Adding series and parallel resistors can
simulate a worst-case crystal.
• Insure that the circuit does not oscillate without the crystal.
• Check the frequency stability over a supply range greater than that which is likely to
occur during normal operation.
• Check that the start-up time is within system requirements.
As the 74AUP1Z04 isolates the system loading, once the design is optimized, the single
layout may work in multiple applications for any given crystal.
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
19 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
14. Package outline
Plastic surface-mounted package; 6 leads
SOT363
D
E
B
y
X
A
HE
6
5
v M A
4
Q
pin 1
index
A
A1
1
2
e1
3
bp
c
Lp
w M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.8
0.1
0.30
0.20
0.25
0.10
2.2
1.8
1.35
1.15
1.3
0.65
2.2
2.0
0.45
0.15
0.25
0.15
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
SOT363
JEITA
SC-88
EUROPEAN
PROJECTION
ISSUE DATE
04-11-08
06-03-16
Fig 15. Package outline SOT363 (SC-88)
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
20 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4×
(2)
L
L1
e
6
5
e1
4
e1
6×
A
(2)
A1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A (1)
max
A1
max
b
D
E
e
e1
L
L1
mm
0.5
0.04
0.25
0.17
1.5
1.4
1.05
0.95
0.6
0.5
0.35
0.27
0.40
0.32
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
OUTLINE
VERSION
SOT886
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
04-07-15
04-07-22
MO-252
Fig 16. Package outline SOT886 (XSON6)
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
21 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm
1
SOT891
b
3
2
4×
(1)
L
L1
e
6
5
e1
4
e1
6×
A
(1)
A1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max
A1
max
b
D
E
e
e1
L
L1
mm
0.5
0.04
0.20
0.12
1.05
0.95
1.05
0.95
0.55
0.35
0.35
0.27
0.40
0.32
Note
1. Can be visible in some manufacturing processes.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
05-04-06
07-05-15
SOT891
Fig 17. Package outline SOT891 (XSON6)
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
22 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
15. Abbreviations
Table 11.
Abbreviations
Acronym
Description
CDM
Charged Device Model
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
16. Revision history
Table 12.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74AUP1Z04_2
20080703
Product data sheet
-
74AUP1Z04_1
Modifications:
•
Section 2 “Features”:
•
Section 10 “Static characteristics”:
Removed: Low static power consumption; ICC 0.9 µA maximum.
Removed: Feedback current (Ifbck).
Changed: Maximum supply current (ICC).
Added: forward transconductance and bias resistance.
•
Section 11 “Dynamic characteristics”:
Changed: Typical power dissipation capacitance.
74AUP1Z04_1
20061212
Product data sheet
74AUP1Z04_2
Product data sheet
-
-
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
23 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
17.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74AUP1Z04_2
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 02 — 3 July 2008
24 of 25
74AUP1Z04
NXP Semiconductors
Low-power X-tal driver with enable and internal resistor
19. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
12
13
13.1
13.1.1
13.1.2
14
15
16
17
17.1
17.2
17.3
17.4
18
19
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . 12
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Application information. . . . . . . . . . . . . . . . . . 17
Crystal characteristics . . . . . . . . . . . . . . . . . . 17
Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 20
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 23
Legal information. . . . . . . . . . . . . . . . . . . . . . . 24
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 24
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Contact information. . . . . . . . . . . . . . . . . . . . . 24
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 3 July 2008
Document identifier: 74AUP1Z04_2