INTEGRATED CIRCUITS 74ALS377 Octal D flip–flop with enable Product specification IC05 Data Handbook 1991 Feb 08 Philips Semiconductors Product specification Octal D flip-flop with enable 74ALS377 FEATURES PIN CONFIGURATION • Ideal for addressable register applications • Enable for address and data synchronization applications • Eight edge-triggered D-type flip-flops • Buffered common clock • See 74ALS273 for master reset version • See 74ALS373 for transparent latch version • See 74ALS374 for 3-State version E 1 20 VCC Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 9 12 Q4 DESCRIPTION Q3 The 74ALS377 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) is Low. GND 10 11 CP SF00350 The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation. TYPE ORDERING INFORMATION ORDER CODE DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C DRAWING NUMBER TYPICAL fMAX TYPICAL SUPPLY CURRENT (TOTAL) 20-pin plastic DIP 74ALS377N SOT146-1 95MHz 15mA 20-pin plastic SOL 74ALS377D SOT163-1 20-pin plastic SSOP Type II 74ALS377DB SOT339-1 74ALS377 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE 74ALS (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW Data inputs 1.0/2.0 20µA/0.2mA Clock pulse input (active rising edge) 1.0/1.0 20µA/0.1mA Latch enable input 1.0/1.0 20µA/0.1mA Data outputs 130/240 2.6mA/24mA PINS DESCRIPTION D0 – D7 CP E Q0 – Q7 NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state. LOGIC SYMBOL IEC/IEEE SYMBOL 3 4 7 8 13 14 17 18 1 11 D0 D1 D2 D3 D4 D5 D6 1 CP E Q0 2 VCC = Pin 20 GND = Pin 10 1991 Feb 08 Q1 5 Q2 6 Q3 9 Q4 12 Q5 15 Q6 16 1C2 D7 3 11 G1 Q7 19 SF00351 2D 2 4 5 7 6 8 9 13 12 14 15 17 16 18 19 SF00352 2 853–1399 01670 Philips Semiconductors Product specification Octal D flip-flop with enable 74ALS377 LOGIC DIAGRAM D0 D1 3 D2 4 D3 7 D4 8 D5 13 D6 14 D7 17 18 1 E D Q D CP CP Q D CP Q D CP Q D CP Q D CP Q D CP D CP Q CP 11 2 5 Q0 6 Q1 9 Q2 Q3 12 Q4 15 Q5 VCC = Pin 20 GND = Pin 10 INPUTS OUTPUTS OPERATING MODE E CP Dn Qn l ↑ h H Load “1” l ↑ l L Load “0” h ↑ X NC H X X NC Hold (do nothing) High-voltage level High state must be present one setup time before the Low-to-High clock transition Low-voltage level Low state must be present one setup time before the Low-to-High clock transition No change Don’t care Low-to-High clock transition 1991 Feb 08 16 Q6 19 Q7 SF00353 FUNCTION TABLE H = h = L = l = NC= X = ↑ = Q 3 Philips Semiconductors Product specification Octal D flip-flop with enable 74ALS377 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) PARAMETER SYMBOL RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current VOUT Voltage applied to output in High output state IOUT Current applied to output in Low output state Tamb Operating free-air temperature range Tstg Storage temperature range –30 to +5 mA –0.5 to VCC V 48 mA 0 to +70 °C –65 to +150 °C RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER MIN NOM MAX 5.0 5.5 VCC Supply voltage 4.5 VIH High-level input voltage 2.0 VIL Low-level input voltage UNIT V V 0.8 V IIK Input clamp current –18 mA IOH High-level output current –2.6 mA IOL Low-level output current 24 mA +70 °C Tamb Operating free-air temperature range 0 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL TEST CONDITIONS1 PARAMETER LIMITS MIN TYP2 MAX UNIT VOH O High level output voltage High-level VCC±10%,, VIL = MAX,, VIH = MIN IOH = –0.4mA VCC – 2 IOH = MAX 2.4 IOL = 12mA 0.40 V Low level output voltage Low-level VCC = MIN,, VIL = MAX,, VIH = MIN 0.25 VOL O IOL = 24mA 0.35 0.50 V VIK –0.73 –1.5 V 0.1 mA Input clamp voltage VCC = MIN, II = IIK II Input current at maximum input voltage VCC = MAX, VI = 7.0V IIH High-level input current VCC = MAX, VI = 2.7V V 3.2 E, CP IIL Low level input current Low-level IO current3 ICC Output Supply current (total) Dn VCC = MAX, MAX VI = 0 0.4V 4V VCC = MAX, VO = 2.25V ICCH ICCL VCC = MAX –30 V 20 µA –0.1 mA –0.2 mA –112 mA 12 18 mA 20 29 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. 1991 Feb 08 4 Philips Semiconductors Product specification Octal D flip-flop with enable 74ALS377 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω TEST CONDITION MIN fMAX Maximum clock frequency tPLH tPHL Propagation delay CP to Qn Waveform 1 65 Waveform 1 2.0 3.0 UNIT MAX MHz 8.0 11.0 ns AC SETUP REQUIREMENTS LIMITS SYMBOL PARAMETER Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω TEST CONDITION MIN tsu(H) tsu(L) Setup time, High or Low Dn to CP th(H) th(L) UNIT MAX Waveform 2 5.0 5.0 ns Hold time, High or Low Dn to CP Waveform 2 0.0 0.0 ns tsu(H) tsu(L) Setup time, High or Low E to CP Waveform 2 1.0 1.0 ns th(H) th(L) Hold time, High or Low E to CP Waveform 2 3.0 3.0 ns tw(H) tw(L) CP pulse width, High or Low Waveform 1 6.0 8.0 ns AC WAVEFORMS For all waveforms, VM = 1.3V. The shaded areas indicate when the input is permitted to change for predictable output performance. 1/fmax CP VM Dn VM VM VM tw(H) tsu tPHL tw(L) VM th tPLH E Qn VM VM VM VM VM VM th = 0 tsu(L) SF00294 Waveform 1. Propagation Delay for Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency CP VM tsu(H) th = 0 VM SC00076 Waveform 2. Data and Enable Setup and Hold Times 1991 Feb 08 5 Philips Semiconductors Product specification Octal D flip-flop with enable 74ALS377 TEST CIRCUIT AND WAVEFORMS VCC NEGATIVE PULSE VIN CL RL AMP (V) VM 10% D.U.T. RT 90% VM VOUT PULSE GENERATOR tw 90% 10% tTHL (tff) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0.3V AMP (V) 90% Test Circuit for Totem-pole Outputs POSITIVE PULSE 90% VM VM 10% 10% tw 0.3V Input Pulse Definition DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. INPUT PULSE REQUIREMENTS Family Amplitude VM 74ALS 3.5V 1.3V Rep.Rate tw tTLH tTHL 1MHz 500ns 2.0ns 2.0ns SC00005 1991 Feb 08 6 Philips Semiconductors Product specification Octal D flip–flop with enable 74ALS377 DIP20: plastic dual in-line package; 20 leads (300 mil) 1991 Feb 08 7 SOT146-1 Philips Semiconductors Product specification Octal D flip–flop with enable 74ALS377 SO20: plastic small outline package; 20 leads; body width 7.5 mm 1991 Feb 08 8 SOT163-1 Philips Semiconductors Product specification Octal D flip–flop with enable 74ALS377 SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm 1991 Feb 08 9 SOT339-1 Philips Semiconductors Product specification Octal D flip–flop with enable 74ALS377 DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Copyright Philips Electronics North America Corporation 1997 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 1991 Feb 08 10