INTEGRATED CIRCUITS 74LV4316 Quad bilateral switches Product specification Supersedes data of 1994 Dec 01 IC24 Data Handbook 1998 Jun 23 Philips Semiconductors Product specification Quad bilateral switches 74LV4316 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0V to 6.0V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Low typ “ON” resistance: The 74LV4316 is a low-voltage CMOS device that is pin and function compatible with 74HC/HCT4316. The 74LV4316 has four independent analog switches. Each switch has two input/output terminals (nY, nZ) and an active HIGH select input (nS). When the enable input (E) is HIGH, all four analog switches are turned off. Current through a switch will not cause additional VCC current provided the voltage at the terminals of the switch is maintained within the supply voltage range; VCC > (VY, VZ) > VEE. Inputs nY and nZ are electrically equivalent terminals. VCC and GND are the supply voltage pins for the digital control inputs (E and nS). The VCC to GND ranges are 1.0 to 6.0 V. The analog inputs/outputs (nY and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC – VEE may not exceed 6.0 V. 80 at VCC – VEE = 4.5V 120 at VCC – VEE = 3.0V 295 at VCC – VEE = 2.0V • Logic level translation: to enable 3V logic to communicate with 3V analog signals • Typical “break before make” built in • Output capability: non-standard • ICC category: MSI QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr =tf 2.5 ns SYMBOL PARAMETER tPZH/tPZL Turn “ON” time: E to VOS nS to VOS tPHZ/tPLZ Turn “OFF” time: E to VOS nS to VOS CI Input capacitance CPD Power dissipation capacitance per switch CS Maximum switch capacitance CONDITIONS CL = 15pF RL = 1K VCC= 3.3V Notes 1, 2 TYPICAL UNIT 19 ns 20 ns 3.5 pF 13 pF 5 pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; VCC = supply voltage in V: (CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # 16-Pin Plastic DIL –40°C to +125°C 74LV4316 N 74LV4316 N SOT38-4 16-Pin Plastic SO –40°C to +125°C 74LV4316 D 74LV4316 D SOT109-1 16-Pin Plastic SSOP Type II –40°C to +125°C 74LV4316 DB 74LV4316 DB SOT338-1 16-Pin Plastic TSSOP Type I –40°C to +125°C 74LV4316 PW 74LV4316PW DH SOT403-1 PIN CONFIGURATION PIN DESCRIPTION 1Z 1 16 VCC 1Y 2 15 1S 2Y 3 14 4S 2Z 4 13 4Z 2S 5 12 4Y 3S 6 11 3Y E 7 10 3Z GND 8 9 PIN NUMBER VEE SYMBOL FUNCTION 1, 4, 10, 13 1Z – 4Z Independent inputs/outputs 2, 3, 11, 12 1Y – 4Y Independent inputs/outputs 7 E Enable input (active LOW) 8 GND Ground (0V) 9 VEE Negative supply voltage 15, 5, 6, 14 1S – 4S 16 VCC Select inputs (active HIGH) Positive supply voltage SV01650 1998 Jun 23 2 853-2079 19619 Philips Semiconductors Product specification Quad bilateral switches 74LV4316 IEC LOGIC SYMBOL 7 FUNCTIONAL DIAGRAM 7 G1 2 1 2 15 # 15 # 4 3 16 G1 V CC 2 2 1 15 4 5 10 LOGIC LEVEL CONVERSION AND CONTROL 10 11 6 # 6 6 # 13 12 2 2Z 4 2Y 3 3Z 10 3Y 11 4Z 13 4Y 12 3S 13 12 14 # 1Y 2S 5 # 11 1 1X2 3 5 # 1Z 1S 14 14 # (a) (b) SV01658 4S E GND V EE 7 8 9 SV01653 LOGIC SYMBOL 15 5 6 14 7 1Y 2 1S 1Z 1 2Y 3 2S 2Z 4 3Y 11 3Z 10 4Y 12 4Z 13 3S 4S E SV01651 SCHEMATIC DIAGRAM (ONE SWITCH) nY to other switches E LOGIC LEVEL CONVERSION nS LOGIC LEVEL CONVERSION VCC VEE VEE VCC nZ SV01654 1998 Jun 23 3 Philips Semiconductors Product specification Quad bilateral switches 74LV4316 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER VI Input voltage VO Output voltage Tamb tr, tf CONDITIONS MIN TYP MAX UNIT See Note 1 1.0 3.3 6.0 V 0 – VCC V 0 – VCC V +85 +125 °C 500 200 100 50 ns/V DC supply voltage Operating ambient temperature range in free air Input rise and fall times See DC and AC characteristics –40 –40 VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V – – – – – – – – NOTE: 1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V. ABSOLUTE MAXIMUM RATINGS1, 2 In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER VCC DC supply voltage CONDITIONS RATING UNIT –0.5 to +7.0 V IIK DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA IOK DC output diode current VO < –0.5 or VO > VCC + 0.5V 20 mA IO DC switch current –0.5V < VO < VCC + 0.5V 25 mA Tstg Storage temperature range –65 to +150 °C PTOT Power dissipation per package – plastic DIL – plastic mini-pack (SO) – plastic shrink mini-pack (SSOP and TSSOP) for temperature range: –40 to +125°C above +70°C derate linearly with 12 mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K 750 500 400 mW NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Jun 23 4 Philips Semiconductors Product specification Quad bilateral switches 74LV4316 DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER -40°C to +85°C TEST CONDITIONS MIN VIH VIL HIGH level Input voltage LOW level Input voltage TYP1 -40°C to +125°C MAX MIN VCC = 1.2 V 0.90 0.90 VCC = 2.0 V 1.40 1.4 VCC = 2.7 to 3.6 V 2.00 2.0 VCC = 4.5 V 3.15 3.15 VCC = 6.0 V 4.20 UNIT MAX V 4.20 VCC = 1.2 V 0.30 0.30 VCC = 2.0 V 0.60 0.60 VCC = 2.7 to 3.6 V 0.80 0.80 VCC = 4.5 V 1.35 1.35 V VCC = 6.0 V 1.80 1.80 ±II Input leakage current VCC = 3.6 V; VI = VCC or GND VCC = 6.0 V; VI = VCC or GND 1.0 2.0 1.0 2.0 µA ±IS Analog switch OFF-state current per channel VCC = 3.6 V; VI = VIH or VIL VCC = 6.0 V; VI = VIH or VIL 1.0 2.0 1.0 2.0 µA ±IS Analog switch ON-state current per channel VCC = 3.6 V; VI = VIH or VIL VCC = 6.0 V; VI = VIH or VIL 1.0 2.0 1.0 2.0 µA ICC Quiescent supply current VCC = 3.6V; VI = VCC or GND; IO = 0 VCC = 6.0V; VI = VCC or GND; IO = 0 20 40 40 80 µA ∆ICC Additional quiescent supply current per input VCC = 2.7 V to 3.6 V; VI = VCC – 0.6 V 500 850 µA ON-resistance (peak) VCC = 1.2 V; VI = VIH or VIL VCC = 2.0 V; VI = VIH or VIL VCC = 2.7 V; VI = VIH or VIL VCC = 3.0 to 3.6 V; VI = VIH or VIL VCC = 4.5 V; VI = VIH or VIL VCC = 6.0 V; VI = VIH or VIL 295 120 110 80 70 – 860 300 270 200 180 – 990 360 325 240 215 Ω ON-resistance (rail) VCC = 1.2 V; VI = VIH or VIL VCC = 2.0 V; VI = VIH or VIL VCC = 2.7 V; VI = VIH or VIL VCC = 3.0 to 3.6 V; VI = VIH or VIL VCC = 4.5 V; VI = VIH or VIL VCC = 6.0 V; VI = VIH or VIL 225 110 85 55 40 35 – 240 150 135 100 90 – 290 180 180 120 110 Ω ON-resistance (rail) VCC = 1.2 V; VI = VIH or VIL VCC = 2.0 V; VI = VIH or VIL VCC = 2.7 V; VI = VIH or VIL VCC = 3.0 to 3.6 V; VI = VIH or VIL VCC = 4.5 V; VI = VIH or VIL VCC = 6.0 V; VI = VIH or VIL 250 120 75 60 45 40 – 270 170 155 115 105 – 325 205 180 135 120 Ω Maximum variation of ON-resistance between any two channels VCC = 1.2 V; VI = VIH or VIL VCC = 2.0 V; VI = VIH or VIL VCC = 2.7 V; VI = VIH or VIL VCC = 3.0 to 3.6 V; VI = VIH or VIL VCC = 4.5 V; VI = VIH or VIL VCC = 6.0 V; VI = VIH or VIL – 5 4 4 3 2 RON RON RON ∆RON NOTE: 1. All typical values are measured at Tamb = 25°C. 2. At supply voltage approaching 1.2V, the analog switch ON-resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital signals only, when using these supply voltages. 1998 Jun 23 5 Ω Philips Semiconductors Product specification Quad bilateral switches 74LV4316 LOW (from select inputs) HIGH (from select inputs) V nY nZ nY nZ A I Vis = 0 to VCC – VEE V A VI = VCC or VEE is VO= VEE or VCC V EE EE SV01655 SV01656 Figure 1. Test circuit for measuring ON-resistance (Ron). Figure 2. Test circuit for measuring OFF-state current. 300 HIGH VCC = 2.0 V (from select inputs) RON (W) 250 200 nY A nZ V O 150 VCC = 3.0 V (open circuit) 100 50 VI = VCC or VEE VCC = 4.5 V 0 VEE 0 SV01657 1.2 2.4 3.6 Vis (V) 4.8 SV01658 Figure 3. Test circuit for measuring ON-state current. Figure 4. Typical ON-resistance (RON) as a function of input voltage (Vis) for Vis = 0 to VCC – VEE. 1998 Jun 23 6 Philips Semiconductors Product specification Quad bilateral switches 74LV4316 AC CHARACTERISTICS GND = 0 V; tr = tf ≤ 2.5ns; CL = 50pF LIMITS SYMBOL –40 to +85 °C PARAMETER MIN TYP1 –40 to +125 °C MAX MIN MAX VCC(V) 30 tPHL/tPLH Propagation g delay y Vis to Vos tPZH/tPZL Turn-on time E to Vos tPZH/tPZL Turn-on time nS to Vos tPHZ/tPLZ Turn-off time E to Vos tPHZ/tPLZ Turn-off time nS to Vos 19 24 8 14 18 6* 11 9 7 14 12 9 70 51 41 35 27 85 63 50 43 33 61 45 36 31 23 75 55 44 37 29 68 51 41 35 28 80 59 48 41 32 59 44 36 31 24 70 52 42 36 28 NOTES: 1. All typical values are measured at Tamb = 25°C. 2. All typical values are measured at VCC = 3.3V 1998 Jun 23 OTHER 1.2 10 5 4 110 37 28 212 19 15 95 32 24 182 16 12 105 37 28 222 20 16 90 32 24 192 17 14 CONDITION UNIT 7 2.0 ns ns ns ns ns 2.7 3.0 to 3.6 4.5 6.0 1.2 2.0 2.7 3.0 to 3.6 4.5 6.0 1.2 2.0 2.7 3.0 to 3.6 4.5 6.0 1.2 2.0 2.7 3.0 to 3.6 4.5 6.0 1.2 2.0 2.7 3.0 to 3.6 4.5 6.0 RL = ∞; CL = 50 pF F Figure 12 g RL = 1 k k; CL = 50 pF F Figures and gu es 13 3a d 14 RL = 1 k k; CL = 50 pF F Figures and gu es 13 3a d 14 RL = 1 k; CL = 50 pF F Figures gu es 13 3a and d 14 RL = 1 k; CL = 50 pF F Figures gu es 13 3a and d 14 Philips Semiconductors Product specification Quad bilateral switches 74LV4316 ADDITIONAL AC CHARACTERISTICS GND = 0 V; tr = tf ≤ 2.5ns; CL = 50pF SYMBOL PARAMETER TYP 0.80 0.40 2.40 1.20 –50 –50 –60 –60 Sine-wave distortion f = 1 kHz Sine-wave distortion f = 10 kHz Switch “OFF” OFF signal feed through Crosstalk between any two switches fmax Minimum frequency res response onse (–3 dB) CS Maximum switch capacitance % % dB dB 110 Crosstalk voltage g between enable or address input to any switch (peak-to-peak value) V(p–p) ( ) VCC (V) 3.0 6.0 3.0 6.0 3.0 6.0 3.0 6.0 UNIT VIS(P–P) (V) 2.75 5.50 2.75 5.50 Note 1 Note 1 6.0 180 200 5 3.0 6.0 mHz RL = 10 kW; CL = 50 pF Figure 10 RL = 10 kW; CL = 50 pF Figure 10 RL = 600 kW; CL = 50 pF; f=1 MHz Figures 5 and 11 RL = 600 kW; CL = 50 pF; f=1 MHz Figure 7 RL = 600 kW; CL = 50 pF; f=1 MHz E square wave between VCC (nS or E, and GND, Tr = tf = 6 ns) Figure 8 3.0 mV 220 CONDITIONS Note 2 RL = 50 kW; CL = 50 pF Figures 6 and 9 pF GENERAL NOTES: Vis is the input voltage at nY or nZ terminal, whichever is assigned as an input. Vos is the output voltage at nY or nZ terminal, whichever is assigned as an output. NOTES: 1. Adjust input voltage Vis is 0 dBm level (0 dBm = 1 mW into 600 W). 2. Adjust input voltage Vis is 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 W). 0 (dB) 5 (dB) –50 0 – –100 10 2 10 10 3 10 4 f (kHz) 10 5 5 10 2 10 10 6 10 3 10 4 10 5 f (kHz) SV01635 10 6 SV01664 Figure 5. Typical switch “OFF” signal feed-through as a function of frequency. Figure 6. Typical frequency response. NOTES TO FIGURES 5 AND 6: Test conditions: VCC = 3.0 V; GND = 0 V; RL = 50 W; RSOURCE = 1kW. VCC 0.1 mF V RL VCC 2RL 2RL 2RL nY/nZ VCC nZ/nY nZ/nY nY/nZ Vos is channel ON 2RL CL RL 2RL channel OFF GND CL dB GND (a) (b) SV01665 Figure 7. Test circuit for measuring crosstalk between any two switches. (a) channel ON condition; (b) channel OFF condition. 1998 Jun 23 8 Philips Semiconductors Product specification Quad bilateral switches VCC 74LV4316 VCC nS or E 2R L VCC 2R L nY/nZ nZ/nY 0.1 mF DUT 2R L 2RL nY/nZ nZ/nY ~ Vis sine-wave 2R L CL Vos oscilloscope 2RL channel ON CL dB GND GND VEE SV01667 SV01666 Figure 9. Test circuit for measuring minimum frequency response. Figure 8. Test circuit for measuring crosstalk between control and any switch. NOTE TO FIGURE 9: Adjust input voltage to obtain 0 dBm at VOS when Fin = 1 MHz. After set-up frequency of fin is increased to obtain a reading of –3 dB at VOS. NOTE TO FIGURE 8: The crosstalk is defined as follows (oscilloscope output): V(p – p) SV01642 VCC VCC fin ≅ 1 kHz sine-wave 10 mF 2RL nY/nZ nZ/nY 0.1 mF Vos channel ON 2RL CL V distortion meter 2RL Yn/Z Z/Yn VOS is channel OFF GND 2RL CL dB SV01668 GND Figure 10. Test circuit for measuring sine-wave distortion. SV01639 Figure 11. Test circuit for measuring switch “OFF” signal feed-through. 1998 Jun 23 9 Philips Semiconductors Product specification Quad bilateral switches 74LV4316 WAVEFORMS VM = 1.5 V at 2.7 V ≤ VCC ≤ 3.6 V VM = 0.5 × VCC at 2.7 V > VCC > 3.6 V VOL and VOH are the typical output voltage drop that occur with the output load Vx = VOL + 0.3 V at 2.7 V ≤ VCC ≤ 3.6 V VX = VOL + 0.1 × VCC at 2.7 V >VCC > 3.6 V VY = VOH – 0.3 V at 2.7 V ≤ VCC ≤ 3.6 V VY = VOH – 0.1 × VCC at 2.7 V >VCC > 3.6 V VI VI INPUTS INPUTS VM VM GND GND t PLH VCC OUTPUT LOW-to-OFF OFF-to-LOW VOL V OH VM OUTPUTS tPZL tPLZ t PHL VM VX tPZH tPHZ V OL VOH SV01638 VY OUTPUT HIGH-to-OFF OFF-to-HIGH GND Figure 12. Input (Vis) to output (Vos) propagation delays. VM outputs disabled outputs enabled outputs enabled SV01640 Figure 13. Turn-on and turn-off times for the inputs (nS, E) to the output (Vos). TEST CIRCUIT tW 90% S1 Vcc VS1 Open GND NEGATIVE PULSE 90% VM VI VM 10% 10% 0V Vl RL = 1k VO PULSE GENERATOR tTHL (tf) D.U.T. tTLH (tr) tTLH (tr) RL = 1k RT CL= 50pF tTHL (tf) 90% POSITIVE PULSE VI 90% VM VM 10% tW Test Circuit for Outputs 10% 0V VM = 1.5V Input Pulse Definition DEFINITIONS SWITCH POSITION VI VS1 < 2.7V VCC 2 VCC VS1 2.7–3.6V 2.7V 2 VCC GND ≥ 4.5 V VCC 2 VCC TEST S1 tPLH/tPHL Open tPLZ/tPZL tPHZ/tPZH VCC RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. SY00044 Figure 14. Load circuitry for switching times. 1998 Jun 23 10 Philips Semiconductors Product specification Quad bilateral latches 74LV4316 DIP16: plastic dual in-line package; 16 leads (300 mil) 1998 Jun 23 11 SOT38-4 Philips Semiconductors Product specification Quad bilateral latches 74LV4316 SO16: plastic small outline package; 16 leads; body width 3.9 mm 1998 Jun 23 12 SOT109-1 Philips Semiconductors Product specification Quad bilateral latches 74LV4316 SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm 1998 Jun 23 13 SOT338-1 Philips Semiconductors Product specification Quad bilateral latches 74LV4316 TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm 1998 Jun 23 14 SOT403-1 Philips Semiconductors Product specification Quad bilateral latches 74LV4316 NOTES 1998 Jun 23 15 Philips Semiconductors Product specification Quad bilateral switches 74LV4316 DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: yyyy mmm dd 16 Date of release: 05-96 9397-750-04663