IRF IRF6622

PD - 97199
IRF6622
DirectFET™ Power MOSFET ‚
l
l
l
l
l
l
l
l
l
RoHs Compliant Containing No Lead and Bromide 
Low Profile (<0.6 mm)
Dual Sided Cooling Compatible 
Ultra Low Package Inductance
Optimized for High Frequency Switching 
Ideal for CPU Core DC-DC Converters
Optimized for Control FET Socket 
Low Conduction and Switching Losses
Compatible with existing Surface Mount Techniques 
Typical values (unless otherwise specified)
VDSS
VGS
RDS(on)
RDS(on)
25V max ±20V max 4.9mΩ@ 10V 6.8mΩ@ 4.5V
Qg
Qgd
Qgs2
Qrr
Qoss
Vgs(th)
3.8nC
1.6nC
7.1nC
7.7nC
1.8V
tot
11nC
DirectFET™ ISOMETRIC
SQ
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
MP
Description
The IRF6622 combines the latest HEXFET Power MOSFET Silicon Technology with the advanced DirectFET packaging to achieve the
lowest combined on-state resistance and gate charge in a package that has a footprint similar to that of a Micro-8, and only 0.6mm profile.
The IRF6622 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching
losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors
operating at higher frequencies. The IRF6622 has been optimized for parameters that are critical in synchronous buck including Rds(on) and
gate charge.
Absolute Maximum Ratings
Parameter
VDS
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
g
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
h
VGS, Gate-to-Source Voltage (V)
Typical RDS(on) (mΩ)
20
ID = 15A
15
10
T J = 125°C
5
T J = 25°C
0
3
4
5
6
7
8
9
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance Vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
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e
e
f
Max.
Units
25
±20
15
12
59
120
13
12
V
A
mJ
A
6.0
ID= 12A
VDS= 20V
VDS= 13V
5.0
4.0
VDS= 5.0V
3.0
2.0
1.0
0.0
0
2
4
6
8
10
12
14
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 0.18mH, RG = 25Ω, IAS = 12A.
1
04/04/06
IRF6622
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
BVDSS
Drain-to-Source Breakdown Voltage
25
–––
–––
∆ΒVDSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient
–––
17
–––
Static Drain-to-Source On-Resistance
–––
4.9
6.3
–––
6.8
8.9
VGS = 0V, ID = 250µA
V
mV/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 15A c
VGS = 4.5V, ID = 12A c
VGS(th)
Gate Threshold Voltage
1.35
1.8
2.35
V
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
–––
-5.9
–––
mV/°C
Drain-to-Source Leakage Current
–––
–––
1.0
µA
IGSS
gfs
Qg
Conditions
Typ. Max. Units
VDS = VGS, ID = 25µA
VDS = 20V, VGS = 0V
VDS = 20V, VGS = 0V, TJ = 125°C
–––
–––
Gate-to-Source Forward Leakage
–––
–––
150
100
nA
VGS = 20V
Gate-to-Source Reverse Leakage
–––
–––
-100
VGS = -20V
S
VDS = 13V, ID = 12A
Forward Transconductance
55
–––
–––
Total Gate Charge
–––
11
17
Qgs1
Pre-Vth Gate-to-Source Charge
–––
2.5
–––
Qgs2
Post-Vth Gate-to-Source Charge
–––
1.6
–––
Qgd
Gate-to-Drain Charge
–––
3.8
–––
ID = 12A
Qgodr
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
3.1
–––
See Fig. 15
Qsw
–––
5.4
–––
Qoss
RG
Output Charge
Gate Resistance
–––
–––
7.7
1.8
–––
3.1
td(on)
Turn-On Delay Time
–––
13
–––
VDD = 13V, VGS = 4.5Vc
ID = 12A
VDS = 13V
nC
nC
VGS = 4.5V
VDS = 16V, VGS = 0V
Ω
tr
Rise Time
–––
87
–––
td(off)
Turn-Off Delay Time
–––
14
–––
tf
Fall Time
–––
5.6
–––
Ciss
Input Capacitance
–––
1450
–––
Coss
Output Capacitance
–––
380
–––
Crss
Reverse Transfer Capacitance
–––
210
–––
Min.
Typ. Max. Units
–––
–––
2.7
–––
–––
120
integral reverse
ns
Clamped Inductive Load
VGS = 0V
pF
VDS = 13V
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
Conditions
MOSFET symbol
A
showing the
VSD
Diode Forward Voltage
–––
–––
1.0
V
p-n junction diode.
TJ = 25°C, IS = 12A, VGS = 0V c
trr
Reverse Recovery Time
–––
10
15
ns
TJ = 25°C, IF = 12A
Qrr
Reverse Recovery Charge
–––
7.1
11
nC
di/dt = 500A/µs c
(Body Diode)d
Notes:
 Pulse width ≤ 400µs; duty cycle ≤ 2%.
‚ Repetitive rating; pulse width limited by max. junction temperature.
2
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IRF6622
Absolute Maximum Ratings
c
c
f
Max.
Units
2.2
1.4
34
270
-40 to + 150
W
Parameter
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
°C
Thermal Resistance
Parameter
cg
dg
eg
fg
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
Typ.
Max.
Units
–––
12.5
20
–––
1.0
58
–––
–––
3.7
–––
°C/W
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Linear Derating Factor
c
0.017
W/°C
100
Thermal Response ( Z thJA )
D = 0.50
10
0.20
0.10
0.05
1
0.02
0.01
τJ
R1
R1
τJ
τ1
R2
R2
R3
R3
R4
R4
Ri (°C/W)
R5
R5
τA
τ2
τ1
τ2
τ3
τ3
τ4
τ4
τ5
1.620
τA
τ5
Ci= τi/Ri
Ci= τi/Ri
0.1
0.01
1E-006
0.0001
0.001
2.141
0.001354
22.289
0.375850
20.046
7.41
11.914
99
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-005
τi (sec)
0.000126
0.01
0.1
1
10
100
1000
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 
Notes:
 Surface mounted on 1 in. square Cu board, steady state.
‚ Used double sided cooling , mounting pad.
ƒ Mounted on minimum footprint full size board with metalized
„ TC measured with thermocouple incontact with top (Drain) of part.
… Rθ is measured at TJ of approximately 90°C.
back and with small clip heatsink.
 Surface mounted on 1 in. square Cu (still
air).
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ƒ Mounted to a PCB with
small clip heatsink (still air)
ƒ Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF6622
1000
1000
ID, Drain-to-Source Current (A)
100
BOTTOM
10
TOP
ID, Drain-to-Source Current (A)
TOP
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
100
1
2.5V
0.1
BOTTOM
10
2.5V
≤60µs PULSE WIDTH
0.1
1
10
1
100
0.1
1000
Fig 4. Typical Output Characteristics
100
1000
2.0
VDS = 15V
≤60µs PULSE WIDTH
ID = 15A
Typical RDS(on) (Normalized)
ID, Drain-to-Source Current (Α)
10
Fig 5. Typical Output Characteristics
1000
100
T J = 150°C
T J = 25°C
10
T J = -40°C
1
0.1
V GS = 10V
1.5
1.0
V GS = 4.5V
0.5
1
2
3
4
5
20 40 60 80 100 120 140 160
Fig 7. Normalized On-Resistance vs. Temperature
Fig 6. Typical Transfer Characteristics
10000
-60 -40 -20 0
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
50
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
T J = 25°C
Vgs = 3.5V
Vgs = 4.0V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 10V
40
Typical RDS(on) ( mΩ)
C oss = C ds + C gd
C, Capacitance(pF)
1
V DS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Ciss
1000
Coss
30
20
10
Crss
0
100
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
≤60µs PULSE WIDTH
Tj = 150°C
Tj = 25°C
0.01
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
0
20
40
60
80
100
120
ID, Drain Current (A)
Fig 9. Typical On-Resistance Vs.
Drain Current and Gate Voltage
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IRF6622
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
100
10
T J = 150°C
T J = 25°C
T J = -40°C
1
100µsec
10
1
0.1
T A = 25°C
VGS = 0V
10msec
Single Pulse
0
0.01
0.2
0.4
0.6
0.8
1.0
1.2
0.01
VSD, Source-to-Drain Voltage (V)
0.10
1.00
10.00
100.00
VDS, Drain-to-Source Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig11. Maximum Safe Operating Area
60
Typical VGS(th) Gate threshold Voltage (V)
3.0
50
ID, Drain Current (A)
1msec
T J = 150°C
40
30
20
10
2.5
2.0
ID = 50µA
50
75
100
125
ID = 100µA
1.0
ID = 250µA
ID = 1mA
0.5
ID = 1.0A
0.0
0
25
ID = 25µA
1.5
-75 -50 -25
150
0
25
50
75 100 125 150
T J , Temperature ( °C )
T C , Case Temperature (°C)
Fig 12. Maximum Drain Current vs. Case Temperature
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
EAS , Single Pulse Avalanche Energy (mJ)
60
ID
3.7A
5.3A
BOTTOM 12A
TOP
50
40
30
20
10
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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5
IRF6622
Current Regulator
Same Type as D.U.T.
Id
Vds
50KΩ
Vgs
.2µF
12V
.3µF
+
V
- DS
D.U.T.
Vgs(th)
VGS
3mA
IG
ID
Qgs1 Qgs2
Current Sampling Resistors
Fig 15a. Gate Charge Test Circuit
Qgd
Qgodr
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
V
RGSG
+
V
- DD
IAS
20V
tp
A
I AS
0.01Ω
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
VDD D.U.T
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
Fig 17a. Switching Time Test Circuit
6
10%
VGS
td(on)
tr
td(off)
tf
Fig 17b. Switching Time Waveforms
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IRF6622
D.U.T
Driver Gate Drive
+
ƒ
+
‚
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
P.W.
Re-Applied
Voltage
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
-
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET™ Substrate and PCB Layout, SQ Outline
(Small Size Can, Q-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
G = GATE
D = DRAIN
S = SOURCE
D
D
G
D
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S
D
7
IRF6622
DirectFET™ Outline Dimension, SQ Outline
(Small Size Can, Q-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC
MAX
CODE MIN
4.85
A
4.75
3.95
B
3.70
2.85
C
2.75
0.45
D
0.35
0.52
E
0.48
0.82
F
0.78
0.92
G
0.88
0.82
H
0.78
N/A
J
N/A
0.97
K
0.93
2.10
L
2.00
0.59
M
0.48
0.08
N
0.03
0.17
P
0.08
IMPERIAL
MIN
MAX
0.187
0.191
0.146
0.156
0.108
0.112
0.014
0.018
0.019
0.020
0.031
0.032
0.035
0.036
0.031
0.032
N/A
N/A
0.037
0.038
0.079
0.083
0.019
0.023
0.001
0.003
0.003
0.007
DirectFET™ Part Marking
8
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IRF6622
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6622). For 1000 parts on 7" reel,
order IRF6622TR1
REEL DIMENSIONS
STANDARD OPTION (QTY 4800)
TR1 OPTION (QTY 1000)
IMPERIAL
IMPERIAL
METRIC
METRIC
MAX
MIN
MIN
CODE
MIN
MIN
MAX
MAX
MAX
A
N.C
6.9
12.992
330.0
177.77 N.C
N.C
N.C
B
0.75
0.795
N.C
20.2
19.06
N.C
N.C
N.C
C
0.53
0.504
0.50
12.8
13.5
0.520
12.8
13.2
D
0.059
0.059
N.C
1.5
1.5
N.C
N.C
N.C
E
2.31
3.937
N.C
100.0
58.72
N.C
N.C
N.C
F
N.C
N.C
0.53
N.C
N.C
0.724
13.50
18.4
G
0.47
0.488
N.C
12.4
11.9
0.567
12.01
14.4
H
0.47
0.469
N.C
11.9
11.9
0.606
12.01
15.4
Loaded Tape Feed Direction
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
DIMENSIONS
IMPERIAL
METRIC
MIN
MAX
MAX
0.311
0.319
8.10
0.154
0.161
4.10
0.469
0.484
12.30
0.215
0.219
5.55
0.158
0.165
4.20
0.197
0.205
5.20
0.059
N.C
N.C
0.059
0.063
1.60
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.04/06
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9
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/