PHILIPS PEMD48

PEMD48; PUMD48
NPN/PNP resistor-equipped transistors;
R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2 = 47 kΩ
Rev. 05 — 13 April 2010
Product data sheet
1. Product profile
1.1 General description
NPN/PNP double Resistor-Equipped Transistors (RET) in small Surface-Mounted
Device (SMD) plastic packages.
Table 1.
Product overview
Type number
Package
NXP
JEITA
Package
configuration
PEMD48
SOT666
-
ultra small and flat lead
PUMD48
SOT363
SC-88
very small
1.2 Features and benefits
„ Built-in bias resistors
„ Simplifies circuit design
„ Reduces component count
„ Reduces pick and place costs
1.3 Applications
„ Low current peripheral driver
„ Replacement of general-purpose transistors in digital applications
„ Control IC inputs
1.4 Quick reference data
Table 2.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max
Unit
-
-
50
V
-
-
100
mA
kΩ
Per transistor; for the PNP transistor with negative polarity
VCEO
collector-emitter voltage
IO
output current
open base
Transistor TR1 (NPN)
R1
bias resistor 1 (input)
33
47
61
R2/R1
bias resistor ratio
0.8
1
1.2
Transistor TR2 (PNP)
R1
bias resistor 1 (input)
1.54
2.2
2.86
R2/R1
bias resistor ratio
17
21
26
kΩ
PEMD48; PUMD48
NXP Semiconductors
NPN/PNP resistor-equipped transistors
2. Pinning information
Table 3.
Pinning
Pin
Description
Simplified outline
Graphic symbol
PEMD48 (SOT666)
1
GND (emitter) TR1
2
input (base) TR1
3
output (collector) TR2
4
GND (emitter) TR2
5
input (base) TR2
6
6
5
6
4
5
R1
4
R2
TR2
1
output (collector) TR1
2
TR1
3
R2
1
R1
2
3
006aaa143
PUMD48 (SOT363)
1
GND (emitter) TR1
2
input (base) TR1
3
output (collector) TR2
4
GND (emitter) TR2
5
input (base) TR2
6
output (collector) TR1
6
5
4
6
5
R1
1
2
3
4
R2
TR2
TR1
R2
1
R1
2
3
006aaa143
3. Ordering information
Table 4.
Ordering information
Type number
Package
Name
Description
Version
PEMD48
-
plastic surface-mounted package; 6 leads
SOT666
PUMD48
SC-88
plastic surface-mounted package; 6 leads
SOT363
4. Marking
Table 5.
Marking codes
Type number
Marking code[1]
PEMD48
48
PUMD48
4*8
[1]
* = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
PEMD48_PUMD48_5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
© NXP B.V. 2010. All rights reserved.
2 of 12
PEMD48; PUMD48
NXP Semiconductors
NPN/PNP resistor-equipped transistors
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Per transistor; for the PNP transistor with negative polarity
VCBO
collector-base voltage
open emitter
-
50
V
VCEO
collector-emitter voltage
open base
-
50
V
VEBO
emitter-base voltage
open collector
-
10
V
VI
input voltage TR1
positive
-
+40
V
negative
-
−10
V
-
+5
V
input voltage TR2
positive
negative
-
−12
V
IO
output current
-
100
mA
ICM
peak collector current
-
100
mA
Ptot
total power dissipation
Tamb ≤ 25 °C
PEMD48 (SOT666)
[1][2]
-
200
mW
PUMD48 (SOT363)
[1]
-
200
mW
PEMD48 (SOT666)
[1][2]
-
300
mW
PUMD48 (SOT363)
[1]
-
300
mW
Per device
Ptot
PEMD48_PUMD48_5
Product data sheet
total power dissipation
Tamb ≤ 25 °C
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
−65
+150
°C
Tstg
storage temperature
−65
+150
°C
[1]
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2]
Reflow soldering is the only recommended soldering method.
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
© NXP B.V. 2010. All rights reserved.
3 of 12
PEMD48; PUMD48
NXP Semiconductors
NPN/PNP resistor-equipped transistors
6. Thermal characteristics
Table 7.
Symbol
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor
Rth(j-a)
thermal resistance from
junction to ambient
Tamb ≤ 25 °C
PEMD48 (SOT666)
[1][2]
-
-
625
K/W
PUMD48 (SOT363)
[1]
-
-
625
K/W
PEMD48 (SOT666)
[1][2]
-
-
416
K/W
PUMD48 (SOT363)
[1]
-
-
416
K/W
Per device
Rth(j-a)
PEMD48_PUMD48_5
Product data sheet
thermal resistance from
junction to ambient
Tamb ≤ 25 °C
[1]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Reflow soldering is the only recommended soldering method.
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
© NXP B.V. 2010. All rights reserved.
4 of 12
PEMD48; PUMD48
NXP Semiconductors
NPN/PNP resistor-equipped transistors
7. Characteristics
Table 8.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor; for the PNP transistor with negative polarity
ICBO
collector-base
cut-off current
VCB = 50 V;
IE = 0 A
-
-
100
nA
ICEO
collector-emitter
cut-off current
VCE = 30 V;
IB = 0 A
-
-
1
μA
VCE = 30 V;
IB = 0 A;
Tj = 150 °C
-
-
50
μA
μA
Transistor TR1 (NPN)
IEBO
emitter-base
cut-off current
VEB = 5 V;
IC = 0 A
-
-
90
hFE
DC current gain
VCE = 5 V;
IC = 5 mA
80
-
-
VCEsat
collector-emitter
saturation voltage
IC = 10 mA;
IB = 0.5 mA
-
-
150
mV
VI(off)
off-state input voltage
VCE = 5 V;
IC = 100 μA
-
1.2
0.8
V
VI(on)
on-state input voltage
VCE = 0.3 V;
IC = 2 mA
3
1.6
-
V
R1
bias resistor 1 (input)
33
47
61
kΩ
R2/R1
bias resistor ratio
0.8
1
1.2
Cc
collector capacitance
VCB = 10 V;
IE = ie = 0 A;
f = 1 MHz
-
-
2.5
pF
μA
Transistor TR2 (PNP)
PEMD48_PUMD48_5
Product data sheet
IEBO
emitter-base
cut-off current
VEB = −5 V;
IC = 0 A
-
-
−180
hFE
DC current gain
VCE = −5 V;
IC = −10 mA
100
-
-
VCEsat
collector-emitter
saturation voltage
IC = −5 mA;
IB = −0.25 mA
-
-
−100
mV
VI(off)
off-state input voltage
VCE = −5 V;
IC = −100 μA
-
−0.6
−0.5
V
VI(on)
on-state input voltage
VCE = −0.3 V;
IC = −5 mA
−1.1
−0.75
-
V
R1
bias resistor 1 (input)
1.54
2.2
2.86
kΩ
R2/R1
bias resistor ratio
17
21
26
Cc
collector capacitance
-
-
3
VCB = −10 V;
IE = ie = 0 A;
f = 1 MHz
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
pF
© NXP B.V. 2010. All rights reserved.
5 of 12
PEMD48; PUMD48
NXP Semiconductors
NPN/PNP resistor-equipped transistors
mhc007
103
mhc006
10−1
(2)
(1)
hFE
VCEsat
(V)
(3)
102
(1)
(2)
(3)
10
1
10−1
1
10
IC (mA)
102
10−2
10−1
1
VCE = 5 V
IC/IB = 20
(1) Tamb = 150 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(3) Tamb = −40 °C
Fig 1.
TR1 (NPN): DC current gain as a function of
collector current; typical values
Fig 2.
mhc008
102
VI(on)
(V)
10
IC (mA)
102
TR1 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
mhc009
10
VI(off)
(V)
10
(1)
(2)
1
(3)
(1)
1
(3) (2)
10−1
10−1
1
10
IC (mA)
102
10−1
10−2
VCE = 0.3 V
10−1
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
TR1 (NPN): On-state input voltage as a
function of collector current; typical values
Product data sheet
10
(1) Tamb = −40 °C
(3) Tamb = 100 °C
PEMD48_PUMD48_5
IC (mA)
VCE = 5 V
(1) Tamb = −40 °C
Fig 3.
1
Fig 4.
TR1 (NPN): Off-state input voltage as a
function of collector current; typical values
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
© NXP B.V. 2010. All rights reserved.
6 of 12
PEMD48; PUMD48
NXP Semiconductors
NPN/PNP resistor-equipped transistors
mhc011
103
(1)
hFE
mhc010
−103
(2)
VCEsat
(mV)
(3)
102
−102
(1)
10
(3) (2)
1
−10−1
−1
−10
IC (mA)
−102
−10
−10−1
VCE = −5 V
−1
IC (mA)
−102
IC/IB = 20
(1) Tamb = 150 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(3) Tamb = −40 °C
Fig 5.
−10
TR2 (PNP): DC current gain as a function of
collector current; typical values
mhc012
−104
Fig 6.
TR2 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
mhc013
−104
VI(off)
(mV)
VI(on)
(mV)
−103
−103
(1)
(1)
(2)
(2)
(3)
(3)
−102
−10−1
−1
−10
IC (mA)
−102
−102
−10−2
VCE = −0.3 V
−10−1
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
TR2 (PNP): On-state input voltage as a
function of collector current; typical values
Product data sheet
−10
(1) Tamb = −40 °C
(3) Tamb = 100 °C
PEMD48_PUMD48_5
IC (mA)
VCE = −5 V
(1) Tamb = −40 °C
Fig 7.
−1
Fig 8.
TR2 (PNP): Off-state input voltage as a
function of collector current; typical values
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
© NXP B.V. 2010. All rights reserved.
7 of 12
PEMD48; PUMD48
NXP Semiconductors
NPN/PNP resistor-equipped transistors
8. Package outline
1.7
1.5
6
2.2
1.8
0.6
0.5
5
6
4
1.1
0.8
5
4
2
3
0.45
0.15
0.3
0.1
1.7
1.5
2.2 1.35
2.0 1.15
1.3
1.1
pin 1 index
1
2
1
3
0.18
0.08
0.27
0.17
0.5
pin 1
index
1.3
1
Dimensions in mm
Fig 9.
04-11-08
Package outline PEMD48 (SOT666)
0.25
0.10
0.3
0.2
0.65
Dimensions in mm
06-03-16
Fig 10. Package outline PUMD48 (SOT363)
9. Packing information
Table 9.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type
number
Package Description
Packing quantity
3000
4000
8000
10000
PEMD48
SOT666
-
-
-315
-
2 mm pitch, 8 mm tape and reel
4 mm pitch, 8 mm tape and reel
PUMD48
[1]
PEMD48_PUMD48_5
Product data sheet
SOT363
-
-115
-
-
4 mm pitch, 8 mm tape and reel; T1
[2]
-115
-
-
-135
4 mm pitch, 8 mm tape and reel; T2
[3]
-125
-
-
-165
For further information and the availability of packing methods, see Section 12.
[2]
T1: normal taping
[3]
T2: reverse taping
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
© NXP B.V. 2010. All rights reserved.
8 of 12
PEMD48; PUMD48
NXP Semiconductors
NPN/PNP resistor-equipped transistors
10. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PEMD48_PUMD48_5
20100413
Product data sheet
-
PEMD48_PUMD48_4
Modifications:
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
•
•
Legal texts have been adapted to the new company name where appropriate.
•
•
•
Figure 9 and 10: superseded by minimized package outline drawings
Section 1 “Product profile”: amended
Table 3 “Pinning”: amended
Table 8 “Characteristics”: Vi(on) redefined to VI(on) on-state input voltage and Vi(off) redefined
to VI(off) off-state input voltage
Section 9 “Packing information”: added
Section 11 “Legal information”: updated
PEMD48_PUMD48_4
20040624
Product specification
-
PEMD48_PUMD48_3
PEMD48_PUMD48_3
20040602
Product specification
-
PEMD48_2
PUMD48_2
PUMD48_2
20010201
Product specification
PUMD48_1
PUMD48_1
19990422
Product specification
-
PEMD48_2
20011107
Product specification
PEMD48_1
PEMD48_1
20010924
Preliminary specification -
-
PEMD48_PUMD48_5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
© NXP B.V. 2010. All rights reserved.
9 of 12
PEMD48; PUMD48
NXP Semiconductors
NPN/PNP resistor-equipped transistors
11. Legal information
11.1
Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
11.2
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
11.3
Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
PEMD48_PUMD48_5
Product data sheet
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on a weakness or default in the
customer application/use or the application/use of customer’s third party
customer(s) (hereinafter both referred to as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Application planned. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and the
product. NXP Semiconductors does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
11.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
© NXP B.V. 2010. All rights reserved.
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PEMD48; PUMD48
NXP Semiconductors
NPN/PNP resistor-equipped transistors
12. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PEMD48_PUMD48_5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
© NXP B.V. 2010. All rights reserved.
11 of 12
PEMD48; PUMD48
NXP Semiconductors
NPN/PNP resistor-equipped transistors
13. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
10
11
11.1
11.2
11.3
11.4
12
13
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Packing information . . . . . . . . . . . . . . . . . . . . . 8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9
Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Contact information. . . . . . . . . . . . . . . . . . . . . 11
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 13 April 2010
Document identifier: PEMD48_PUMD48_5