INTEGRATED CIRCUITS DATA SHEET 74HC/HCT258 Quad 2-input multiplexer; 3-state; inverting Product specification File under Integrated Circuits, IC06 1999 Sep 02 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258 Data appears at the outputs (1Y to 4Y) in inverted form from the select inputs. FEATURES • Inverting data path The ‘258’ is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The outputs are forced to a high impedance OFF-state when OE is HIGH. • 3-state outputs interface directly with system bus • Output capability: bus driver • ICC category: MSI. The logic equations for the outputs are: GENERAL DESCRIPTION 1Y = OE × ( 1I 1 × S + 1I 0 × S ) The 74HC/HCT258 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. 2Y = OE × ( 2I 1 × S + 2I 0 × S ) 3Y = OE × ( 3I 1 × S + 3I 0 × S ) The 74HC/HCT258 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (S). 4Y = OE × ( 4I 1 × S + 4I 0 × S ) The ‘258’ is identical to the ‘257’ but has inverting outputs. The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data inputs from source 1 (1I1 to 4I1) are selected when S is HIGH. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns. TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC tPHL/tPLH propagation delay CL = 15 pF; VCC = 5 V nI0, nI1 to nY S to nY CI input capacitance CPD power dissipation capacitance per multiplexer notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; ∑ (CL × VCC2 × fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in Volts. 2. For HC the condition is VI = GND to VCC; For HCT the condition is VI = GND to VCC − 1.5 V. 1999 Sep 02 2 HCT 9 13 ns 14 16 ns 3.5 3.5 pF 55 38 pF Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258 ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION 74HC258N; 74HCT258N DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 74HC258D; 74HCT258D SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HC258DB SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1 S common data select input 2, 5, 11 and 14 1I0 to 4I0 data inputs from source 0 3, 6, 10 and 13 1I1 to 4I1 data inputs from source 1 4, 7, 9 and 12 1Y to 4Y 3-state multiplexer outputs 8 GND ground (0 V) 15 OE 3-state output enable input (active LOW) 16 VCC positive supply voltage fpage S 1 16 VCC 1I0 2 15 OE 1I1 3 14 3I0 1Y 4 2I0 5 258 2 1I0 3 1I1 5 2I0 13 3I1 6 2I1 12 4Y 14 3I0 13 3I1 11 4I0 10 4I1 15 OE 2I1 6 11 4I0 2Y 7 10 4I1 GND 8 9 3Y MGA830 1 1 fpage fpage 15 S 1Y G1 EN 4 2 2Y 7 3Y 9 4Y 12 3 1 MUX 4 1 5 7 6 11 9 10 14 12 13 MGA832 MGA831 Fig.1 Pin configuration. 1999 Sep 02 Fig.2 Logic symbol. 3 Fig.3 IEC logic symbol. Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting 2 1I0 handbook, full pagewidth 1 3 1I1 5 2I0 S 15 6 2I1 74HC/HCT258 13 3I1 14 3I0 10 4I1 11 4I0 SELECTOR OE 3-STATE MULTIPLEXER OUTPUTS 1Y 2Y 3Y 4Y 4 7 12 9 MBL095 Fig.4 Functional diagram. FUNCTION TABLE See note 1 INPUTS OE S OUTPUT nI0 nI1 1I0 nY H X X X L H X L H L H X H L L L L X H L L H X L 1Y Z 1I1 2I0 2Y 2I1 Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high impedance OFF-state. 3I0 3Y 3I1 4I0 4Y 4I1 OE S MBL096 Fig.5 Logic diagram. 1999 Sep 02 4 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258 DC CHARACTERISTICS FOR 74HC For the DC characteristics see chapter “HCMOS family characteristics”, section “Family specifications”. Output capability: bus driver. ICC category: MSI. AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF. Tamb (°C) SYMBOL MIN. tPHL/tPLH tPZH/tPZL tPHZ/tPLZ tTHL/tTLH −40 to +85 25 PARAMETER TYP. TEST CONDITIONS MAX. MIN. MAX. −40 to +125 MIN. UNIT V CC WAVEFORMS (V) MAX. propagation delay; nI0 to nY; nI1 to nY − 30 95 − 120 − 145 − 11 19 − 24 − 29 − 9 16 − 20 − 25 propagation delay; S to nY − 47 140 − 175 − 210 − 17 28 − 35 − 42 ns 2.0 4.5 6.0 ns 2.0 − 14 24 − 30 − 36 − 39 140 − 175 − 210 − 14 28 − 35 − 42 − 11 24 − 30 − 36 3-state output disable time OE to nY − 55 150 − 190 − 225 − 20 30 − 38 − 45 4.5 − 16 26 − 33 − 38 6.0 output transition time − 14 60 − 75 − 90 − 5 12 − 15 − 18 4.5 − 4 10 − 13 − 15 6.0 5 see Fig.6 4.5 3-state output enable time OE to nY 1999 Sep 02 see Fig.6 6.0 ns 2.0 see Fig.7 4.5 6.0 ns ns 2.0 2.0 see Fig.7 see Fig.6 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see chapter “HCMOS family characteristics”, section “Family specifications”. Output capability: bus driver. ICC category: MSI. Note to HCT types The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in Table 1. Table 1 INPUT UNIT LOAD COEFFICIENT nI0 0.50 nI1 0.50 OE 1.50 S 1.50 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF. Tamb (°C) SYMBOL PARAMETER −40 to +85 25 TEST CONDITIONS −40 to +125 UNIT VCC (V) WAVEFORMS MIN. TYP. MAX. MIN. MAX. MIN. MAX. propagation delay; nI0 to nY; nI1 to nY − 16 27 − 34 − 41 ns 4.5 see Fig.6 propagation delay; S to nY − 19 34 − 43 − 51 ns 4.5 see Fig.6 tPZH/tPZL 3-state output enable time; OE to nY − 18 30 − 38 − 45 ns 4.5 see Fig.7 tPHZ/tPLZ 3-state output disable time; OE to nY − 17 30 − 38 − 45 ns 4.5 see Fig.7 tTHL/tTLH output transition time − 5 12 − 15 − 18 ns 4.5 see Fig.6 tPHL/tPLH 1999 Sep 02 6 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258 AC WAVEFORMS handbook, full pagewidth VM(1) S, nl0, nl1 INPUT tPHL tPLH VM(1) nY OUTPUT tTHL MBL097 tTLH (1) HC: VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.6 Waveforms showing input (nI0, nI1 and S) to output (nY) propagation delays and output transition times. tr handbook, full pagewidth OE INPUT tf VM(1) tPLZ OUTPUT LOW-to-OFF OFF-to-LOW tPZL VM(1) 10% tPHZ 90% OUTPUT HIGH-to-OFF OFF-to-HIGH MBL098 tPZH VM(1) outputs enabled outputs disabled outputs enabled (1) HC: VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.7 Waveforms showing the 3-state enable and disable times. 1999 Sep 02 7 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258 PACKAGE OUTLINES DIP16: plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 ME seating plane D A2 A A1 L c e Z b1 w M (e 1) b MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.7 0.51 3.7 1.40 1.14 0.53 0.38 0.32 0.23 21.8 21.4 6.48 6.20 2.54 7.62 3.9 3.4 8.25 7.80 9.5 8.3 0.254 2.2 inches 0.19 0.020 0.15 0.055 0.045 0.021 0.015 0.013 0.009 0.86 0.84 0.26 0.24 0.10 0.30 0.15 0.13 0.32 0.31 0.37 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT38-1 050G09 MO-001AE 1999 Sep 02 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-10-02 95-01-19 8 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258 SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.050 0.039 0.016 0.028 0.020 0.01 0.01 0.004 0.028 0.012 inches 0.244 0.041 0.228 θ Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07S MS-012AC 1999 Sep 02 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-01-23 97-05-22 9 o 8 0o Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258 SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.0 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.00 0.55 8 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 1999 Sep 02 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 94-01-14 95-02-04 MO-150AC 10 o Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. SOLDERING Introduction This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). WAVE SOLDERING Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. Through-hole mount packages SOLDERING BY DIPPING OR BY SOLDER WAVE • For packages with leads on two sides and a pitch (e): The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. MANUAL SOLDERING Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Surface mount packages REFLOW SOLDERING MANUAL SOLDERING Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. 1999 Sep 02 74HC/HCT258 When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 11 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting 74HC/HCT258 Suitability of IC packages for wave, reflow and dipping soldering methods SOLDERING METHOD MOUNTING PACKAGE WAVE suitable(2) Through-hole mount DBS, DIP, HDIP, SDIP, SIL Surface mount REFLOW(1) DIPPING − suitable BGA, SQFP not suitable suitable − HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable(3) suitable − PLCC(4), SO, SOJ suitable suitable − suitable − suitable − recommended(4)(5) LQFP, QFP, TQFP not SSOP, TSSOP, VSO not recommended(6) Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1999 Sep 02 12 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting NOTES 1999 Sep 02 13 74HC/HCT258 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting NOTES 1999 Sep 02 14 74HC/HCT258 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state; inverting NOTES 1999 Sep 02 15 74HC/HCT258 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 245002/02/pp16 Date of release: 1999 Sep 02 Document order number: 9397 750 06308