PHILIPS BLF6G20-40

BLF6G20-40
Power LDMOS transistor
Rev. 01 — 19 January 2009
Product data sheet
1. Product profile
1.1 General description
40 W LDMOS power transistor for base station applications at frequencies from
1800 MHz to 2000 MHz.
Table 1.
Typical performance
RF performance at Tcase = 25 °C in a common source class-AB production test circuit.
Mode of operation
2-carrier W-CDMA
[1]
f
VDS
PL(AV)
(MHz)
(V)
(W)
1805 to 1880
28
2.5
ηD
ACPR
(dB)
(%)
(dBc)
18.8
15
−46 [1]
Gp
Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF per carrier;
carrier spacing 5 MHz.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
1.2 Features
n Typical 2-carrier W-CDMA performance at frequencies of 1805 MHz and 1880 MHz,
a supply voltage of 28 V and an IDq of 360 mA:
u Average output power = 2.5 W
u Power gain = 18.8 dB (typ)
u Efficiency = 15 %
u ACPR = −46 dBc
n Easy power control
n Integrated ESD protection
n Excellent ruggedness
n High efficiency
n Excellent thermal stability
n Designed for broadband operation (1800 MHz to 2000 MHz)
n Internally matched for ease of use
n Compliant to Directive 2002/95/EC, regarding restriction of hazardous substances
(RoHS)
BLF6G20-40
NXP Semiconductors
Power LDMOS transistor
1.3 Applications
n RF power amplifiers for W-CDMA base stations and multi carrier applications in the
1800 MHz to 2000 MHz frequency range.
2. Pinning information
Table 2.
Pinning
Pin
Description
1
drain
2
gate
3
source
Simplified outline
Graphic symbol
1
1
[1]
2
3
3
2
sym112
[1]
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
BLF6G20-40
-
flanged ceramic package; 2 mounting holes; 2 leads
SOT608A
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
-
65
V
VGS
gate-source voltage
−0.5
+13
V
ID
drain current
-
13
A
Tstg
storage temperature
−65
+150
°C
Tj
junction temperature
-
225
°C
5. Thermal characteristics
Table 5.
Symbol
Thermal characteristics
Parameter
Rth(j-case) thermal resistance from junction to case
BLF6G20-40_1
Product data sheet
Conditions
Typ Unit
Tcase = 80 °C; PL(AV) = 12.5 W
1.7
K/W
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 19 January 2009
2 of 11
BLF6G20-40
NXP Semiconductors
Power LDMOS transistor
6. Characteristics
Table 6.
Characteristics
Tj = 25 °C per section; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
V(BR)DSS drain-source breakdown
voltage
VGS = 0 V; ID = 0.5 mA
65
-
-
V
VGS(th)
gate-source threshold voltage
VDS = 10 V; ID = 72 mA
1.4
1.9
2.4
V
VGSq
gate-source quiescent voltage
VDS = 28 V; ID = 300 mA
1.70
2.30
2.79
V
IDSS
drain leakage current
VGS = 0 V; VDS = 28 V
-
-
1.5
µA
IDSX
drain cut-off current
VGS = VGS(th) + 3.75 V;
VDS = 10 V
-
12.5
-
A
IGSS
gate leakage current
VGS = 11 V; VDS = 0 V
-
-
150
nA
gfs
forward transconductance
VDS = 10 V; ID = 3.6 A
-
5
-
S
RDS(on)
drain-source on-state
resistance
VGS = VGS(th) + 3.75 V;
ID = 2.5 A
-
0.2
-
Ω
7. Application information
Table 7.
Application information
Mode of operation: 2-carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test
model 1; 1 to 64 PDPCH; f1 = 1802.5 MHz; f2 = 1807.5 MHz; f3 = 1872.5 MHz; f4 = 1877.5 MHz;
RF performance at VDS = 28 V; IDq = 360 mA; Tcase = 25 °C; unless otherwise specified; in a
class-AB production test circuit.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Gp
power gain
PL(AV) = 2.5 W
17.5
18.8
-
dB
ηD
drain efficiency
PL(AV) = 2.5 W
13
15
-
%
ACPR
adjacent channel power ratio
PL(AV) = 2.5 W
-
−46
−42
dBc
7.1 Ruggedness in class-AB operation
The BLF6G20-40 is capable of withstanding a load mismatch corresponding to
VSWR = 10 : 1 through all phases under the following conditions: VDS = 28 V;
IDq = 360 mA; PL = 40 W (CW); f = 1880 MHz.
BLF6G20-40_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 19 January 2009
3 of 11
BLF6G20-40
NXP Semiconductors
Power LDMOS transistor
001aaj410
22
Gp
(dB)
21
70
ηD
(%)
60
Gp
20
50
19
40
18
30
ηD
17
20
16
10
15
0
10
20
30
0
50
40
PL (W)
VDS = 28 V; IDq = 360 mA; f = 1842 MHz.
Fig 1.
One-tone CW power gain and drain efficiency as functions of load power; typical values
001aaj411
22
Gp
(dB)
21
60
ηD
(%)
50
IMD3
−30
Gp
20
001aaj412
−10
IMD
(dBc)
−20
40
IMD5
−40
19
30
18
20
17
10
16
0
5
10
15
20
0
25
30
PL (W)
−60
−70
−80
0
VDS = 28 V; IDq = 360 mA; f1 = 1843 MHz;
f2 = 1843.1 MHz.
Fig 2.
IMD7
−50
ηD
10
15
20
25
30
PL (W)
VDS = 28 V; IDq = 360 mA; f1 = 1843 MHz;
f2 = 1843.1 MHz.
Two-tone CW power gain and drain efficiency
as functions of peak envelope load power;
typical values
Fig 3.
Two-tone CW intermodulation distortion as a
function of peak envelope load power;
typical values
BLF6G20-40_1
Product data sheet
5
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 19 January 2009
4 of 11
BLF6G20-40
NXP Semiconductors
Power LDMOS transistor
001aaj413
22
Gp
(dB)
ACPR
(dBc)
40
21
Gp
20
001aaj414
−20
50
ηD
(%)
−30
30
−40
19
20
ηD
−50
10
18
0
Fig 4.
4
8
−60
0
16
17
12
0
4
8
12
16
PL (W)
PL (W)
VDS = 28 V; IDq = 360 mA; f1 = 1840.5 MHz;
f2 = 1845.5 MHz; carrier spacing 5 MHz.
VDS = 28 V; IDq = 360 mA; f1 = 1840.5 MHz;
f2 = 1845.5 MHz; carrier spacing 5 MHz.
2-carrier W-CDMA power gain and drain
efficiency as functions of average load power;
typical values
Fig 5.
2-carrier W-CDMA adjacent power channel
ratio as function of average load power;
typical values
8. Test information
VGG
C3
C4
C5
VDD
C6
R1
C8
input
50 Ω
C9
C10
C11
C16
C2
C12
C13
C14
output
50 Ω
C15
C1
C7
001aah550
See Table 8 for list of components.
Fig 6.
Test circuit for operation at 1805 MHz and 1880 MHz
BLF6G20-40_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 19 January 2009
5 of 11
BLF6G20-40
NXP Semiconductors
Power LDMOS transistor
C3
C14
C13
C4
C5
R1 C6
C8
C10
C9
C2
C11 C12
C7
C16
C15
C1
001aah551
Striplines are on a double copper-clad Rogers Duroid 5880 Printed-Circuit Board (PCB) (εr = 2.2), thickness = 0.79 mm.
See Table 8 for list of components.
Fig 7.
Component layout for 1805 MHz and 1880 MHz test circuit
BLF6G20-40_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 19 January 2009
6 of 11
BLF6G20-40
NXP Semiconductors
Power LDMOS transistor
Table 8.
List of components
For test circuit, see Figure 6 and Figure 7.
Component
Description
Value
Remarks
C1
multilayer ceramic chip capacitor
0.7 pF
[1]
C2
multilayer ceramic chip capacitor
3.9 pF
[1]
C3, C13
tantalum capacitor
10 µF
C4, C5
multilayer ceramic chip capacitor
1.5 µF
C6, C10
multilayer ceramic chip capacitor
10 pF
[1]
C7
multilayer ceramic chip capacitor
1.2 pF
[1]
C8, C9
multilayer ceramic chip capacitor
100 nF
C11
multilayer ceramic chip capacitor
220 nF
C12
multilayer ceramic chip capacitor
4.7 µF
C14
Philips electrolytic capacitor
220 µF, 63 V
C15, C16
multilayer ceramic chip capacitor
6.8 pF
R1
Philips chip resistor
5.6 Ω
[1]
American technical ceramics type 100B or capacitor of same quality.
[2]
American technical ceramics type 100A or capacitor of same quality.
BLF6G20-40_1
Product data sheet
[2]
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 19 January 2009
7 of 11
BLF6G20-40
NXP Semiconductors
Power LDMOS transistor
9. Package outline
Flanged ceramic package; 2 mounting holes; 2 leads
SOT608A
D
A
F
3
D1
U1
B
q
c
C
1
H
E1
p
U2
E
w1 M A M B M
2
A
w2 M C M
b
Q
0
5
10 mm
scale
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
UNIT
A
b
c
mm
4.62
3.76
7.24
6.99
0.15
0.10
10.21 10.29
10.01 10.03
inches
0.182
0.148
0.285 0.006
0.275 0.004
0.402 0.405
0.394 0.395
OUTLINE
VERSION
D
D1
F
H
p
Q
q
U1
U2
w1
w2
10.21 10.29
10.01 10.03
1.14
0.89
15.75
14.73
3.30
2.92
1.70
1.35
15.24
20.45
20.19
9.91
9.65
0.25
0.51
0.402 0.405
0.394 0.395
0.045 0.620
0.035 0.580
0.130
0.115
0.067
0.600
0.053
0.805
0.795
0.390
0.010 0.020
0.380
E
E1
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
01-02-22
02-02-11
SOT608A
Fig 8.
EUROPEAN
PROJECTION
Package outline SOT608A
BLF6G20-40_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 19 January 2009
8 of 11
BLF6G20-40
NXP Semiconductors
Power LDMOS transistor
10. Abbreviations
Table 9.
Abbreviations
Acronym
Description
3GPP
Third Generation Partnership Project
CCDF
Complementary Cumulative Distribution Function
CW
Continuous Wave
DPCH
Dedicated Physical CHannel
IMD
InterModulation Distortion
LDMOS
Laterally Diffused Metal-Oxide Semiconductor
PAR
Peak-to-Average power Ratio
PDPCH
transmission Power of the Dedicated Physical CHannel
RF
Radio Frequency
VSWR
Voltage Standing-Wave Ratio
W-CDMA
Wideband Code Division Multiple Access
11. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BLF6G20-40_1
20090119
Product data sheet
-
-
BLF6G20-40_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 19 January 2009
9 of 11
BLF6G20-40
NXP Semiconductors
Power LDMOS transistor
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
BLF6G20-40_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 19 January 2009
10 of 11
BLF6G20-40
NXP Semiconductors
Power LDMOS transistor
14. Contents
1
1.1
1.2
1.3
2
3
4
5
6
7
7.1
8
9
10
11
12
12.1
12.2
12.3
12.4
13
14
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 2
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Application information. . . . . . . . . . . . . . . . . . . 3
Ruggedness in class-AB operation. . . . . . . . . . 3
Test information . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9
Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Contact information. . . . . . . . . . . . . . . . . . . . . 10
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 19 January 2009
Document identifier: BLF6G20-40_1