INTEGRATED CIRCUITS 74ABT657 Octal transceiver with parity generator/checker (3-State) Product specification IC23 Data Handbook 1995 Dec 11 Philips Semiconductors Product specification Octal transceiver with parity generator/checker (3-State) 74ABT657 The Output Enable (OE) input disables both the A and B ports by placing them in a high impedance condition when the OE input is High. The parity select (ODD/EVEN) input gives the user the option of odd or even parity systems. The parity (PARITY) pin is an output from the generator/checker when transmitting from the port A to B (T/R = High) and an input when receiving from port B to A port (T/R = Low). When transmitting (T/R = High) the parity select (ODD/EVEN) input is set, then the A port data is polled to determine the number of High bits. The parity (PARITY) output then goes to the logic state determined by the parity select (ODD/EVEN) setting and by the number of High bits on port A. For example, if the parity select (ODD/EVEN) is set Low (even parity), and the number of High bits on port A is odd, then the parity (PARITY) output will be High, transmitting even parity. If the number of High bits on port A is even, then the parity (PARITY) output will be Low, keeping even parity. When in receive mode (T/R = Low) the B port is polled to determine the number of High bits. If parity select (ODD/EVEN) is Low (even parity) and the number of Highs on port B is: FEATURES • Combinational functions in one package • Low static and dynamic power dissipation with high speed and high output drive • Output capability: +64mA/–32mA • Power-up 3-State • Latch-up protection exceeds 500mA per Jedec Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model DESCRIPTION The 74ABT657 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT657 is an octal transceiver featuring non-inverting buffers with 3-State outputs and an 8-bit parity generator/checker, and is intended for bus-oriented applications. The buffers have a guaranteed current sinking capability of 64mA. The Transmit/Receive (T/R) input determines the direction of the data flow through the bidirectional transceivers. Transmit (active-High) enables data from A ports to B ports; Receive (active-Low) enables data from B ports to A ports. (1) odd and the parity (PARITY) input is High, then ERROR will be High, signifying no error. (2) even and the parity (PARITY) input is High, then ERROR will be asserted Low, indicating an error. QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 3.3 ns tPLH tPHL Propagation delay An to Bn or Bn to An CL = 50pF; VCC = 5V CIN Input capacitance VI = 0V or VCC 4 pF CI/O I/O capacitance Outputs disabled; VO = 0V or VCC 7 pF ICCZ Total supply current Outputs disabled; VCC =5.5V 500 nA ORDERING INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 24-Pin Plastic DIP PACKAGES –40°C to +85°C 74ABT657 N 74ABT657 N SOT222-1 24-Pin plastic SO –40°C to +85°C 74ABT657 D 74ABT657 D SOT137-1 24-Pin Plastic SSOP Type II –40°C to +85°C 74ABT657 DB 74ABT657 DB SOT340-1 24-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT657 PW 74ABT657PW DH SOT355-1 PIN CONFIGURATION PIN DESCRIPTION SYMBOL PIN NUMBER NAME AND FUNCTION 1 24 OE 13 PARITY A0 2 23 B0 11 ODD/EVEN A1 3 22 B1 12 ERROR A2 4 21 B2 1 T/R Transmit/receive input A3 5 20 B3 A4 6 19 GND 2, 3, 4, 5, 6, 8, 9, 10 A0 - A7 A port 3-State outputs 23, 22, 21, 20, 17, 16, 15, 14 B0 - B7 B port 3-State outputs T/R VCC 7 TOP VIEW 18 GND A5 8 17 B4 A6 9 16 B5 A7 10 15 B6 ODD/EVEN 11 14 B7 ERROR 12 Parity output Parity select input Error output 24 OE 18, 19 GND Output enable input (active-Low) Ground (0V) 7 VCC Positive supply voltage 13 PARITY SA00181 1995 Dec 11 2 853–1615 16106 Philips Semiconductors Product specification Octal transceiver with parity generator/checker (3-State) LOGIC SYMBOL 74ABT657 LOGIC SYMBOL (IEEE/IEC) 1 2 3 4 5 6 8 9 24 10 0 M 1 0 2 0 BUS B TO A 1 BUS A TO B 2 HIGH Z 11 G3[EVEN] A0 A1 A2 A3 A4 A5 A6 A7 G4[ODD] 1 T/R 24 OE 11 ODD/EVEN PARITY 13 ERROR 12 2K B0 B1 B2 B3 B4 B5 B6 B7 2 23 22 21 20 17 16 15 14 SA00182 = 1,3[EVEN] 1,4[ODD] 0,3[EVEN 0,4]ODD 0 2 13 12 23 3 22 4 21 5 20 6 17 8 16 9 15 10 14 SA00194 FUNCTION TABLE H L X Z = = = = OUTPUTS OE T/R ODD/EVEN PARITY ERROR OUTPUTS MODE 0, 2, 4, 6, 8 L L L L L L H H L L L L H L H H L L H L H L H L Z Z H L L H Transmit Transmit Receive Receive Receive Receive 1, 3, 5, 7 L L L L L L H H L L L L H L H H L L L H H L H L Z Z L H H L Transmit Transmit Receive Receive Receive Receive Don’t care H X X Z Z 3-State High voltage level Low voltage level Don’t care High impedance ”off” state 1995 Dec 11 INPUT/ OUTPUT INPUTS NUMBER OF HIGH INPUTS 3 Philips Semiconductors Product specification Octal transceiver with parity generator/checker (3-State) 74ABT657 LOGIC DIAGRAM T/R OE A0 A1 A2 A3 A4 A5 A6 A7 ODD/EVEN 1 24 2 23 3 22 4 21 5 20 6 17 8 16 9 15 10 14 B0 B1 B2 B3 B4 B5 B6 B7 13 PARITY 11 12 ERROR SA00215 1995 Dec 11 4 Philips Semiconductors Product specification Octal transceiver with parity generator/checker (3-State) 74ABT657 ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC IIK PARAMETER CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA output in Off or High state –0.5 to +5.5 V output in Low state 128 mA –65 to 150 °C DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT DC output current Tstg Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER UNIT DC supply voltage Min Max 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 5 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range 1995 Dec 11 2.0 5 V Philips Semiconductors Product specification Octal transceiver with parity generator/checker (3-State) 74ABT657 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Min VIK VOH VOL II Input clamp voltage High-level output voltage Tamb = –40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = –18mA Typ Max –0.9 –1.2 Min UNIT Max –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 3.5 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 4.0 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.6 2.0 V Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V Input leakage Control pins VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA current Data pins VCC = 5.5V; VI = GND or 5.5V ±5 ±100 ±100 µA Power-off leakage current VCC 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA Power-up/down 3-State output current3 VCC 2.0V; VO = 0.5V; VI = GND or VCC; V OE = VCC ±5.0 ±50 ±50 µA IIH + IOZH 3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH 5.0 50 50 µA IIL + IOZL 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH –5.0 –50 –50 µA Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC 5.0 50 50 µA –180 mA IOFF IPUIPD ICEX IO Output current1 ICCH ICCL Quiescent supply current ICCZ ∆ICC Additional supply current per input pin2 VCC = 5.5V; VO = 2.5V –80 –180 VCC = 5.5V; Outputs High, VI = GND or VCC –50 0.5 250 –50 250 µA VCC = 5.5V; Outputs Low, VI = GND or VCC 20 30 30 mA VCC = 5.5V; Outputs 3-State; VI = GND or VCC 0.5 250 250 µA Outputs enabled, one data input at 3.4V, other inputs at VCC or GND; VCC = 5.5V 0.5 1.5 1.5 mA Outputs 3-State, one data input at 3.4V, other inputs at VCC or GND; VCC = 5.5V 50 250 250 µA Outputs 3-State, one enable input at 3.4V, other inputs at VCC or GND; VCC = 5.5V 0.5 1.5 1.5 mA NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. For VCC = 2.1V to VCC = 5V 10%, a transition time of up to 100µsec is permitted. 1995 Dec 11 6 Philips Semiconductors Product specification Octal transceiver with parity generator/checker (3-State) 74ABT657 AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER +25oC Tamb = –40 to +85oC VCC = +5.0V ±10% Tamb = VCC = +5.0V WAVEFORMS UNIT Min Typ Max Min Max 2 1.1 1.2 3.3 3.0 5.0 4.3 1.1 1.2 5.5 4.8 ns Propagation delay An to PARITY 1, 2 2.5 2.8 6.5 7.0 8.7 9.1 2.5 2.8 10.1 10.6 ns tPLH tPHL Propagation delay ODD/EVEN to PARITY, ERROR 1, 2 1.7 1.9 5.0 5.0 6.6 6.6 1.7 1.9 7.3 7.3 ns tPLH tPHL Propagation delay Bn to ERROR 1, 2 3.9 4.0 9.2 9.6 11.7 12.1 3.9 4.0 13.8 14.5 ns tPLH tPHL Propagation delay PARITY to ERROR 1, 2 2.7 3.2 6.0 6.4 7.6 8.0 2.7 3.2 9.4 9.4 ns tPLH tPHL Propagation delay An to Bn or Bn to An tPLH tPHL time1 tPZH tPZL Output enable to High or Low level 3, 4 1.3 1.9 3.8 4.4 5.6 7.0 1.3 1.9 6.6 8.2 ns tPHZ tPLZ Output disable time from High or Low level 3, 4 2.4 2.7 5.1 5.4 7.0 7.6 2.4 2.7 7.6 8.1 ns NOTES: 1. These delay times reflect the 3-State recovery time only and do not include the delay through the buffers and the parity check circuitry which affect the ERROR output. To assure valid information at the ERROR pin, time must be allowed for the signal to propagate through the drivers (B to A), through the parity check circuitry (same as A to PARITY), and to the ERROR output. Valid data at the ERROR pin ≥ (B to A) + (A to PARITY). AC WAVEFORMS NOTE: For all waveforms, VM = 1.5V. An, Bn ODD/EVEN PARITY tPHL PARITY, ERROR An, Bn ODD/EVEN PARITY VM VM VM tPLH VM VM tPLH An, Bn, PARITY, ERROR VM tPHL VM VM SA00219 SA00220 Waveform 1. Propagation Delay For Inverting Output OE VM VM OE tPHZ tPZH An, Bn PARITY, ERROR Waveform 2. Propagation Delay For Non-Inverting Output tPZL VOH –0.3V An, Bn PARITY, ERROR VM 0V tPLZ VM VOL +0.3V 0V SA00222 SA00221 Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level 1995 Dec 11 VM VM Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 7 Philips Semiconductors Product specification Octal transceiver with parity generator/checker (3-State) 74ABT657 TEST CIRCUIT AND WAVEFORM VCC 7.0V PULSE GENERATOR VIN tW 90% VOUT VM NEGATIVE PULSE CL 10% 0V RL tTHL (tF) tTLH (tR) tTLH (tR) tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLZ closed tPZL closed All other open AMP (V) VM 10% RL D.U.T. RT 90% 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 74ABT Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns SA00012 1995 Dec 11 8 Philips Semiconductors Product specification Octal transceiver with parity generator/checker (3-State) DIP24: plastic dual in-line package; 24 leads (300 mil) SO24: plastic small outline package; 24 leads; body width 7.5 mm SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm 1995 Dec 11 9 74ABT657 SOT222-1 SOT137-1 SOT340-1 SOT355-1 Philips Semiconductors Product specification Octal transceiver with parity generator/checker (3-State) NOTES 1995 Dec 11 10 74ABT657 Philips Semiconductors Product specification Octal transceiver with parity generator/checker (3-State) 74ABT657 DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. 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