PHILIPS PESD12VS5UD

PESDxS5UD series
Fivefold ESD protection diode arrays
Rev. 02 — 7 December 2006
Product data sheet
1. Product profile
1.1 General description
Fivefold ElectroStatic Discharge (ESD) protection diode arrays in a SOT457 (SC-74) small
Surface-Mounted Device (SMD) plastic package designed to protect up to five signal lines
from the damage caused by ESD and other transients.
1.2 Features
n
n
n
n
ESD protection of up to five lines
Max. peak pulse power: PPP = 200 W
Ultra low leakage current: IRM = 50 pA
Low clamping voltage: VCL = 12 V at
IPP = 20 A
n ESD protection up to 30 kV
n IEC 61000-4-2; level 4 (ESD)
n IEC 61000-4-5 (surge); IPP up to 20 A
1.3 Applications
n Computers and peripherals
n Audio and video equipment
n Cellular handsets and accessories
n Communication systems
n Portable electronics
n Subscriber Identity Module (SIM) card
protection
1.4 Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
PESD3V3S5UD
-
-
3.3
V
PESD5V0S5UD
-
-
5
V
PESD12VS5UD
-
-
12
V
PESD15VS5UD
-
-
15
V
PESD24VS5UD
-
-
24
V
Per diode
VRWM
reverse standoff voltage
PESDxS5UD series
NXP Semiconductors
Fivefold ESD protection diode arrays
Table 1.
Quick reference data …continued
Symbol
Parameter
Conditions
Cd
diode capacitance
f = 1 MHz; VR = 0 V
Min
Typ
Max
Unit
PESD3V3S5UD
-
215
300
pF
PESD5V0S5UD
-
165
220
pF
PESD12VS5UD
-
73
100
pF
PESD15VS5UD
-
60
90
pF
PESD24VS5UD
-
45
70
pF
2. Pinning information
Table 2.
Pinning
Pin
Description
1
cathode 1
2
common anode
3
cathode 2
4
cathode 3
5
cathode 4
6
cathode 5
Simplified outline
6
1
5
2
Symbol
4
3
1
6
2
5
3
4
006aaa159
3. Ordering information
Table 3.
Ordering information
Type number
PESD3V3S5UD
Package
Name
Description
Version
SC-74
plastic surface-mounted package (TSOP6); 6 leads
SOT457
PESD5V0S5UD
PESD12VS5UD
PESD15VS5UD
PESD24VS5UD
4. Marking
Table 4.
Marking codes
Type number
Marking code
PESD3V3S5UD
E1
PESD5V0S5UD
E2
PESD12VS5UD
E3
PESD15VS5UD
E4
PESD24VS5UD
E5
PESDXS5UD_SER_2
Product data sheet
© NXP B.V. 2006. All rights reserved.
Rev. 02 — 7 December 2006
2 of 13
PESDxS5UD series
NXP Semiconductors
Fivefold ESD protection diode arrays
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
PPP
peak pulse power
tp = 8/20 µs
[1][2]
IPP
peak pulse current
tp = 8/20 µs
[1][2]
-
200
W
PESD3V3S5UD
-
20
A
PESD5V0S5UD
-
20
A
PESD12VS5UD
-
10
A
PESD15VS5UD
-
6
A
PESD24VS5UD
-
4
A
Per diode
Per device
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
−65
+150
°C
Tstg
storage temperature
−65
+150
°C
[1]
Non-repetitive current pulse 8/20 µs exponential decay waveform according to IEC 61000-4-5.
[2]
Measured from pin 1, 3, 4, 5 or 6 to 2.
Table 6.
ESD maximum ratings
Symbol
Parameter
Conditions
electrostatic discharge voltage
IEC 61000-4-2
(contact discharge)
Min
Max
Unit
PESD3V3S5UD
-
30
kV
PESD5V0S5UD
-
30
kV
PESD12VS5UD
-
30
kV
PESD15VS5UD
-
30
kV
PESD24VS5UD
-
23
kV
-
10
kV
Per diode
VESD
PESDxS5UD series
MIL-STD-883 (human
body model)
[1]
Device stressed with ten non-repetitive ESD pulses.
[2]
Measured from pin 1, 3, 4, 5 or 6 to 2.
Table 7.
[1][2]
ESD standards compliance
Standard
Conditions
Per diode
IEC 61000-4-2; level 4 (ESD)
> 15 kV (air); > 8 kV (contact)
MIL-STD-883; class 3 (human body model)
> 10 kV
PESDXS5UD_SER_2
Product data sheet
© NXP B.V. 2006. All rights reserved.
Rev. 02 — 7 December 2006
3 of 13
PESDxS5UD series
NXP Semiconductors
Fivefold ESD protection diode arrays
001aaa631
IPP
001aaa630
120
100 %
90 %
100 % IPP; 8 µs
IPP
(%)
80
e−t
50 % IPP; 20 µs
40
10 %
t
tr = 0.7 ns to 1 ns
0
0
10
20
30
30 ns
40
t (µs)
60 ns
Fig 1. 8/20 µs pulse waveform according to
IEC 61000-4-5
Fig 2. ESD pulse waveform according to
IEC 61000-4-2
6. Characteristics
Table 8.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
PESD3V3S5UD
-
-
3.3
V
PESD5V0S5UD
-
-
5
V
PESD12VS5UD
-
-
12
V
PESD15VS5UD
-
-
15
V
PESD24VS5UD
-
-
24
V
Per diode
VRWM
IRM
reverse standoff voltage
reverse leakage current
PESD3V3S5UD
VRWM = 3.3 V
-
300
800
nA
PESD5V0S5UD
VRWM = 5 V
-
80
200
nA
PESD12VS5UD
VRWM = 12 V
-
0.05
15
nA
PESD15VS5UD
VRWM = 15 V
-
0.05
15
nA
VRWM = 24 V
-
0.05
15
nA
PESD3V3S5UD
5.3
5.6
5.9
V
PESD5V0S5UD
6.4
6.8
7.2
V
PESD12VS5UD
12.5
14.5
16
V
PESD15VS5UD
17
18
19
V
PESD24VS5UD
25.5
27
29
V
PESD24VS5UD
VBR
breakdown voltage
IR = 1 mA
PESDXS5UD_SER_2
Product data sheet
© NXP B.V. 2006. All rights reserved.
Rev. 02 — 7 December 2006
4 of 13
PESDxS5UD series
NXP Semiconductors
Fivefold ESD protection diode arrays
Table 8.
Characteristics …continued
Tamb = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Cd
f = 1 MHz; VR = 0 V
diode capacitance
PESD3V3S5UD
Max
Unit
-
215
300
pF
-
165
220
pF
PESD12VS5UD
-
73
100
pF
PESD15VS5UD
-
60
90
pF
-
45
70
pF
IPP = 1 A
-
-
8
V
IPP = 20 A
-
-
12
V
IPP = 1 A
-
-
8
V
IPP = 20 A
-
-
13
V
IPP = 1 A
-
-
17
V
IPP = 10 A
-
-
24
V
IPP = 1 A
-
-
22
V
IPP = 6 A
-
-
33
V
IPP = 1 A
-
-
33
V
IPP = 4 A
-
-
52
V
IR = 5 mA
-
-
25
Ω
[1][2]
clamping voltage
PESD3V3S5UD
PESD5V0S5UD
PESD12VS5UD
PESD15VS5UD
PESD24VS5UD
differential resistance
rdif
Typ
PESD5V0S5UD
PESD24VS5UD
VCL
Min
[1]
Non-repetitive current pulse 8/20 µs exponential decay waveform according to IEC 61000-4-5.
[2]
Measured from pin 1, 3, 4, 5 or 6 to 2.
006aaa698
104
PPP
(W)
001aaa633
1.2
PPP
PPP(25°C)
103
0.8
102
0.4
10
1
1
10
102
103
104
0
0
tp (µs)
50
100
150
200
Tj (°C)
Tamb = 25 °C
Fig 3. Peak pulse power as a function of exponential
pulse duration; typical values
Fig 4. Relative variation of peak pulse power as a
function of junction temperature; typical values
PESDXS5UD_SER_2
Product data sheet
© NXP B.V. 2006. All rights reserved.
Rev. 02 — 7 December 2006
5 of 13
PESDxS5UD series
NXP Semiconductors
Fivefold ESD protection diode arrays
006aaa700
220
Cd
(pF)
006aaa701
80
Cd
(pF)
180
60
140
40
(1)
(1)
(2)
(2)
100
20
60
(3)
0
0
1
2
3
4
5
0
5
10
15
20
VR (V)
25
VR (V)
f = 1 MHz; Tamb = 25 °C
f = 1 MHz; Tamb = 25 °C
(1) PESD3V3S5UD
(1) PESD12VS5UD
(2) PESD5V0S5UD
(2) PESD15VS5UD
(3) PESD24VS5UD
Fig 5. Diode capacitance as a function of reverse
voltage; typical values
Fig 6. Diode capacitance as a function of reverse
voltage; typical values
I
006aaa699
10
IRM
IRM(25°C)
−VCL −VBR −VRWM
V
−IRM
−IR
1
−
+
P-N
10−1
−100
−50
0
50
100
−IPP
150
Tj (°C)
006aaa407
PESD3V3S5UD; PESD5V0S5UD
IR is less than 5 nA at 150 °C for:
PESD12VS5UD; PESD15VS5UD; PESD24VS5UD
Fig 7. Relative variation of reverse leakage current as
a function of junction temperature; typical
values
Fig 8. V-I characteristics for a unidirectional ESD
protection diode
PESDXS5UD_SER_2
Product data sheet
© NXP B.V. 2006. All rights reserved.
Rev. 02 — 7 December 2006
6 of 13
PESDxS5UD series
NXP Semiconductors
Fivefold ESD protection diode arrays
ESD TESTER
450 Ω
Rd
RG 223/U
50 Ω coax
4 GHz DIGITAL
OSCILLOSCOPE
10×
ATTENUATOR
50 Ω
Cs
IEC 61000-4-2 network
Cs = 150 pF; Rd = 330 Ω
DUT
(DEVICE
UNDER
TEST)
vertical scale = 200 V/div
horizontal scale = 50 ns/div
vertical scale = 20 V/div
horizontal scale = 50 ns/div
PESD24VS5UD
GND
PESD15VS5UD
GND
PESD12VS5UD
GND
PESD5V0S5UD
GND
GND
PESD3V3S5UD
GND
unclamped +1 kV ESD voltage waveform
(IEC 61000-4-2 network)
clamped +1 kV ESD voltage waveform
(IEC 61000-4-2 network)
GND
GND
vertical scale = 200 V/div
horizontal scale = 50 ns/div
unclamped −1 kV ESD voltage waveform
(IEC 61000-4-2 network)
vertical scale = 10 V/div
horizontal scale = 50 ns/div
clamped −1 kV ESD voltage waveform
(IEC 61000-4-2 network)
006aaa702
Fig 9. ESD clamping test setup and waveforms
PESDXS5UD_SER_2
Product data sheet
© NXP B.V. 2006. All rights reserved.
Rev. 02 — 7 December 2006
7 of 13
PESDxS5UD series
NXP Semiconductors
Fivefold ESD protection diode arrays
7. Application information
The PESDxS5UD series is designed for the protection of up to five unidirectional data
lines from the damage caused by ESD and surge pulses. The PESDxS5UD series may be
used on lines where the signal polarities are both, positive and negative with respect to
ground. The PESDxS5UD series provides a surge capability of 200 W per line for an
8/20 µs waveform.
high-speed
data lines
PESDxS5UD
PESDxS5UD
1
6
1
6
2
5
2
5
3
4
3
4
unidirectional protection of 5 lines
bidirectional protection of 4 lines
006aaa019
Fig 10. Application diagram
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PESDxS5UD as close to the input terminal or connector as possible.
2. The path length between the PESDxS5UD and the protected line should be
minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
PESDXS5UD_SER_2
Product data sheet
© NXP B.V. 2006. All rights reserved.
Rev. 02 — 7 December 2006
8 of 13
PESDxS5UD series
NXP Semiconductors
Fivefold ESD protection diode arrays
8. Package outline
3.1
2.7
6
3.0
2.5
1.7
1.3
1.1
0.9
5
4
2
3
0.6
0.2
pin 1 index
1
0.40
0.25
0.95
0.26
0.10
1.9
Dimensions in mm
04-11-08
Fig 11. Package outline SOT457 (SC-74)
9. Packing information
Table 9.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number
PESD3V3S5UD
PESD5V0S5UD
PESD12VS5UD
PESD15VS5UD
PESD24VS5UD
Package Description
SOT457
SOT457
SOT457
SOT457
SOT457
3000
10000
4 mm pitch, 8 mm tape and reel; T1
[2]
-115
-135
4 mm pitch, 8 mm tape and reel; T2
[3]
-125
-165
4 mm pitch, 8 mm tape and reel; T1
[2]
-115
-135
4 mm pitch, 8 mm tape and reel; T2
[3]
-125
-165
4 mm pitch, 8 mm tape and reel; T1
[2]
-115
-135
4 mm pitch, 8 mm tape and reel; T2
[3]
-125
-165
4 mm pitch, 8 mm tape and reel; T1
[2]
-115
-135
4 mm pitch, 8 mm tape and reel; T2
[3]
-125
-165
4 mm pitch, 8 mm tape and reel; T1
[2]
-115
-135
4 mm pitch, 8 mm tape and reel; T2
[3]
-125
-165
[1]
For further information and the availability of packing methods, see Section 13.
[2]
T1: normal taping
[3]
T2: reverse taping
PESDXS5UD_SER_2
Product data sheet
Packing quantity
© NXP B.V. 2006. All rights reserved.
Rev. 02 — 7 December 2006
9 of 13
PESDxS5UD series
NXP Semiconductors
Fivefold ESD protection diode arrays
10. Soldering
3.45
1.95
solder lands
0.95
solder resist
0.45 0.55
3.30 2.825
occupied area
solder paste
1.60
1.70
3.10
3.20
msc422
Dimensions in mm
Fig 12. Reflow soldering footprint SOT457 (SC-74)
5.30
solder lands
5.05
0.45 1.45 4.45
solder resist
occupied area
1.40
msc423
4.30
Dimensions in mm
Fig 13. Wave soldering footprint SOT457 (SC-74)
PESDXS5UD_SER_2
Product data sheet
© NXP B.V. 2006. All rights reserved.
Rev. 02 — 7 December 2006
10 of 13
PESDxS5UD series
NXP Semiconductors
Fivefold ESD protection diode arrays
11. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PESDXS5UD_SER_2
20061207
Product data sheet
-
PESDXS5UD_SER_1
Modifications:
PESDXS5UD_SER_1
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
•
•
•
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Table 2 “Pinning”: symbol drawing amended
Table 5 “Limiting values”: amended
Table 6 “ESD maximum ratings”: amended
Table 7 “ESD standards compliance”: amended
Table 8 “Characteristics”: VBR minimum and maximum values for PESD15VS5UD adapted
Figure 7: figure notes adapted
Section 10 “Soldering”: added
20060404
Product data sheet
PESDXS5UD_SER_2
Product data sheet
-
-
© NXP B.V. 2006. All rights reserved.
Rev. 02 — 7 December 2006
11 of 13
PESDxS5UD series
NXP Semiconductors
Fivefold ESD protection diode arrays
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: [email protected]
PESDXS5UD_SER_2
Product data sheet
© NXP B.V. 2006. All rights reserved.
Rev. 02 — 7 December 2006
12 of 13
NXP Semiconductors
PESDxS5UD series
Fivefold ESD protection diode arrays
14. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
10
11
12
12.1
12.2
12.3
12.4
13
14
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Application information. . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Packing information. . . . . . . . . . . . . . . . . . . . . . 9
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11
Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Contact information. . . . . . . . . . . . . . . . . . . . . 12
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2006.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 7 December 2006
Document identifier: PESDXS5UD_SER_2