74ABT162244 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state Rev. 04 — 9 April 2009 Product data sheet 1. General description The 74ABT162244 high-performance Bipolar CMOS (BiCMOS) device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT162244 is a 16-bit buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE, 4OE), each controlling four of the 3-state outputs. The 74ABT162244 is designed with 30 Ω series resistance in both the upper and lower output structures. This design reduces line noise in applications such as memory address drivers, clock drivers and bus receivers/transmitters. 2. Features n n n n n n n n 16-bit bus interface Multiple VCC and GND pins minimize switching noise Power-up 3-state 3-state buffers Output capability: +12 mA and −32 mA Live insertion and extraction permitted Latch-up performance: JESD 78 Class II ESD protection: u MIL STD 883 method 3015: exceeds 2000 V u CDM JESD 22-C101-C exceeds 1000 V 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74ABT162244DGG −40 °C to +85 °C TSSOP48 plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1 74ABT162244DL −40 °C to +85 °C SSOP48 plastic shrink small outline package; 48 leads; body SOT370-1 width 7.5 mm 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state 4. Functional diagram 47 2 1A0 46 44 13 3A0 3Y0 35 3 1A1 1A2 36 1Y0 1Y1 3A1 1Y2 3A2 5 1 1OE 48 2OE 25 3OE 24 4OE 14 3Y1 33 16 3Y2 1A0 1A3 43 6 1Y3 3A3 32 17 1A1 3Y3 1A2 1OE 1 3OE 25 1A3 2A0 2A1 41 8 2A0 30 2Y0 2A2 19 4A0 2A3 4Y0 3A0 40 29 9 2A1 2Y1 3A1 20 4A1 4Y1 3A2 3A3 2A2 38 11 2Y2 4A2 27 22 4A0 4Y2 4A1 2A3 2OE 37 12 48 2Y3 4A3 4OE EN1 EN2 EN3 EN4 26 4A2 23 4Y3 4A3 47 46 1 1 2 3 44 5 43 6 41 40 1 2 8 9 38 11 37 12 36 35 1 3 13 14 33 16 32 17 30 29 1 4 19 20 27 22 26 23 1Y0 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3 3Y0 3Y1 3Y2 3Y3 4Y0 4Y1 4Y2 4Y3 001aae231 24 mna996 Fig 1. Logic symbol Fig 2. IEC logic symbol VCC output GND 001aac384 Fig 3. Logic diagram one output 74ABT162244_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 9 April 2009 2 of 14 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state 5. Pinning information 5.1 Pinning 1OE 1 48 2OE 1Y0 2 47 1A0 1Y1 3 46 1A1 GND 4 45 GND 1Y2 5 44 1A2 1Y3 6 43 1A3 VCC 7 2Y0 8 42 VCC 41 2A0 2Y1 9 40 2A1 GND 10 39 GND 2Y2 11 38 2A2 2Y3 12 3Y0 13 37 2A3 74ABT162244 36 3A0 3Y1 14 35 3A1 GND 15 34 GND 3Y2 16 33 3A2 3Y3 17 32 3A3 VCC 18 4Y0 19 31 VCC 30 4A0 4Y1 20 29 4A1 GND 21 28 GND 4Y2 22 27 4A2 4Y3 23 26 4A3 4OE 24 25 3OE 001aaj890 Fig 4. Pin configuration 74ABT162244_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 9 April 2009 3 of 14 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state 5.2 Pin description Table 2. Pin description Symbol Pin Description 1OE 1 1 output enable (LOW active) 1Y[0:3] 2, 3, 5, 6 1 data output 0 to output 3 GND 4 ground (0 V) VCC 7 supply voltage 2Y[0:3] 8, 9, 11, 12 2 data output 0 to output 3 GND 10 ground (0 V) 3Y[0:3] 13, 14, 16, 17 3 data output 0 to output 3 GND 15 ground (0 V) VCC 18 supply voltage 4Y[0:3] 19, 20, 22, 23 4 data output 0 to output 3 GND 21 ground (0 V) 4OE 24 4 output enable (LOW active) 3OE 25 3 output enable (LOW active) GND 28 ground (0 V) 4A[0:3] 30, 29, 27, 26 4 data input 0 to input 3 VCC 31 supply voltage GND 34 ground (0 V) 3A[0:3] 36, 35, 33, 32 3 data input 0 to input 3 GND 39 2A[0:3] 41, 40, 38, 37 2 data input 0 to input 3 VCC 42 supply voltage GND 45 ground (0 V) 1A[0:3] 47, 46, 44, 43 1 data input 0 to input 3 2OE 48 ground (0 V) 2 output enable (LOW active) 6. Functional description Table 3. Function table[1] Control Input Output nOE nAx nYx L L L L H H H X Z [1] H = HIGH voltage level; L = LOW voltage level; X = don t care; Z = high-impedance OFF-state. 74ABT162244_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 9 April 2009 4 of 14 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VCC supply voltage Conditions Min Max Unit −0.5 +7.0 V [1] −1.2 +7.0 V [1] −0.5 +5.5 V VI input voltage VO output voltage output in OFF-state or HIGH-state IIK input clamping current VI < 0 V −18 - mA IOK output clamping current VO < 0 V −50 - mA IO output current output in LOW-state - 128 mA output in HIGH-state - −64 mA - 150 °C −65 +150 °C Tj junction temperature Tstg storage temperature [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. 8. Recommended operating conditions Table 5. Operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VI input voltage VIH HIGH-level input voltage VIL LOW-level Input voltage IOH HIGH-level output current IOL LOW-level output current ∆t/∆V input transition rise or fall rate Tamb ambient temperature Conditions in free air 74ABT162244_4 Product data sheet Min Typ Max Unit 4.5 - 5.5 V 0 - VCC V 2.0 - - V - - 0.8 V −32 - - mA - - 12 mA - - 10 ns/V −40 - +85 °C © NXP B.V. 2009. All rights reserved. Rev. 04 — 9 April 2009 5 of 14 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state 9. Static characteristics Table 6. Static characteristics Symbol Parameter 25 °C Conditions Min Typ Max Min Max - −0.9 −1.2 - −1.2 V VCC = 4.5 V; IOH = −3 mA 2.5 2.9 - 2.5 - V VCC = 5.0 V; IOH = −3 mA 3.0 3.4 - 3.0 - V VCC = 4.5 V; IOH = −32 mA 2.0 2.4 - 2.0 - V VCC = 4.5 V; IOL = 8 mA - - 0.65 - 0.65 V VCC = 4.5 V; IOL = 12 mA - - 0.80 - 0.80 V VIK input clamping voltage VCC = 4.5 V; IIK = −18 mA VOH HIGH-level output voltage LOW-level output voltage VOL −40 °C to +85 °C Unit VI = VIL or VIH VI = VIL or VIH II input leakage current VCC = 5.5 V; VI = GND or 5.5 V - ±0.01 ±1.0 - ±1.0 µA IOFF power-off leakage current VCC = 0 V; VI or VO ≤ 4.5 V - ±5.0 ±100 - ±100 µA IO(pu/pd) power-up/power-down VCC = 2.0 V; VO = 0.5 V; output current VI = GND or VCC; nOE = VCC - ±5.0 ±50 - ±50 µA IOZ OFF-state output current output HIGH-state at VO = 5.5 V - 0.1 10 - 10 µA output LOW-state at VO = 0 V - −0.1 −10 - −10 µA - 5.0 50 - 50 µA −50 −180 mA - 1.0 mA [1] VCC = 5.5 V; VI = VIL or VIH ILO output leakage current HIGH-state; VO = 5.5 V; VCC = 5.5 V; VI = GND or VCC IO output current VCC = 5.5 V; VO = 2.5 V ICC supply current VCC = 5.5 V; VI = GND or VCC [2] −50 −100 −180 outputs HIGH-state - 0.50 1.0 outputs LOW-state - 10 19 - 19 mA outputs 3-state - 0.50 1.0 - 1.0 mA - 100 250 - 250 µA ∆ICC additional supply current per input pin; VCC = 5.5 V; one input at 3.4 V and other inputs at VCC or GND CI input capacitance VI = 0 V or VCC - 3 - - - pF CI/O input/output capacitance outputs disabled; VO = 0 V or VCC - 7 - - - pF [1][3] [1] This is the increase in supply current for each input at 3.4 V. [2] Not more than one output should be tested at a time, and the duration of the test should not exceed one second. [3] This data sheet limit may vary among suppliers. 74ABT162244_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 9 April 2009 6 of 14 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V. For test circuit, see Figure 7. Symbol Parameter 25 °C; VCC = 5.0 V Conditions −40 °C to +85 °C; Unit VCC = 5.0 V ± 0.5 V Min Typ Max Min Max tPLH LOW to HIGH propagation delay nAx to nYx, see Figure 5 1.0 1.8 2.4 1.0 2.7 tPHL HIGH to LOW propagation delay nAx to nYx, see Figure 5 1.6 3.2 4.0 1.6 4.4 tPZH OFF-state to HIGH propagation delay nOE to nYx; see Figure 6 1.2 2.7 3.5 1.2 4.3 ns tPZL OFF-state to LOW propagation delay nOE to nYx; see Figure 6 2.6 5.0 6.2 2.6 7.3 ns tPHZ HIGH to OFF-state propagation delay nOE to nYx; see Figure 6 1.5 3.0 3.8 1.5 4.5 ns tPLZ LOW to OFF-state propagation delay nOE to nYx; see Figure 6 1.3 2.6 3.3 1.3 4.6 ns 74ABT162244_4 Product data sheet ns © NXP B.V. 2009. All rights reserved. Rev. 04 — 9 April 2009 7 of 14 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state 11. Waveforms VI VM VM input nAx 0V t PLH t PHL VOH VM output nYx VM VOL 001aad257 VM = 1.5 V; VOL and VOH are typical voltage output levels that occur with the output load. Fig 5. Input (nAx) to output (nYx) propagation delay VI nOE input VM GND tPZL tPLZ 3.5 V VM nYx output VOL + 0.3 V VOL t PZH t PHZ VOH nYx output VM VOH − 0.3 V 0V 001aae233 VM = 1.5 V; VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. 3-state output enable and disable times 74ABT162244_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 9 April 2009 8 of 14 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state 12. Test information VI tW 90 % 90 % negative pulse VM 10 % 0V VI tf tr tr tf 90 % positive pulse 0V VM VM VM 10 % 10 % tW 001aac221 VM = 1.5 V. a. Input pulse definition VEXT VCC PULSE GENERATOR VI RL VO DUT CL RT RL 001aac764 Test data is given in Table 8. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. b. Test circuit for 3-state outputs Fig 7. Table 8. Load circuitry for switching times Test data Input Load VEXT VI fi tW tr, tf CL RL tPHZ, tPZH tPLZ, tPZL tPLH, tPHL 3.0 V 1 MHz 500 ns 2.5 ns 50 pF 500 Ω open 7.0 V open 74ABT162244_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 9 April 2009 9 of 14 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state 13. Package outline TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1 E D A X c HE y v M A Z 48 25 Q A2 (A 3) A1 pin 1 index A θ Lp L 1 detail X 24 w M bp e 2.5 0 5 mm scale DIMENSIONS (mm are the original dimensions). UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z θ mm 1.2 0.15 0.05 1.05 0.85 0.25 0.28 0.17 0.2 0.1 12.6 12.4 6.2 6.0 0.5 8.3 7.9 1 0.8 0.4 0.50 0.35 0.25 0.08 0.1 0.8 0.4 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT362-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 Fig 8. Package outline SOT362-1 (TSSOP48) 74ABT162244_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 9 April 2009 10 of 14 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1 D E A X c y HE v M A Z 25 48 Q A2 A1 A (A 3) θ pin 1 index Lp L 24 1 detail X w M bp e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.8 0.4 0.2 2.35 2.20 0.25 0.3 0.2 0.22 0.13 16.00 15.75 7.6 7.4 0.635 10.4 10.1 1.4 1.0 0.6 1.2 1.0 0.25 0.18 0.1 0.85 0.40 8 o 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT370-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-118 Fig 9. Package outline SOT370-1 (SSOP48) 74ABT162244_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 9 April 2009 11 of 14 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state 14. Abbreviations Table 9. Abbreviations Acronym Description CDM Charged Device Model ESD ElectroStatic Discharge 15. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes 74ABT162244_4 20090409 Product data sheet - 74ABT_H162244_3 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. 74ABTH162244 removed 74ABT_H162244_3 19981022 Product specification - 74ABT_H162244_2 74ABT_H162244_2 19980225 Product specification - 74ABT_H162244_1 74ABT_H162244_1 19961023 Product specification - - 74ABT162244_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 9 April 2009 12 of 14 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 16.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] 74ABT162244_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 9 April 2009 13 of 14 74ABT162244 NXP Semiconductors 16-bit buffer/line driver with 30 Ω series termination resistors; 3-state 18. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 9 April 2009 Document identifier: 74ABT162244_4