INTEGRATED CIRCUITS 74ABT16652 74ABTH16652 16-bit transceiver/register, non-inverting (3-State) Product specification Supersedes data of 1995 Aug 17 IC23 Data Handbook 1998 Feb 27 Philips Semiconductors Product specification 74ABT16652 74ABTH16652 16-bit transceiver/register, non-inverting (3-State) FEATURES DESCRIPTION • Independent registers for A and B buses • Multiple VCC and GND pins minimize switching noise • Power-up 3-State • 74ABTH16652 incorporates bus-hold data inputs which eliminate The 74ABT16652 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT16652 transceiver/register consists of two sets of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes HIGH. Output Enable (nOEAB, (nOEBA) and Select (nSAB, nSBA) pins are provided for bus management. the need for external pull-up resistors to hold unused inputs • Power-up reset • Live insertion/extraction permitted • Multiplexed real-time and stored data • Output capability: +64mA/–32mA • Latch-up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 Two options are available, 74ABT16652 which does not have the bus-hold feature and 74ABTH16652 which incorporates the bus-hold feature. and 200V per Machine Model QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 2.3 1.8 ns tPLH tPHL Propagation delay nAx to nBx CL = 50pF; VCC = 5V CIN Input capacitance VI = 0V or VCC 4 pF CI/O I/O capacitance VO = 0V or VCC; 3-State 7 pF 500 µA 8 mA ICCZ Outputs disabled; VCC =5.5V Quiescent supply current ICCL Outputs low; VCC = 5.5V ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 56-Pin Plastic SSOP Type III –40°C to +85°C 74ABT16652 DL BT16652 DL SOT371-1 56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABT16652 DGG BT16652 DGG SOT364-1 56-Pin Plastic SSOP Type III –40°C to +85°C 74ABTH16652 DL BH16652 DL SOT371-1 56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABTH16652 DGG BH16652 DGG SOT364-1 LOGIC SYMBOL 1B6 44 23 2A6 1B5 45 21 2A5 1A4 1B4 47 20 9 1A3 1B3 48 8 1A2 1B2 6 1A1 1B1 5 1A0 1B0 3 54 55 2B7 33 2B6 34 2B5 36 2A4 2B4 37 19 2A3 2B3 38 49 17 2A2 2B2 40 51 16 2A1 2B1 41 52 15 2A0 2B0 42 2CPBA 1SAB 2 1SBA 1CPAB 1CPBA 2A7 2OEAB 10 24 2SBA 1A5 43 2SAB 1A6 12 1B7 2CPAB 13 1OEBA 1A7 1OEAB 14 2OEBA 28 29 1 56 27 26 31 30 SH00047 1998 Feb 27 2 853-1790 19026 Philips Semiconductors Product specification 74ABT16652 74ABTH16652 16-bit transceiver/register, non-inverting (3-State) PIN CONFIGURATION LOGIC SYMBOL (IEEE/IEC) 1OEAB 1 56 1OEBA 1CPAB 2 55 1CPBA 1SAB 3 54 1SBA GND 4 53 GND 1A0 5 52 1B0 1A1 6 51 VCC 7 1A2 1OEBA 56 1OEAB 1 EN1 [BA] EN2 [AB] 1CPBA 55 1SBA 54 G4 1B1 1CPAB 2 1SAB 3 G6 50 VCC 2OEBA 29 EN7 [BA] 8 49 1B2 2OEAB 28 EN8 [AB] 1A3 9 48 1B3 1A4 10 47 1B4 2CPBA 30 2SBA 31 G10 GND 11 46 GND 2CPAB 27 2SAB 26 G12 1A5 12 45 1B5 1A6 13 44 1B6 1A7 14 43 1B7 2A0 15 42 2B0 2A1 16 41 2B1 1AO 5 C3 C5 C9 C11 1 6 1 17 40 2B2 GND 18 39 GND 2A3 19 38 2B3 2A4 20 37 2A5 21 VCC 3D 52 1B0 4 1 5D 2A2 4 ∇1 1 2∇ 6 1A1 6 51 1B1 1A2 8 49 1B2 1A3 9 48 1B3 2B4 1A4 10 47 1B4 36 2B5 1A5 12 45 1B5 22 35 VCC 1A6 13 44 1B6 2A6 23 34 2B6 1A7 14 2A7 24 33 2B7 GND 25 32 GND 2SAB 26 31 2SBA 2CPAB 27 30 2CPBA 20EAB 28 29 2OEBA 2A0 15 SH00046 43 1B7 ∇7 1 10 9D 10 11D 12 1 12 42 2B0 1 1 8∇ 2A1 16 2A2 17 41 2B1 40 2B2 2A3 19 38 2B3 2A4 20 2A5 21 37 2B4 36 2B5 34 2B6 2A6 23 2A7 24 33 2B7 SH00045 PIN DESCRIPTION PIN NUMBER SYMBOL 2, 55, 27, 30 1CPAB, 1CPBA, 2CPAB, 2CPBA Clock input A to B / Clock input B to A 3, 54, 26, 31 1SAB, 1SBA, 2SAB, 2SBA Select input A to B / Select input B to A 5, 6, 8, 9, 10, 12, 13, 14 15, 16, 17, 19, 20, 21, 23, 24 1A0 – 1A7, 2A0 – 2A7 Data inputs/outputs (A side) 52, 51, 49, 48, 47, 45, 44, 43 42, 41, 40, 38, 37, 36, 34, 33 1B0 – 1B7, 2B0 – 2B7 Data inputs/outputs (B side) 1, 56, 28, 29 1OEAB, 1OEBA, 2OEAB, 2OEBA 4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V) 7, 22, 35, 50 VCC Positive supply voltage 1998 Feb 27 NAME AND FUNCTION Output enable inputs 3 Philips Semiconductors Product specification 74ABT16652 74ABTH16652 16-bit transceiver/register, non-inverting (3-State) LOGIC DIAGRAM nOEBA nOEAB nCPBA nSBA nCPAB nSAB 1of 8 Channels 1D C1 Q nA0 nB0 1D C1 Q nA1 nB1 nA2 nB2 nA3 nB3 nA4 nB4 DETAIL A X 7 nA5 nB5 nA6 nB6 nA7 nB7 SH00065 FUNCTION TABLE INPUTS H L X ↑ * ** DATA I/O OPERATING MODE nOEAB nOEBA nCPAB nCPBA nSAB nSB A nAx nBx L L H H H or L ↑ H or L ↑ X X X X Input Input Isolation Store A and B data X H H H ↑ ↑ H or L ↑ X ** X X Input Unspecified output* Store A, Hold B Store A in both registers L L X L H or L ↑ ↑ ↑ X X X ** Unspecified output* Input Hold A, Store B Store B in both registers L L L L X X X H or L X X L H Output Input Real time B data to A bus Stored B data to A bus H H H H X H or L X X L H X X Input Output Real time A data to B bus Store A data to B bus H L H or L H or L H H Output Output Stored A data to B bus Stored B data to A bus = = = = High voltage level Low voltage level Don’t care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the nOEBA and nOEAB inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock. If both Select controls (nSAB and nSBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be staggered in order to load both registers. 1998 Feb 27 4 Philips Semiconductors Product specification 74ABT16652 74ABTH16652 16-bit transceiver/register, non-inverting (3-State) transferred through the device in real time. The output enable pins determine the direction of the data flow. The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74ABT16652.The select pins determine whether data is stored or REAL TIME BUS TRANSFER BUS B TO BUS A A B REAL TIME BUS TRANSFER BUS A TO BUS B A B A B } } } nOEAB nOEBA nCPAB nCPBA nSAB nSBA L L X X X L STORAGE FROM A, B, OR A AND B nOEAB nOEBA nCPAB nCPBA nSAB nSBA H H X X L X nOEAB nOEBA nCPAB nCPBA nSAB nSBA X H ↑ X X X L L X H X ↑ ↑ ↑ X X X X TRANSFER STORED DATA TO A OR B A B } nOEAB nOEBA nCPAB nCPBA nSAB nSBA H L H|L H|L H H SH00066 1998 Feb 27 5 Philips Semiconductors Product specification 74ABT16652 74ABTH16652 16-bit transceiver/register, non-inverting (3-State) ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA output in Off or HIGH state –0.5 to +5.5 V output in LOW state 128 output in HIGH state –64 DC supply voltage IIK DC input diode current VI DC input voltage3 IOK DC output diode current VOUT DC output voltage3 IOUT O DC output current Tstg Storage temperature range VI < 0 mA –65 to 150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER UNIT DC supply voltage MIN MAX 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level Input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 10 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range 1998 Feb 27 2.0 6 V Philips Semiconductors Product specification 74ABT16652 74ABTH16652 16-bit transceiver/register, non-inverting (3-State) DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER MIN VIK VOH Input clamp voltage High-level output voltage VOL Low-level output voltage VRST II VCC = 4.5V; IIK = –18mA IOFF IPU/PD TYP MAX –0.9 –1.2 MIN UNIT MAX –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 4.0 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.4 2.0 V VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.35 0.55 0.55 V Power-up output low voltage3 VCC = 5.5V; IOL = 1mA; VI = GND or VCC 0.13 0.55 0.55 V Input leakage current VCC = 5 5.5V; 5V; VI = GND or VCC ±0 01 ±0.01 ±1 0 ±1.0 ±1 0 ±1.0 µA A Control pins VCC = 4.5V; VI = 0.8V IHOLD Tamb = –40°C to +85°C Tamb = +25°C TEST CONDITIONS Bus H B Hold ld currentt A or B Ports5 74ABTH16652 Power-off leakage current Power-up/down 3-State output current4 35 35 VCC = 4.5V; VI = 2.0V –75 –75 VCC = 5.5V; VI = 0 to 5.5V ±800 µA VCC = 0V; VO = 4.5V; VI = 0V or 5.5V ±1.0 ±100 ±100 µA VCC = 2.1V; VO = 0.0V; VI = GND or VCC ±1.0 ±50 ±50 µA IIH + IOZH 3-State output High current VCC = 5.5V; VO = 5.5V; VI = VIL or VIH 1.0 10 10 µA IIL + IOZL 3-State output Low current VCC = 5.5V; VO = 0.0V; VI = VIL or VIH –1.0 –10 –10 µA VCC = 5.5V; VO = 5.5V; VI = GND or Vcc 5.0 50 50 µA –80 –180 –180 mA 0.5 2 2 mA VCC = 5.5V; Outputs Low, VI = GND or VCC 8 19 19 mA VCC = 5.5V; Outputs 3-State; VI = GND or VCC 0.5 2 2 mA ICEX IO Output High leakage current Output current1 VCC = 5.5V; Outputs High, VI = GND or VCC ICCH ICCL VCC = 5.5V; VO = 2.5V Quiescent supply current ICCZ –50 –50 ∆ICC Additional supply current per input pin2 74ABT16652 VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 5.0 50 50 µA ∆ICC Additional supply current per input pin2 74ABTH16652 VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 200 500 500 µA NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0 and 2.1V. When the part enables with VCC between 2.1V and 4.5V, the outputs will correctly function with respect to all input logic states. 5. This is the bus hold overdrive current required to force the input to the opposite logic state. 1998 Feb 27 7 Philips Semiconductors Product specification 74ABT16652 74ABTH16652 16-bit transceiver/register, non-inverting (3-State) AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER +25oC Tamb = -40 to +85oC VCC = +5.0V ±0.5V Tamb = VCC = +5.0V WAVEFORM MIN TYP MAX MIN UNIT MAX fMAX Maximum clock frequency 1 125 tPLH tPHL Propagation delay nCPAB to nBx or nCPBA to nAx 1 1.5 1.5 3.3 2.8 4.0 4.1 125 1.5 1.5 4.9 4.7 MHz ns tPLH tPHL Propagation delay nAx to nBx or nBx to nAx 2 1.0 1.0 2.3 1.8 3.2 4.1 1.0 1.0 3.9 4.6 ns tPLH tPHL Propagation delay nSAB to nBx or nSBA to nAx 3 1.0 1.0 3.4 2.6 4.3 4.3 1.0 1.0 5.0 5.0 ns tPZH tPZL Output enable time nOEBA to nAx 5 6 1.0 1.5 2.5 2.2 4.1 4.4 1.0 1.5 5.0 5.3 ns tPHZ tPLZ Output disable time nOEBA to nAx 5 6 1.5 1.5 3.6 2.7 4.4 3.6 1.5 1.5 4.9 4.0 ns tPZH tPZL Output enable time nOEAB to nBx 5 6 1.0 1.5 2.9 3.0 3.6 3.9 1.0 1.5 4.2 4.6 ns tPHZ tPLZ Output disable time nOEAB to nBx 5 6 2.0 1.5 3.1 2.3 5.5 4.5 2.0 1.5 5.9 5.2 ns AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25oC VCC = +5.0V Tamb = -40 to +85oC VCC = +5.0V ±0.5V UNIT MIN TYP MIN 4 3.0 3.0 1.2 0.8 3.0 3.0 ns Hold time nAx to nCPBA, nBx to nCPAB 4 1.0 1.0 –0.7 –1.1 1.0 1.0 ns Pulse width, High or Low nCPAB or nCPBA 1 4.3 4.3 1.0 1.0 4.3 4.3 ns ts(H) ts(L) Setup time nAx to nCPBA, nBx to nCPAB th(H) th(L) tw(H) tw(L) AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V 1/fMAX nCPBA or nCPAB VM 3.0V or VCC whichever is less VM 3.0V or VCC nAx or nBx VM tPLH tw(L) tPHL VM tPHL VOH tPLH nBx or nAx VOH nAx or nBx VM 0V 0V tw(H) VM VM VM VM VOL VOL SH00030 SH00048 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency 1998 Feb 27 Waveform 2. Propagation Delay, nAx to nBx or nBx to nAx 8 Philips Semiconductors Product specification 74ABT16652 74ABTH16652 16-bit transceiver/register, non-inverting (3-State) AC WAVEFORMS (Continued) VM = 1.5V, VIN = GND to 3.0V 3.0V or VCC whichever is less 3.0V or VCC nSBA or nSAB VM nOEBA VM VM 0V 0V tPHL VM nOEAB tPZH tPHZ tPLH VOH VOH nAx or nBx VM VY VM VM nAx or nBx 0V VOL SH00050 SH00032 Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level Waveform 3. Propagation Delay, SBA to nAx or SAB to nBx nAx or nBx ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ VM VM VM 3.0V or VCC VM VM th(H) nCPBA or nCPAB ts(L) VM nOEAB 0V tPZL 0V ts(H) 3.0V or VCC nOEBA tPLZ th(L) nAx or nBx 3.0V or VCC VM VM VX VOL VM tW(L) 3.0V or VCC 0V 0V SH00051 NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level SH00049 Waveform 4. Data Setup and Hold Times TEST CIRCUIT AND WAVEFORMS VCC 7.0V VIN RL VOUT PULSE GENERATOR NEGATIVE PULSE 90% VM CL AMP (V) VM 10% D.U.T. RT tW 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% 90% Test Circuit for 3-State Outputs POSITIVE PULSE VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open 10% tW SWITCH POSITION 0V VM = 1.5V Input Pulse Definition DEFINITIONS: RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. INPUT PULSE REQUIREMENTS FAMILY 74ABT16 Amplitude Rep. Rate tw tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns SH00022 1998 Feb 27 9 Philips Semiconductors Product specification 16-bit transceiver/register, non-inverting (3-State) SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm 1998 Feb 27 10 74ABT16652 74ABTH16652 SOT371-1 Philips Semiconductors Product specification 16-bit transceiver/register, non-inverting (3-State) TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm 1998 Feb 27 11 74ABT16652 74ABTH16652 SOT364-1 Philips Semiconductors Product specification 16-bit transceiver/register, non-inverting (3-State) 74ABT16652 74ABTH16652 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 12 Date of release: 05-96 9397-750-03499