BLF6G10L-40BRN Power LDMOS transistor Rev. 01 — 9 August 2010 Preliminary data sheet 1. Product profile 1.1 General description 40 W LDMOS power transistor for base station applications at frequencies from 700 MHz to 1 GHz. Table 1. Typical performance Typical RF performance at Tcase = 25 °C in a class-AB production test circuit. Mode of operation 2-carrier W-CDMA[1] [1] ηD f VDS PL(AV) Gp ACPR (MHz) (V) (W) (dB) (%) (dBc) 791 to 821 28 2.5 23.0 15.0 −42.5 Test signal: 3GPP test model 1; 1 to 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF per carrier; carrier spacing 5 MHz. CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling. 1.2 Features and benefits Typical 2-carrier W-CDMA performance at frequencies of 791 MHz and 821 MHz, a supply voltage of 28 V and an IDq of 360 mA: Average output power (PL(AV)) = 2.5 W Power gain (Gp) = 23.0 dB Drain efficiency (ηD) = 15.0 % ACPR = −42.5 dBc Easy power control Integrated ESD protection Enhanced ruggedness High efficiency Excellent thermal stability Designed for broadband operation (728 MHz to 960 MHz) Internally matched for ease of use Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances (RoHS) Integrated current sense BLF6G10L-40BRN NXP Semiconductors Power LDMOS transistor 1.3 Applications RF power amplifiers for W-CDMA base stations and multi-carrier GSM and LTE applications in the 728 MHz to 960 MHz frequency range. 2. Pinning information Table 2. Pinning Pin Description Simplified outline Graphic symbol BLF6G10L-40BRN (SOT1112A) 1 drain 2 gate 3 source 4, 5 sense drain 6, 7 sense gate 4 1 5 4, 5 1 [1] 2 6, 7 3 3 sym126 2 6 [1] 7 Connected to flange. 3. Ordering information Table 3. Ordering information Type number Package BLF6G10L-40BRN BLF6G10L-40BRN Preliminary data sheet Name Description Version - SOT1112A flanged ceramic package; 2 mounting holes; 6 leads All information provided in this document is subject to legal disclaimers. Rev. 01 — 9 August 2010 © NXP B.V. 2010. All rights reserved. 2 of 13 BLF6G10L-40BRN NXP Semiconductors Power LDMOS transistor 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS Conditions Min Max Unit drain-source voltage - 65 V VGS gate-source voltage −0.5 +11 V VGS(sense) sense gate-source voltage −0.5 +9 V ID drain current - 11 A Tstg storage temperature −65 +150 °C Tj junction temperature - 200 °C 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Typ Unit Rth(j-case) thermal resistance from junction to case Tcase = 80 °C; PL = 2.5 W (CW) 1.7 K/W 6. Characteristics Table 6. Characteristics Tj = 25 °C per section; unless otherwise specified. Symbol Parameter Conditions V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 0.5 mA VGS(th) gate-source threshold voltage VDS = 10 V; ID = 59 mA IDq quiescent drain current sense transistor: IDS = 8.2 mA, VDS = 26.5 V; main transistor: VDS = 28 V IDSS drain leakage current IDSX Typ Max 65 - - V 1.4 1.9 2.4 V 280 360 420 mA VGS = 0 V; VDS = 28 V - - 1.4 μA drain cut-off current VGS = VGS(th) + 3.75 V; VDS = 10 V 8.8 10 - A IGSS gate leakage current VGS = 11 V; VDS = 0 V - - 140 nA gfs forward transconductance VDS = 10 V; ID = 2.9 A 2.7 4.3 - S RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V; ID = 2.1 A 0.09 0.25 0.39 Ω BLF6G10L-40BRN Preliminary data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 9 August 2010 Min Unit © NXP B.V. 2010. All rights reserved. 3 of 13 BLF6G10L-40BRN NXP Semiconductors Power LDMOS transistor 7. Application information Table 7. Application information Mode of operation: 2-carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test model 1; 1 to 64 DPCH; f1 = 788.5 MHz; f2 = 793.5 MHz; f3 = 818.5 MHz; f4 = 823.5 MHz; RF performance at VDS = 28 V; IDq = 360 mA; Tcase = 25 °C; unless otherwise specified in a class AB production test circuit. Symbol Parameter PL(AV) average output power Conditions Min Typ Max Unit - 2.5 - W Gp power gain PL(AV) = 2.5 W 22.2 23.0 - dB RLin input return loss PL(AV) = 2.5 W 11 15 - dB ηD drain efficiency PL(AV) = 2.5 W 14 15 - % ACPR adjacent channel power ratio PL(AV) = 2.5 W - −42.5 −41 dBc Table 8. Application information Mode of operation; 1 carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test model 1; 1 to 64 DPCH; f1 = 821 MHz; RF performance at VDS = 28 V; IDq = 360 mA; Tcase = 25 °C; unless otherwise specified in a class AB production test circuit. Symbol Parameter Conditions Min Typ Max Unit PAR peak-to-average ratio PL(AV) = 10 W at 0.01 % probability on CCDF 5.5 5.9 - dB 7.1 Ruggedness in class-AB operation The BLF6G10L-40BRN is capable of withstanding a load mismatch corresponding to VSWR = 1 : 10 through all phases under the following conditions: VDS = 28 V; IDq = 360 mA; PL = 40 W; f = 791 MHz and 821 MHz. 7.2 Impedance information Table 9. Typical impedance per section IDq = 360 mA; main transistor VDS = 28 V. f (MHz) ZS[1] (Ω) ZL[1] (Ω) 800 2.0 − j5.0 5.3 + j2.9 810 2.0 − j5.5 5.6 + j2.3 [1] ZS and ZL are defined in Figure 1. drain ZL gate ZS 001aaf059 Fig 1. BLF6G10L-40BRN Preliminary data sheet Definition of transistor impedance All information provided in this document is subject to legal disclaimers. Rev. 01 — 9 August 2010 © NXP B.V. 2010. All rights reserved. 4 of 13 BLF6G10L-40BRN NXP Semiconductors Power LDMOS transistor 7.3 Typical power sweep 7.3.1 CW 014aab235 24 Gp (dB) 80 ηD (%) (3) (4) (1) (2) 23 60 22 40 21 20 20 0 5 15 25 35 45 PL (W) (1) dB power gain at 791 MHz. (2) dB power gain at 821 MHz. (3) % drain efficiency at 821 MHz. (4) % drain efficiency at 791 MHz. Fig 2. Typical continuous wave: power gain and drain efficiency as a function of output power 014aab236 19 RLin (dB) 18 (1) 17 (2) 16 15 5 15 25 35 45 PL (W) (1) dB return loss at 821 MHz. (2) dB return loss at 791 MHz. Fig 3. BLF6G10L-40BRN Preliminary data sheet Typical continuous wave: input return loss as a function of output power All information provided in this document is subject to legal disclaimers. Rev. 01 — 9 August 2010 © NXP B.V. 2010. All rights reserved. 5 of 13 BLF6G10L-40BRN NXP Semiconductors Power LDMOS transistor 7.3.2 2-carrier W-CDMA (5 MHz spacing) 014aab233 25 Gp (dB) 10 ηD (%) (3) (1) 24 (4) 9 (2) 014aab234 −10 ACPR1, ACPR2 (dBc) 10 PAR (dB) −20 9 (1) (3) (2) (4) 23 8 −30 8 22 7 −40 7 (5) 21 20 0 4 8 12 6 −50 5 −60 16 (6) 6 5 0 4 8 12 PL (AV) 16 PL (AV) (1) dB power gain at 791 MHz. (1) dB PAR at 791 MHz. (2) dB power gain at 821 MHz. (2) dB PAR at 821 MHz. (3) % drain efficiency at 791 MHz. (3) 5 MHz ACPR, dBc at 791 MHz. (4) % drain efficiency at 821 MHz. (4) 5 MHz ACPR, dBc at 821 MHz. (5) 10 MHz ACPR, dBc at 791 MHz. (6) 10 MHz ACPR, dBc at 821 MHz. a. Power gain and drain efficiency as a function of average output power b. ACPR, and PAR as a function of average output power 3GPP test model 1; 1 to 64 DPCH; PAR = 7.5 dB at 0.01% probability per carrier; 5 MHz carrier spacing. Fig 4. Typical 2-carrier W-CDMA: power gain, drain efficiency and ACPR as a function of average output power BLF6G10L-40BRN Preliminary data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 9 August 2010 © NXP B.V. 2010. All rights reserved. 6 of 13 BLF6G10L-40BRN NXP Semiconductors Power LDMOS transistor 8. Test information 8.1 Test circuit The PCB test circuit layout is shown in Figure 5. R3 R1 C7 − + C3 R2 C1 BLF6G10L-40BRN Output Circuit RO4350 30 MII NXP C9 C11 BLF6G10L-40BRN Output Circuit RO4350 30 MII NXP C5 C6 BLF6G10L-40BRN Output Circuit RO4350 30 MII NXP BLF6G10L-40BRN Output Circuit RO4350 30 MII NXP C8 R4 C2 C10 C4 014aab232 When placing components, it is possible to use the vias as a reference. The above layout shows the test circuit used to measure the devices in production. A more appropriate application demonstration for specific customer needs can be obtained from the RF Power and Base station group. Fig 5. Input and output test circuit PCBs BLF6G10L-40BRN Preliminary data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 9 August 2010 © NXP B.V. 2010. All rights reserved. 7 of 13 BLF6G10L-40BRN NXP Semiconductors Power LDMOS transistor 8.2 Bill of materials (BOM) A list of all the components needed to build the RF test circuit is shown in Table 10. Table 10. Bill of materials Component Type Value Code number Remarks C1, C2, C3, C4 multi-layer ceramic chip capacitor Description MURATA 10 μF - - C5, C6 multi-layer ceramic chip capacitor ATC100B 47 pF - - C7, C8 multi-layer ceramic chip capacitor ATC100B 100 pF - - C9, C10 multi-layer ceramic chip capacitor ATC100B 30 pF - - C11 electrolytic capacitor - 470 μF; 63 V - - R1 chip resistor Philips 1206 820 Ω - - R2 chip resistor Philips 1206 2.2 kΩ - - R3, R4 chip resistor Philips 1206 15 Ω - - - N-connector female 23N-50-057/1 - - Suhner - N-connector male 13N-50-057/1 - - Suhner - 2 × contact block - 6 × 5 mm - brass (milled) - 2 × contact block - 2.5 × 2.5 mm - brass (milled) - DC-connector 8 pin male 8140-115 - - Souriau (Farnell) - 2 × DC-connector 2 pin male 8140-12 - - Souriau (Farnell) - solid copper wire (1 mm diameter) - - - - silicon isolated SIMX-F 30 mm 0.75 mm2 - flexible copper wire - input PCB - - - see PCB information - output PCB - - - see PCB information - 8 × washer M2 - - - brass (nickel plated) - 14 × bolt M2 - 5 mm - brass (nickel plated) - 4 × bolt M3 - 12 mm - chrome nickel steel - 2 × bolt M3 - 30 mm - chrome nickel steel - 2 × washer M3 - - - chrome nickel steel - 4 × spring washer M3 - - - chrome nickel steel - 10 × isolated paper washer M2 - - - paper - auto bias[1] 28 V/IDS = 8.2 mA - - - - base plate[2] - - - - [1] Auto bias documentation available on request from RF Power and Base station group, NXP Semiconductors. [2] Base plate mechanical drawing available on request from RF Power and Base station group, NXP Semiconductors. BLF6G10L-40BRN Preliminary data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 9 August 2010 © NXP B.V. 2010. All rights reserved. 8 of 13 BLF6G10L-40BRN NXP Semiconductors Power LDMOS transistor 9. Package outline Flanged ceramic package; 2 mounting holes; 6 leads SOT1112A D A F D1 L U1 B q 4 c C 1 5 α U2 H p Z E1 w1 3 A E B A 6 2 b b1 7 w2 0 C Q 5 10 mm scale Dimensions Unit(1) A p Q(2) 1.14 17.12 3.00 3.30 1.70 0.89 16.10 2.69 2.92 1.45 20.19 9.65 0.38 0.38 0.045 0.674 0.118 0.130 0.067 0.805 0.39 0.37 0.37 0.035 0.634 0.106 0.115 0.057 b b1 c D D1 E E1 1.14 5.26 0.18 9.65 9.65 9.65 9.65 0.89 5.00 0.10 9.40 9.40 9.40 9.40 max 0.183 0.045 0.207 0.007 0.38 inches nom min 0.148 0.035 0.197 0.004 0.37 0.38 0.37 mm max 4.65 nom min 3.76 F H L q U1 U2 0.6 0.01 0.02 0.795 0.38 Note 1. millimeter dimensions are derived from the original inch dimensions. 2. dimension is measured 0.030 inch (0.76 mm) from the body. References IEC JEDEC JEITA Z α 5.97 64° 5.72 62° 0.235 64° 0.225 62° sot1112a_po European projection Issue date 09-10-12 10-02-02 SOT1112A Fig 6. w2 0.25 0.51 15.24 Outline version w1 20.45 9.91 Package outline SOT1112A BLF6G10L-40BRN Preliminary data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 9 August 2010 © NXP B.V. 2010. All rights reserved. 9 of 13 BLF6G10L-40BRN NXP Semiconductors Power LDMOS transistor 10. Abbreviations Table 11. Abbreviations Acronym Description CCDF Complementary Cumulative Distribution Function LDMOS Laterally Diffused Metal-Oxide Semiconductor LTE Long Term Evolution PAR Peak-to-Average power Ratio RF Radio Frequency VSWR Voltage Standing-Wave Ratio W-CDMA Wideband Code Division Multiple Access 11. Revision history Table 12. Revision history Document ID Release date Data sheet status BLF6G10L-40BRN v.1 20100809 Preliminary data sheet - BLF6G10L-40BRN Preliminary data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 9 August 2010 Change notice Supersedes - © NXP B.V. 2010. All rights reserved. 10 of 13 BLF6G10L-40BRN NXP Semiconductors Power LDMOS transistor 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. 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However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 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All rights reserved. 11 of 13 BLF6G10L-40BRN NXP Semiconductors Power LDMOS transistor Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BLF6G10L-40BRN Preliminary data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 9 August 2010 © NXP B.V. 2010. All rights reserved. 12 of 13 BLF6G10L-40BRN NXP Semiconductors Power LDMOS transistor 14. Contents 1 1.1 1.2 1.3 2 3 4 5 6 7 7.1 7.2 7.3 7.3.1 7.3.2 8 8.1 8.2 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . 3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Application information. . . . . . . . . . . . . . . . . . . 4 Ruggedness in class-AB operation . . . . . . . . . 4 Impedance information . . . . . . . . . . . . . . . . . . . 4 Typical power sweep . . . . . . . . . . . . . . . . . . . . 5 CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2-carrier W-CDMA (5 MHz spacing) . . . . . . . . . 6 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 7 Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Bill of materials (BOM) . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 9 August 2010 Document identifier: BLF6G10L-40BRN