INTEGRATED CIRCUITS CBT3857 10-bit bus switch with 10 kΩ pull-down termination resistors Product specification Supersedes data of 1998 Dec 10 1999 Sep 14 Philips Semiconductors Product specification 10-bit bus switch with 10 kΩ pull-down termination resistors FEATURES CBT3857 DESCRIPTION • Enable signal is SSTL_2 compatible • Optimized for use in Double Data Rate (DDR) SDRAM This 10-bit bus switch is designed for 3 V to 3.6 V VCC operation and SSTL_2 output enable (OE) input levels. When OE is LOW, the 10-bit bus switch is on and port A is connected to port B. When OE is HIGH, the switch is open, and a high-impedance state exists between the two ports. applications • Flow-through architecture optimizes PCB layout • Designed to be used with 200 Mbps • Switch on resistance is designed to eliminate the need for series The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The CBT3857 is characterized for operation from 0°C to +85°C. resistor to DDR SDRAM • Internal 10 kΩ pull-down resistors on B port • Internal 50 kΩ pull-up resistor on output enable input • Full DDR solution provided when used with SSTL16857 and PCK857 • Latch-up protection exceeds 500 mA per JESD78 • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0 V PARAMETER TYPICAL UNIT tPLH tPHL Propagation delay An to Yn CL = 30 pF; VCC = 3.3 V 720 ps CIN Input capacitance VI = 0 V or VCC 2.8 pF COUT Output capacitance Outputs disabled; VO = 0 V or VCC 6.4 pF ICCZ Total supply current VCC = 3.6 V 1 mA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE DWG NUMBER 0°C to +85°C CBT3857 PW SOT355–1 24-Pin Plastic TSSOP Type I PIN CONFIGURATION VREF PIN DESCRIPTION ÎÎ PIN NUMBER SYMBOL NAME AND FUNCTION Reference output voltage 1 VREF 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 A1–A10 1 24 A1 2 23 OE 12 GND A2 3 22 B1 B1–B10 A3 4 21 22, 21, 20, 19, 18, 17, 16, 15, 14, 13 B2 A4 5 20 B3 A5 6 19 B4 A6 7 18 B5 A7 8 17 B6 A8 9 16 B7 A9 10 15 B8 A10 11 14 B9 GND 12 13 B10 Vcc Inputs Ground (V) Outputs 23 OE Output enable 24 VCC Positive supply voltage FUNCTION TABLE INPUT OE FUNCTION L A port = B port H Disconnect H = High voltage level L = Low voltage level SA00516 1999 Sep 14 2 853–2168 22329 Philips Semiconductors Product specification 10-bit bus switch with 10 kΩ pull-down termination resistors CBT3857 LOGIC DIAGRAM (POSITIVE LOGIC) A1 SIMPLIFIED SCHEMATIC, EACH FET SWITCH 22 2 SW B1 RINT A 13 11 A10 B B10 SW RINT OE OE VREF 23 1 SA00518 SA00517 ABSOLUTE MAXIMUM RATINGS1, 3 SYMBOL VCC PARAMETER CONDITIONS DC supply voltage UNIT V –50 mA IIK DC input clamp current VI DC input voltage range (OE only)2 VCC + 0.5 V Storage temperature range –65 to 150 °C DC input voltage range (except OE)2 –0.5 to 4.6 V Tstg VI VI/O < 0 RATING –0.5 to +4.6 NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. The package thermal impedance is calculated in accordance with JESD 51. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC DC supply voltage VREF Reference voltage (0.38 x VCC) VIH AC high-level input voltage VIL AC low-level Input voltage VIH DC high-level input voltage VIL DC low-level Input voltage Tamb LIMITS PARAMETER Typ Max 3 3.3 3.6 V 1.15 1.25 1.35 V VREF + 350 mV VREF – 350 mV 0 NOTE: 1. All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. 1999 Sep 14 V VREF + 180 mV Operating free-air temperature range 3 UNIT Min V V VREF – 180 mV V +85 °C Philips Semiconductors Product specification 10-bit bus switch with 10 kΩ pull-down termination resistors CBT3857 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER Tamb = 0°C to +85°C TEST CONDITIONS Typ1 Min VIK II Input clamp voltage VCC = 3 V; II = –18 mA UNIT Max –1.2 V OE ±0.73 ±500 µA A Port ±0.1 ±1 µA B Port ±20 ±500 µA VREF Input leakage current VCC = 3 3.6 6 V; VI = VCC or GND ±0.1 ±1 µA ICC Quiescent supply current VCC = 3.6 V; IO = 0, VI = VCC or GND 0.7 1.5 mA CI Control pins VI= 3 V or 0 2.8 Power-off leakage current VO = 3 V or 0; OE = VCC CiO(OFF) ron2 On-resistance roff2 Off-resistance pF 6.4 pF VCC = 3 V to 3.6 V; VA = 0.8 V; VB = 1.15 V 20 24 30 VCC = 3 V to 3.6 V; VA = 1.7 V; VB = 1.35 V 20 24 30 VCC = 3 V to 3.6 V; VI = 1.25 V; II = ±10 mA 20 24 30 VCC = 3 V to 3.6 V; VI = 1.65 V 1 Ω MΩ NOTES: 1. All typical values are at VCC = 3.3 V, Tamb = 25°C 2. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On–state resistance is determined by the lowest voltage of the two (A or B) terminals. AC CHARACTERISTICS SYMBOL PARAMETER FROM (INPUT) TO (OUTPUT) A or B B or A tpd Propagation delay1 ten enable OE A or B tdis disable OE A or B VCC = +3.3 V ±0.3 V Min Max UNIT 750 ps 1 3 ns 1 3 ns NOTE: 1. The propagation delay is based on the RC time constant of the typical on–state resistance of the switch and a load capacitance, when driven by an ideal voltage source (zero output impedance); 24 Ω × 30 pF. SDRAM SDRAM SDRAM SDRAM CBT CBT CBT CBT CBT SDRAM SDRAM SDRAM SDRAM CBT SDRAM SDRAM SDRAM SDRAM CBT SDRAM SDRAM CBT SDRAM SDRAM SDRAM CBT SDRAM 184/200-pin DDR SDRAM DIMM BACK SIDE CBT3857 (9) FRONT SIDE SSTL16857 SSTL16857 PCK857 The PLL clock distribution device and SSTL registered drivers reduce signal loads on the memory controller and prevent timing delays and waveform distortions that would cause unreliable operation SW00393 1999 Sep 14 4 Philips Semiconductors Product specification 10-bit bus switch with 10 kΩ pull-down termination resistors CBT3857 AC WAVEFORMS TEST CIRCUIT AND WAVEFORMS VM = 1.5 V, VIN = GND to 3.0 V 4.3 V 2.75 V 1.375V 1.375V 500 Ω From Output Under Test Open GND INPUT 500 Ω CL = 30 pF 0V tPHL tPLH S1 Load Circuit VOH 1.25V 1.25V TEST OUTPUT VOL SA00513 Waveform 1. Input (An) to Output (Yn) Propagation Delays S1 tpd open tPLZ/tPZL 4.3 V tPHZ/tPZH GND DEFINITIONS Load capacitance includes jig and probe capacitance CL = VIH (AC) Output Control (Low-level enabling SA00515 VREF VREF tPLZ tPZL NOTES: 1. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. 2. The outputs are measured one at a time with one transition per measurement. VIL (AC) 3.5V Output Waveform 1 S1 at 4.3 V (see Note) 1.25 V VOL tPHZ tPZH Output Waveform 2 S1 at Open (see Note) * VOL + 0.15V VOH VOH – 0.15V 1.25 V 0V Note: Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. * VIH = 3.0V with 25Ω input line impedance SA00514 Waveform 2. 3-State Output Enable and Disable Times 1999 Sep 14 5 Philips Semiconductors Product specification 10-bit bus switch with 10 kΩ pull-down termination resistors CBT3857 TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm 1999 Sep 14 6 SOT355-1 Philips Semiconductors Product specification 10-bit bus switch with 10 kΩ pull-down termination resistors CBT3857 NOTES 1999 Sep 14 7 Philips Semiconductors Product specification 10-bit bus switch with 10 kΩ pull-down termination resistors CBT3857 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Date of release: 09-99 Document order number: 1999 Sep 14 8 9397-750 -06413