2-Phase Stepper-Motor Driver
TLE 4726
Bipolar IC
Overview
Features
• 2 × 0.75 A / 50 V outputs
• Integrated driver, control logic and
current control (chopper)
• Fast free-wheeling diodes
• Low standby-current drain
• Full, half, quarter, mini step
P-DSO-24-3
Type
Ordering Code
Package
TLE 4726 G
Q67006-A9297
P-DSO-24-3
Description
TLE 4726 is a bipolar, monolithic IC for driving bipolar stepper motors, DC motors and
other inductive loads that operate on constant current. The control logic and power
output stages for two bipolar windings are integrated on a single chip which permits
switched current control of motors with 0.75 A per phase at operating voltages up to
50 V.
The direction and value of current are programmed for each phase via separate control
inputs. A common oscillator generates the timing for the current control and turn-on with
phase offset of the two output stages. The two output stages in a full-bridge configuration
have integrated, fast free-wheeling diodes and are free of crossover current. The logic
is supplied either separately with 5 V or taken from the motor supply voltage by way of
a series resistor and an integrated Z-diode. The device can be driven directly by a
microprocessor with the possibility of all modes from full step through half step to mini
step.
Data Sheet
1
1999-09-15
TLE 4726
Ι10
Ι11
Phase 1
OSC
GND
GND
GND
GND
Q11
R1
+ VS
Q12
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Ι 20
Ι 21
Phase 2
Inhibit
GND
GND
GND
GND
Q21
R2
+VL
Q22
IEP00898
Figure 1
Data Sheet
Pin Configuration (top view)
2
1999-09-15
TLE 4726
Pin Definitions and Functions
Pin No.
Function
1, 2, 23, 24
Digital control inputs IX0, IX1 for the magnitude of the current of the
particular phase.
3
IX1
IX0
Phase
Current
Example of
Motor Status
H
H
0
No current
H
L
1/3 Imax
Hold
L
H
2/3 Imax
Set
L
L
Imax
Accelerate
typical Imax with
Rsense = 1 Ω: 750 mA
Input Phase 1; controls the current through phase winding 1. On
H-potential the phase current flows from Q11 to Q12, on L-potential in
the reverse direction.
5, 6, 7, 8, 17, Ground; all pins are connected internally.
18, 19, 20
4
Oscillator; works at approx. 25 kHz if this pin is wired to ground across
2.2 nF.
10
Resistor R1 for sensing the current in phase 1.
9, 12
Push-pull outputs Q11, Q12 for phase 1 with integrated free-wheeling
diodes.
11
Supply voltage; block to ground, as close as possible to the IC, with a
stable electrolytic capacitor of at least 10 µF in parallel with a ceramic
capacitor of 220 nF.
14
Logic supply voltage; either supply with 5 V or connect to + VS across
a series resistor. A Z-diode of approx. 7 V is integrated. In both cases
block to ground directly on the IC with a stable electrolytic capacitor of
10 µF in parallel with a ceramic capacitor of 100 nF.
13, 16
Push-pull outputs Q22, Q21 for phase 2 with integrated free-wheeling
diodes.
15
Resistor R2 for sensing the current in phase 2.
21
Inhibit input; the IC can be put on standby by low potential on this pin.
This reduces the current consumption substantially.
22
Input phase 2; controls the current flow through phase winding 2. On
H-potential the phase current flows from Q21 to Q22, on L potential in
the reverse direction.
Data Sheet
3
1999-09-15
TLE 4726
+ VL
14
4
+ VS
11
Oscillator
D11
D12
T11
Ι10
T12
Ι11
2
Phase 1
3
Inhibit
21
Phase 1
Functional
Logic
Phase 1
D14
T13
T14
Q12
R1
Inhibit
D21
Ι20
12
10
D22
T21
T22
16
Q21
24
Phase 2
D23
Ι21
23
Phase 2
22
Functional
Logic
Phase 2
T23
D24
T24
13
15
5-8, 17-19
GND
Data Sheet
Q11
1
D13
Figure 2
9
Q22
R2
IEB00899
Block Diagram
4
1999-09-15
TLE 4726
Absolute Maximum Ratings
TA = – 40 to 125 °C
Parameter
Supply voltage
Logic supply voltage
Z-current of VL
Output current
Ground current
Logic inputs
Symbol
VS
VL
IL
IQ
IGND
VIxx
Limit Values
Unit Remarks
min.
max.
0
52
V
–
0
6.5
V
Z-diode
–
50
mA
–
–1
1
A
–
–2
2
A
–
–6
VL +
V
IXX ; Phase 1, 2;
0.3
R1, R2, oscillator input voltage
Junction temperature
Storage temperature
VRX,
VOSC
Tj
Tj
Tstg
– 0.3
VL +
Inhibit
V
–
0.3
–
–
125
150
°C
°C
–
max. 10,000 h
– 50
125
°C
–
Note: Stresses above those listed here may cause permanent damage to the
device. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
Data Sheet
5
1999-09-15
TLE 4726
Operating Range
Parameter
Symbol
Limit Values
Unit Remarks
min.
max.
5
50
V
–
Logic supply voltage
VS
VL
4.5
6.5
V
without series
resistor
Case temperature
TC
– 25
110
°C
measured on
pin 5
Pdiss = 2 W
Output current
IQ
VIXX
– 800
800
mA
–
–5
VL
V
IXX ; Phase 1, 2;
Supply voltage
Logic inputs
Inhibit
Thermal Resistances
Junction ambient
Junction ambient (soldered on a
35 µm thick
20 cm2 PC boar
copper area)
Junction case
Rth ja
Rth ja
–
–
75
50
K/W P-DSO-24-3
K/W P-DSO-24-3
Rth jc
–
15
K/W measured on
pin 5
P-DSO-24-3
Note: In the operating range, the functions given in the circuit description are fulfilled.
Characteristics
VS = 40 V; VL = 5 V; – 25 °C ≤ Tj ≤ 125 °C
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit Test Condition
Current Consumption
from + VS
from + VS
IS
IS
–
–
0.2
16
0.5
20
mA
mA
from + VL
from + VL
IL
IL
–
–
1.7
18
3
25
mA
mA
Data Sheet
6
Vinh = L
Vinh = H
IQ1/2 = 0, IXX = L
Vinh = L
Vinh = H
IQ1/2 = 0, IXX = L
1999-09-15
TLE 4726
Characteristics (cont’d)
VS = 40 V; VL = 5 V; – 25 °C ≤ Tj ≤ 125 °C
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
IOSC
–
110
–
µA
–
VOSCL
VOSCH
fOSC
–
–
18
1.3
2.3
25
–
–
40
V
V
kHz
–
–
Vsense n
Vsense h
Vsense s
Vsense a
–
200
420
700
0
250
540
825
–
300
680
950
mV
mV
mV
mV
IX0 = H; IX1 = H
IX0 = L; IX1 = H
IX0 = H; IX1 = L
IX0 = L; IX1 = L
Threshold
VI
–
–
IIL
IIL
IIH
–
–
–
2.3
(L→H)
–
–
10
V
L-input current
L-input current
H-input current
1.4
(H→L)
– 10
– 100
–
µA
µA
µA
VI = 1.4 V
VI = 0 V
VI = 5 V
2
3
4
V
–
1.7
2.3
2.9
V
–
VInhhy
0.3
0.7
1.1
V
–
VLZ
6.5
7.4
8.2
V
IL = 50 mA
Oscillator
Output charging
current
Charging threshold
Discharging threshold
Frequency
COSC = 2.2 nF
Phase Current Selection
Current Limit Threshold
No current
Hold
Setpoint
Accelerate
Logic Inputs
(IX1 ; IX0 ; Phase x)
Standby Cutout (inhibit)
Threshold
VInh
(L→H)
Threshold
VInh
(H→L)
Hysteresis
Internal Z-Diode
Z-voltage
Data Sheet
7
1999-09-15
TLE 4726
Characteristics (cont’d)
VS = 40 V; VL = 5 V; – 25 °C ≤ Tj ≤ 125 °C
Parameter
Symbol
Limit Values
min.
Unit Test Condition
typ.
max.
0.3
0.5
–
0.9
1
0.6
1
300
1.3
1.4
V
V
µA
V
V
IQ = – 0.5 A
IQ = – 0.75 A
VQ = 40 V
IQ = 0.5 A
IQ = 0.75 A
IQ = 0.5 A;
charge
IQ = 0.5 A;
discharge
IQ = 0.75 A;
charge
IQ = 0.75 A;
discharge
VQ = 0 V
IQ = – 0.5 A
IQ = – 0.75 A
IF = – 0.75 A
Power Outputs
Diode Transistor Sink Pair
(D13, T13; D14, T14; D23, T23; D24, T24)
Saturation voltage
Saturation voltage
Reverse current
Forward voltage
Forward voltage
Vsatl
Vsatl
IRl
VFl
VFl
–
–
–
–
–
Diode Transistor Source Pair
(D11, T11; D12, T12; D21, T21; D22, T22)
Saturation voltage
VsatuC
–
0.9
1.2
V
Saturation voltage
VsatuD
–
0.3
0.7
V
Saturation voltage
VsatuC
–
1.1
1.4
V
Saturation voltage
VsatuD
–
0.5
1
V
Reverse current
Forward voltage
Forward voltage
Diode leakage current
IRu
VFu
VFu
ISL
–
–
–
–
–
1
1.1
1
300
1.3
1.4
2
µA
V
V
mA
Note: The listed characteristics are ensured over the operating range of the integrated
circuit. Typical characteristics specify mean values expected over the production
spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and
the given supply voltage.
Data Sheet
8
1999-09-15
TLE 4726
Quiescent Current IS, IL versus
Supply Voltage VS
Quiescent Current IS, IL versus
Junction Temperature Tj
IED01655
40
IED01656
40
mA
mA
Ι S, Ι L
Ι S, Ι L
T j = 25 C
30
V S = 40V
30
Ι XX = L
ΙL
20
Ι XX = H
ΙL
20
ΙL
Ι XX = L
ΙL
10
10
Ι XX = H
ΙS
ΙS
0
0
10
20
30
V
VS
0
50
-25
0
25
50
75 100 C 150
Tj
Output Current IQX versus
Junction Temperature Tj
Ι QX
Operating Condition:
IED01657
800
VL
VInh
COSC
Rsense
= 5V
= H
= 2.2 nF
= 1Ω
Load: L = 10 mH
R = 2.4 Ω
fphase = 50 Hz
mode: fullstep
mA
600
400
200
0
-25
Data Sheet
0
25 50
75 100 C 150
Tj
9
1999-09-15
TLE 4726
Output Saturation Voltages Vsat
versus Output Current IQ
Forward Current IF of Free-Wheeling
Diodes versus Forward Voltages VF
ΙF
IED01167
1.0
A
V Fl
V Fu
0.8
T j = 25 C
0.6
0.4
0.2
0
0
0.5
1.0
V
1.5
VF
Typical Power Dissipation Ptot versus
Output Current IQ (Non Stepping)
Permissible Power Dissipation Ptot
versus Case Temperature TC
IED01660
12
Measured
at pin 5.
W
Ptot
10
P-DSO-24
8
6
P-DIP-20
4
2
0
-25
Data Sheet
10
0
25 50 75 100 125 C 175
Tc
1999-09-15
TLE 4726
Input Characteristics of Ixx, Phase X,
Inhibit
Input Current of Inhibit versus Junction
Temperature Tj
IED01661
0.8
mA
Ι IXX 0.6
V L = 5V
0.4
0.2
0
0.2
0.4
0.6
0.8
-6
-5
-2
3.9
2
V
6
V IXX
Oscillator Frequency fOSC versus
Junction Temperature Tj
30
kHz
f OSC
IED01663
V S = 40V
V L = 5V
COSZ = 2.2nF
25
20
15
-25 0
Data Sheet
25 50 75 100 125 C 150
Tj
11
1999-09-15
TLE 4726
100 µF
220 nF
Ι ΙL
Ι ΙH
1
Ι10
2
Ι11
3
21
VΙ L
VΙ H
ΙS
14
11
VL
23
Ι 21
VS
Q11
Q12
Inhibit
Ι 20
100 µF
220 nF
VS
Phase 1
24
22
ΙL
TLE 4726
Q21
Q22
Phase 2
OSC
4
15
Ι OSC VOSC
2.2 nF
ΙQ
- Ι Fu
12
R1
1Ω
VSatu
- VFu
-ΙR
Ι Ru
VSatl
16
13
- VFl
GND
5, 6, 7, 8
17, 18, 19, 20
10
R2
1Ω
VSense
9
VSense
Ι GND
AES02301
Figure 3
Test Circuit
+5 V
+40 V
100 µ F
220 nF
1
2
3
Micro
Controller
21
24
23
22
Ι10
14
VL
11
VS
Q11
Ι11
Phase 1
Inhibit
Q12
TLE 4726
Q21
Ι 20
Ι 21
Phase 2
OSC
4
2.2 nF
100 µ F
220 nF
Q22
15
R2
1Ω
10
R1
1Ω
9
12
16
13
M
GND
5, 6, 7, 8
17, 18, 19, 20
AES02302
Figure 4
Data Sheet
Application Circuit
12
1999-09-15
TLE 4726
Normal Mode
Accelerate Mode
H
Ι 10
L
t
H
Ι 11
L
t
H
Phase 1
L
t
i acc
i set
Ι Q1
t
i set
i acc
i acc
i set
Ι Q2
t
i set
i acc
Phase 2
Ι 20
Ι 21
t
H
L
t
H
L
t
H
L
IED01666
Figure 5
Data Sheet
Full-Step Operation
13
1999-09-15
TLE 4726
Normal Mode
Accelerate Mode
H
L
Ι 10
Ι 11
H
L
Phase 1
H
L
t
t
t
i acc
i set
Ι Q1
t
- i set
- i acc
i acc
i set
Ι Q2
t
- i set
- i acc
Phase 2
Ι 20
Ι 21
H
L
t
H
L
t
H
L
t
IED01667
Figure 6
Data Sheet
Half-Step Operation
14
1999-09-15
TLE 4726
Figure 7
Data Sheet
Quarter-Step Operation
15
1999-09-15
TLE 4726
H
Ι 10
L
t
H
Ι 11
L
t
H
Phase 1
L
t
i acc
i set
i hold
Ι Q1
t
i hold
i set
i acc
i acc
i set
i hold
Ι Q2
t
i hold
i set
i acc
Phase 2
Ι 20
Ι 21
H
L
t
H
L
t
H
L
t
IED01665
Figure 8
Data Sheet
Mini-Step Operation
16
1999-09-15
TLE 4726
V Osc
2.4 V
1.4 V
0
T
t
Ι GND
0
t
V Q12
+ VS
V FU
V sat 1
0
t
V Q11
V satu D
+ VS
V satu C
t
V Q22
+ VS
0
t
V Q21
+ VS
t
Operating conditions:
VS
VL
L phase x
R phase x
V phase x
V Inhibit
V xx
Figure 9
Data Sheet
= 40 V
=5V
= 10 mH
= 20 Ω
=H
=H
=L
IED01177
Current Control
17
1999-09-15
TLE 4726
Inhibit
L
V Osc
t
2.3 V
1.3 V
0
Oscillator
High Imped.
Oscillator
High Imped.
t
Phase Changeover
Phase 1
L
Ι GND
t
ΙN
0
t
V Fu
V Q11
Vsatu C
Vsatu D
+V S
High
Impedance
High
Impedance
V Fl
V satl
t
V Q12
+V S
High
Impedance
t
Ι Phase 1
Slow Current Decay
Operating Conditions:
= 40 V
VS
=5V
VΙ
L phase 1 = 10 mH
R phase 1 = 20 Ω
Ι 1X
= L; Ι 1X = H
t
Fast Current Decay
Slow
Current Decay
Fast
Current
Decay by
Inhibit
IED01178
Figure 10 Phase Reversal and Inhibit
Data Sheet
18
1999-09-15
TLE 4726
Calculation of Power Dissipation
The total power dissipation Ptot is made up of
saturation losses Psat (transistor saturation voltage and diode forward voltages),
quiescent losses Pq
(quiescent current times supply voltage) and
switching losses Ps
(turn-ON / turn-OFF operations).
The following equations give the power dissipation for chopper operation without phase
reversal. This is the worst case, because full current flows for the entire time and
switching losses occur in addition.
Ptot = 2 × Psat + Pq + 2 × Ps
where
Psat ≅ IN { Vsatl × d + VFu (1 – d ) + VsatuC × d + VsatuD (1 – d ) }
Pq = Iq × VS + IL × VL
V S i D × t DON i D + i R × t ON I N
- + ------------------------------ + ----- t DOFF + t OFF
P S ≅ ------ --------------------T
2
2
4
IN
Iq
iD
iR
tp
tON
tOFF
tDON
tDOFF
T
d
Vsatl
VsatuC
VsatuD
VFu
VS
VL
IL
= nominal current (mean value)
= quiescent current
= reverse current during turn-on delay
= peak reverse current
= conducting time of chopper transistor
= turn-ON time
= turn-OFF time
= turn-ON delay
= turn-OFF delay
= cycle duration
= duty cycle tp/T
= saturation voltage of sink transistor (T3, T4)
= saturation voltage of source transistor (T1, T2) during charge cycle
= saturation voltage of source transistor (T1, T2) during discharge cycle
= forward voltage of free-wheeling diode (D1, D2)
= supply voltage
= logic supply voltage
= current from logic supply
Data Sheet
19
1999-09-15
TLE 4726
+V S
Tx1
Dx1
Dx2
Tx2
L
Tx3
Dx3
Dx4
Tx4
V sense
R sense
IES01179
Figure 11
Voltage and
Current at
Chopper
Transistor
Turn-ON
Turn-OFF
iR
ΙN
iD
VS + VFu
VS + VFu
Vsatl
t D ON
t D OFF
t ON
tp
t OFF
t
IET01210
Figure 12
Data Sheet
20
1999-09-15
TLE 4726
Application Hints
The TLE 4726 is intended to drive both phases of a stepper motor. Special care has
been taken to provide high efficiency, robustness and to minimize external components.
Power Supply
The TLE 4726 will work with supply voltages ranging from 5 V to 50 V at pin VS. As the
circuit operates with chopper regulation of the current, interference generation problems
can arise in some applications. Therefore the power supply should be decoupled by a
0.22 µF ceramic capacitor located near the package. Unstabilized supplies may even
afford higher capacities.
Current Sensing
The current in the windings of the stepper motor is sensed by the voltage drop across R1
and R2. Depending on the selected current internal comparators will turn off the sink
transistor as soon as the voltage drop reaches certain thresholds (typical 0 V, 0.25 V,
0.5 V and 0.75 V); (R1 , R2 = 1 Ω). These thresholds are neither affected by variations
of VL nor by variations of VS .
Due to chopper control fast current rises (up to 10 A/µs) will occur at the sensing
resistors R1 and R2 . To prevent malfunction of the current sensing mechanism R1 and
R2 should be pure ohmic. The resistors should be wired to GND as directly as possible.
Capacitive loads such as long cables (with high wire to wire capacity) to the motor should
be avoided for the same reason.
Synchronizing Several Choppers
In some applications synchrone chopping of several stepper motor drivers may be
desireable to reduce acoustic interference. This can be done by forcing the oscillator of
the TLE 4726 by a pulse generator overdriving the oscillator loading currents
(approximately ± 100 µA). In these applications low level should be between 0 V and 1 V
while high level should be between 2.6 V and VL .
Optimizing Noise Immunity
Unused inputs should always be wired to proper voltage levels in order to obtain highest
possible noise immunity.
To prevent crossconduction of the output stages the TLE 4726 uses a special break
before make timing of the power transistors. This timing circuit can be triggered by short
glitches (some hundred nanoseconds) at the Phase inputs causing the output stage to
become high resistive during some microseconds. This will lead to a fast current decay
during that time. To achieve maximum current accuracy such glitches at the Phase
inputs should be avoided by proper control signals.
Data Sheet
21
1999-09-15
TLE 4726
Thermal Shut Down
To protect the circuit against thermal destruction, thermal shut down has been
implemented. To provide a warning in critical applications, the current of the sensing
element is wired to input Inhibit. Before thermal shut down occurs Inhibit will start to pull
down by some hundred microamperes. This current can be sensed to build a
temperature prealarm.
Data Sheet
22
1999-09-15
TLE 4726
Package Outlines
+0.09
7.6 -0.2 1)
8˚ ma
x
0.35 x 45˚
0.23
2.65 max
2.45 -0.2
0.2 -0.1
P-DSO-24-3
(Plastic Dual Small Outline Package)
0.4 +0.8
1.27
0.35 +0.15 2)
0.2 24x
24
1
0.1
10.3 ±0.3
13
15.6 -0.4 1)
12
Index Marking
1) Does not include plastic or metal protrusions of 0.15 max rer side
2) Does not include dambar protrusion of 0.05 max per side
GPS05144
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Dimensions in mm
SMD = Surface Mounted Device
Data Sheet
23
1999-09-15