74AHC1G08; 74AHCT1G08 2-input AND gate Product data sheet 1. General description 74AHC1G08 and 74AHCT1G08 are high-speed Si-gate CMOS devices. They provide a 2-input AND function. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. 2. Features n n n n n n Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays SOT353-1 and SOT753 package options ESD protection: u HBM JESD22-A114E: exceeds 2000 V u MM JESD22-A115-A: exceeds 200 V u CDM JESD22-C101C: exceeds 1000 V n Specified from −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number 74AHC1G08GW Package Temperature range Name Description Version −40 °C to +125 °C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 −40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753 74AHCT1G08GW 74AHC1G08GV 74AHCT1G08GV 74AHC1G08; 74AHCT1G08 NXP Semiconductors 2-input AND gate 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level Inputs Output A B Y L L L L H L H L L H H H 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Min Max Unit VCC supply voltage Conditions −0.5 +7.0 V VI input voltage −0.5 +7.0 V IIK input clamping current VI < −0.5 V −20 - mA IOK output clamping current VO < −0.5 V or VO > VCC + 0.5 V IO output current −0.5 V < VO < VCC + 0.5 V - ±20 mA - ±25 mA ICC supply current - 75 mA IGND ground current −75 - mA Tstg storage temperature −65 +150 °C Ptot total power dissipation - 250 mW [1] Tamb = −40 °C to +125 °C [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For both TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature ∆t/∆V input transition rise and fall rate 74AHC_AHCT1G08_6 Product data sheet Conditions 74AHC1G08 74AHCT1G08 Unit Min Typ Max Min Typ Max 2.0 5.0 5.5 4.5 5.0 5.5 V 0 - 5.5 0 - 5.5 V 0 - VCC 0 - VCC V −40 +25 +125 −40 +25 +125 °C VCC = 3.3 V ± 0.3 V - - 100 - - - ns/V VCC = 5.0 V ± 0.5 V - - 20 - - 20 ns/V © NXP B.V. 2007. All rights reserved. 3 of 11 74AHC1G08; 74AHCT1G08 NXP Semiconductors 2-input AND gate 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V For type 74AHC1G08 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V HIGH-level VI = VIH or VIL output voltage IO = −50 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = −50 µA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = −50 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = −4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = −8.0 mA; VCC = 4.5 V 3.94 - - 3.8 - 3.70 - V LOW-level VI = VIH or VIL output voltage IO = 50 µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 µA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 µA II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 µA CI input capacitance - 1.5 10 - 10 - 10 pF For type 74AHCT1G08 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = −50 µA 4.4 4.5 - 4.4 - 4.4 - V 3.94 - - 3.8 - 3.70 - V - 0 0.1 - 0.1 - 0.1 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 µA IO = −8.0 mA VOL LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 µA IO = 8.0 mA II input leakage current 74AHC_AHCT1G08_6 Product data sheet VI = 5.5 V or GND; VCC = 0 V to 5.5 V © NXP B.V. 2007. All rights reserved. 4 of 11 74AHC1G08; 74AHCT1G08 NXP Semiconductors 2-input AND gate Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 µA ∆ICC additional per input pin; VI = 3.4 V; supply current other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance - 1.5 10 - 10 - 10 pF 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; tr = tf = ≤ 3.0 ns. For test circuit see Figure 6. Symbol Parameter 25 °C Conditions Min Typ CL = 15 pF - CL = 50 pF - −40 °C to +85 °C −40 °C to +125 °C Unit Max Min Max Min Max 4.6 8.8 1.0 10.5 1.0 12.0 ns 6.5 12.3 1.0 14.0 1.0 16.0 ns - 3.2 5.9 1.0 7.0 1.0 8.0 ns For type 74AHC1G08 tpd propagation delay A and B to Y; see Figure 5 VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V [1] [2] [3] CL = 15 pF CL = 50 pF CPD power dissipation capacitance - 4.6 7.9 1.0 9.0 1.0 10.5 ns - 17 - - - - - pF CL = 15 pF - 3.6 6.2 1.0 7.1 1.0 8.0 ns CL = 50 pF - 5.1 7.9 1.0 9.0 1.0 10.5 ns - 19 - - - - - pF per buffer; CL = 50 pF; f = 1 MHz; VI = GND to VCC [4] A and B to Y; see Figure 5 [1] For type 74AHCT1G08 tpd propagation delay VCC = 4.5 V to 5.5 V CPD [1] power dissipation capacitance per buffer; CL = 50 pF; f = 1 MHz; VI = GND to VCC [3] [4] tpd is the same as tPLH and tPHL. [2] Typical values are measured at VCC = 3.3 V. [3] Typical values are measured at VCC = 5.0 V. [4] CPD is used to determine the dynamic power dissipation PD (µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts 74AHC_AHCT1G08_6 Product data sheet © NXP B.V. 2007. All rights reserved. 5 of 11 74AHC1G08; 74AHCT1G08 NXP Semiconductors 2-input AND gate 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.425 0.46 0.21 0.3 0.1 0.1 0.60 0.15 7° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT353-1 REFERENCES IEC JEDEC JEITA MO-203 SC-88A EUROPEAN PROJECTION Fig 7. Package outline SOT353-1 (TSSOP5) 74AHC_AHCT1G08_6 Product data sheet © NXP B.V. 2007. All rights reserved. 7 of 11 74AHC1G08; 74AHCT1G08 NXP Semiconductors 2-input AND gate Plastic surface-mounted package; 5 leads SOT753 D E B y A X HE 5 v M A 4 Q A A1 c 1 2 3 Lp detail X bp e w M B 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.100 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT753 JEITA EUROPEAN PROJECTION SC-74A Fig 8. Package outline SOT753 (SC-74A) 74AHC_AHCT1G08_6 Product data sheet © NXP B.V. 2007. All rights reserved. 8 of 11