INTEGRATED CIRCUITS 74LVT534 3.3V Octal D-type flip-flop; inverting (3-State) Product specification Supersedes data of 1996 Aug 13 IC23 Data Handbook 1998 Feb 19 Philips Semiconductors Product specification 3.3V Octal D-type flip-flop, inverting (3-State) FEATURES 74LVT534 DESCRIPTION • 3-State outputs for bus interfacing • Common output enable • TTL input and output switching levels • Input and output interface capability to systems at 5V supply • Bus-hold data inputs eliminate the need for external pull-up The LVT534 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is an 8-bit, edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the clock (CP) and Output Enable (OE) control gates. The state of each D input (one set-up time before the Low-to-High clock transition) is transferred to the corresponding flip-flop’s Q output. resistors to hold unused inputs • Live insertion/extraction permitted • No bus current loading when output is tied to 5V bus • Power-up 3-State • Power-up reset • Latch-up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the clock operation. When OE is Low, the stored data appears at the outputs. When OE is High, the outputs are in the High-impedance “off” state, which means they will neither drive nor load the bus. and 200V per Machine Model QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 3.0 3.5 ns tPLH tPHL Propagation delay CP to Qn CL = 50pF; VCC = 3.3V CIN Input capacitance VI = 0V or 3.0V 4 pF COUT Output capacitance Outputs disabled; VI/O = 0V or 3.0V 7 pF ICCZ Total supply current Outputs disabled; VCC = 3.6V 0.13 mA ORDERING INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 20-Pin Plastic SOL PACKAGES –40°C to +85°C 74LVT534 D 74LVT534 D SOT163-1 20-Pin Plastic SSOP Type II –40°C to +85°C 74LVT534 DB 74LVT534 DB SOT339-1 20-Pin Plastic TSSOP Type I –40°C to +85°C 74LVT534 PW 74LVT534PW DH SOT360-1 PIN CONFIGURATION LOGIC SYMBOL OE 1 20 VCC Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 9 12 Q4 Q3 GND 10 4 7 8 13 14 17 18 D0 D1 D2 D3 D4 D5 D6 D7 11 CP 1 OE Q0 Q1 Q2 Q3 2 5 6 9 Q4 Q5 Q6 Q7 12 15 16 19 11 CP SA00162 SA00161 1998 Feb 19 3 2 853-1855 18988 Philips Semiconductors Product specification 3.3V Octal D-type flip-flop, inverting (3-State) LOGIC SYMBOL (IEEE/IEC) 1 74LVT534 PIN DESCRIPTION PIN NUMBER SYMBOL 1 OE 3, 4, 7, 8, 13, 14, 17, 18 D0-D7 Data inputs 2, 5, 6, 9, 12, 15, 16, 19 Q0-Q7 Inverting 3-State outputs EN FUNCTION Output enable input (active-Low) 11 C1 3 2 1D 4 5 7 6 11 CP 8 9 10 GND Ground (0V) 13 12 20 VCC Positive supply voltage 14 15 17 16 18 19 Clock pulse input (active rising edge) SA00163 FUNCTION TABLE INPUTS INTERNAL OUTPUTS OE CP Dn REGISTER Q0 – Q7 L L ↑ ↑ l h L H H L L ↑ X NC NC H H ↑ ↑ X Dn NC Dn Z Z H = High voltage level h = High voltage level one set-up time prior to the Low-to-High clock transition L = Low voltage level l = Low voltage level one set-up time prior to the Low-to-High clock transition NC= No change X = Don’t care Z = High impedance “off” state ↑ = Low-to-High clock transition ↑ = not a Low-to-High clock transition OPERATING MODE Latch and read register Hold Disable outputs LOGIC DIAGRAM D0 D1 D2 D3 D4 D5 D6 D7 2 3 4 5 6 7 8 9 D D D D D D D D CP Q CP Q CP Q CP Q CP Q CP Q CP Q CP Q 11 CP 1 OE 19 Q0 18 Q1 17 16 Q2 Q3 15 Q4 14 Q5 13 Q6 12 Q7 SV00168 1998 Feb 19 3 Philips Semiconductors Product specification 3.3V Octal D-type flip-flop, inverting (3-State) 74LVT534 ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC IIK CONDITIONS RATING UNIT –0.5 to +4.6 V –50 mA –0.5 to +7.0 V VO < 0 –50 mA Output in Off or High state –0.5 to +7.0 V Output in Low state 128 Output in High state –64 DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT O DC output current Tstg Storage temperature range mA –65 to 150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC LIMITS PARAMETER DC supply voltage UNIT MIN MAX 2.7 3.6 V 0 5.5 V VI Input voltage VIH High-level input voltage VIL Input voltage 0.8 V IOH High-level output current –32 mA Low-level output current 32 Low-level output current; current duty cycle ≤ 50%, f ≥ 1kHz 64 ∆t/∆v Input transition rise or fall rate; outputs enabled 10 ns/V Tamb Operating free-air temperature range +85 °C IOL 1998 Feb 19 2.0 –40 4 V mA Philips Semiconductors Product specification 3.3V Octal D-type flip-flop, inverting (3-State) 74LVT534 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL VIK PARAMETER Input clamp voltage TEST CONDITIONS Temp = -40°C to +85°C MIN TYP1 MAX –0.9 –1.2 VCC-0.2 VCC-0.1 VCC = 2.7V; IOH = –8mA 2.4 2.5 VCC = 3.0V; IOH = –32mA 2.0 2.2 VCC = 2.7V; IIK = –18mA VCC = 2.7 to 3.6V; IOH = –100µA VOH VOL VRST High-level output voltage Low-level output voltage Power-up output low voltage5 II Input In ut leakage current 0.1 0.2 VCC = 2.7V; IOL = 24mA 0.3 0.5 VCC = 3.0V; IOL = 16mA 0.25 0.4 VCC = 3.0V; IOL = 32mA 0.3 0.5 VCC = 3.0V; IOL = 64mA 0.4 0.55 VCC = 3.6V; IO = 1mA; VI = GND or VCC 0.13 0.55 1 10 ±0.1 ±1 0.1 1 –1 -5 1 ±100 VCC = 3.6V; VI = VCC or GND Control pins VCC = 3.6V; VI = VCC Data pins ins4 VCC = 3.6V; VI = 0 IOFF Output off current VCC = 0V; VI or VO = 0 to 4.5V VCC = 3V; VI = 0.8V IHOLD Bus Hold current A inputs7 75 150 VCC = 3V; VI = 2.0V –75 –150 VCC = 0V to 3.6V; VCC = 3.6V ±500 V V VCC = 2.7V; IOL = 100µA VCC = 0 or 3.6V; VI = 5.5V UNIT V V µA µA µA Current into an output in the High state when VO > VCC VO = 5.5V; VCC = 3.0V 60 125 µA Power up/down 3-State output current3 VCC ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don’t care 1 ±100 µA IOZH 3-State output High current VCC= 3.6V; VO = 3V; VI = VIL or VIH 1 5 µA IOZL 3-State output Low current VCC= 3.6V; VO = 0.5V; VI = VIL or VIH 1 –5 µA 0.13 0.19 IEX IPU/PD ICCH ICCL VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 Quiescent supply current3 ICCZ ∆ICC Additional supply current per input pin2 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 3 12 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = 06 0.13 0.19 VCC = 3V to 3.6V; One input at VCC -0.6V, Other inputs at VCC or GND 0.1 0.2 mA mA NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ± 0.3V a transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C only. 4. Unused pins at VCC or GND. 5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 6. ICCZ is measured with outputs pulled to VCC or down to GND. 7. This is the bus hold overdrive current required to force the input to the opposite logic state. AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER VCC = 3.3V ± 0.3V WAVEFORM MIN TYP1 VCC = 2.7V MAX MIN UNIT MAX fMAX Maximum clock frequency 1 100 150 tPLH tPHL Propagation delay CP to Qn 1 1.7 2.2 3.0 3.5 4.6 4.9 5.4 5.2 ns tPZH tPZL Output enable time to High and Low level 3 4 1.7 1.7 3.2 3.3 5.4 5.5 7.0 5.6 ns tPHZ Output disable time 3 tPLZ from High and Low level 4 NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 2.1 2.1 3.5 3.4 3.0 4.8 5.3 4.6 ns 1998 Feb 19 5 100 ns Philips Semiconductors Product specification 3.3V Octal D-type flip-flop, inverting (3-State) 74LVT534 AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER VCC = 3.3V ± 0.3V WAVEFORM VCC = 2.7V MIN TYP MIN UNIT tS(H) tS(L) Setup time, High or Low, Dn to CP 2 2.0 2.6 1.0 1.3 2.0 3.2 ns TH(H) TH(L) Hold time, High or Low, Dn to CP 2 0 0 –1.3 –0.9 0 0 ns TW(H) TW(L) CP pulse width High or Low 1 1.5 4.2 0.8 3.0 1.5 5.0 ns AC WAVEFORMS VM = 1.5V, VIN = GND to 2.7V 1/fMAX 2.7V 2.7V CP 1.5V 1.5V OE 1.5V tPZH tw(L) tPHZ VOH tPLH 1.5V Qn 1.5V 0V 0V tw(H) tPHL 1.5V VOH Qn VOH –0.3V 1.5V 1.5V 0V VOL SV00044 SV00119 Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency ÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉ 2.7V Dn 1.5V 1.5V 1.5V 1.5V 2.7V OE 0V ts(H) th(H) ts(L) CP 0V tPZL tPLZ 3V 1.5V Qn 0V 1.5V VOL +0.3V VOL NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. SV00120 SV00108 Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level Waveform 2. Data Setup and Hold Times 1998 Feb 19 1.5V th(L) 2.7V 1.5V 1.5V 6 Philips Semiconductors Product specification 3.3V Octal D-type flip-flop, inverting (3-State) 74LVT534 TEST CIRCUIT AND WAVEFORM 6.0V VCC Open VIN VOUT PULSE GENERATOR RL GND tW 90% NEGATIVE PULSE 90% VM VM 10% 10% D.U.T. RT 0V CL tTHL (tF) RL tTLH (tR) tTLH (tR) tTHL (tF) 90% Test Circuit for 3-State Outputs POSITIVE PULSE AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLH/tPHL Open tPLZ/tPZL 6V tPHZ/tPZH GND AMP (V) 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. 74LVT Amplitude Rep. Rate 2.7V 10MHz tW tR tF 500ns 2.5ns 2.5ns RT = Termination resistance should be equal to ZOUT of pulse generators. SV00092 1998 Feb 19 7 Philips Semiconductors Product specification 3.3V Octal D-type flip-flop; inverting (3-State) SO20: plastic small outline package; 20 leads; body width 7.5 mm 1998 Feb 19 8 74LVT534 SOT163-1 Philips Semiconductors Product specification 3.3V Octal D-type flip-flop; inverting (3-State) SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm 1998 Feb 19 9 74LVT534 SOT339-1 Philips Semiconductors Product specification 3.3V Octal D-type flip-flop; inverting (3-State) TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm 1998 Feb 19 10 74LVT534 SOT360-1 Philips Semiconductors Product specification 3.3V Octal D-type flip-flop; inverting (3-State) NOTES 1998 Feb 19 11 74LVT534 Philips Semiconductors Product specification 3.3V Octal D-type flip-flop, inverting (3-State) 74LVT534 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. 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