PHILIPS HEF4047BF

INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
• The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4047B
MSI
Monostable/astable multivibrator
Product specification
File under Integrated Circuits, IC04
January 1995
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
DESCRIPTION
The HEF4047B consists of a gatable astable multivibrator
with logic techniques incorporated to permit positive or
negative edge-triggered monostable multivibrator action
with retriggering and external counting options.
Inputs include + TRIGGER, − TRIGGER, ASTABLE,
ASTABLE, RETRIGGER and MR (Master Reset).
Buffered outputs are O, O and OSCILLATOR OUTPUT. In
all modes of operation an external capacitor (Ct) must be
connected between CTC and RCTC, and an external
resistor (Rt) must be connected between RTC and
RCTC (continued on next page).
Fig.1 Functional diagram.
FAMILY DATA, IDD LIMITS category MSI
See Family Specifications
January 1995
2
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
An external count down option can be implemented by
coupling O to an external ‘N’ counter and resetting the
counter with the trigger pulse. The counter output pulse is
fed back to the ASTABLE input and has a duration equal
to N times the period of the multivibrator. A HIGH level on
the MR input assures no output pulse during an ON-power
condition. This input can also be activated to terminate the
output pulse at any time. In the monostable mode, a HIGH
level or power-ON reset pulse must be applied to MR,
whenever VDD is applied.
Astable operation is enabled by a HIGH level on the
ASTABLE input. The period of the square wave at O and
O outputs is a function of the external components
employed. ‘True’ input pulses on the ASTABLE or
‘complement’ pulses on the ASTABLE input, allow the
circuit to be used as a gatable multivibrator. The
OSCILLATOR OUTPUT period will be half of the O output
in the astable mode. However, a 50% duty factor is not
guaranteed at this output.
In the monostable mode, positive edge-triggering is
accomplished by applying a leading-edge pulse to the
+ TRIGGER input and a LOW level to the − TRIGGER
input. For negative edge-triggering, a trailing-edge pulse is
applied to the − TRIGGER and a HIGH level to the
+ TRIGGER. Input pulses may be of any duration relative
to the output pulse. The multivibrator can be retriggered
(on the leading-edge only) by applying a common pulse to
both the RETRIGGER and + TRIGGER inputs. In this
mode the output pulse remains HIGH as long as the input
pulse period is shorter than the period determined by the
RC components.
HEF4047BP(N):
14-lead DIL; plastic
(SOT27-1)
HEF4047BD(F):
14-lead DIL; ceramic (cerdip)
HEF4047BT(D):
14-lead SO; plastic
(SOT73)
(SOT108-1)
( ): Package Designator North America
Fig.2 Pinning diagram.
January 1995
3
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Philips Semiconductors
Monostable/astable multivibrator
January 1995
4
Product specification
Fig.3 Logic diagram.
HEF4047B
MSI
(1) Special input protection that allows operating input voltages
outside the supply voltage lines. Compared to the standard input
protection pin 3 is more sensitive to static discharge; extra
handling precautions are recommended.
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
FUNCTIONAL CONNECTIONS
PINS CONNECTED TO
FUNCTION
VDD
VSS
OUTPUT
PULSE
INPUT
FROM
PULSE
PINS
OUTPUT
PERIOD
OR
PULSE WIDTH
astable multivibrator
free running
4, 5, 6, 14
7, 8, 9, 12
−
10, 11, 13
at pins 10, 11:
true gating
4, 6, 14
7, 8, 9, 12
5
10, 11, 13
complement gating
6, 14
5, 7, 8, 9, 12
4
10, 11, 13
tA = 4,40 RtCt
at pin 13:
tA = 2,20 RtCt
pos. edge-triggering
4, 14
5, 6, 7, 9, 12
8
10, 11
neg. edge-triggering
4, 8, 14
5, 7, 9, 12
6
10, 11
at pins 10, 11:
retriggerable
4, 14
5, 6, 7, 9
8, 12
10, 11
tM = 2,48 RtCt
14
5, 6, 7, 8, 9, 12
−
10, 11
monostable multivibrator
external count
down(1)
Notes
1. Input pulse to RESET of external counting chip; external counting chip output to pin 4.
2. In all cases, external resistor between pins 2 and 3, external capacitor between pins 1 and 3.
DC CHARACTERISTICS
VSS = 0 V; inputs at VSS or VDD
Tamb (°C)
VDD
V
SYMBOL
−40
+ 25
+ 85
MAX.
MIN.
MAX.
MAX.
0,3
−
0,3
1
Leakage current
pin 3; output
15
I3
transistor OFF
January 1995
5
µA
pin 3 at
VDD or VSS
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL MIN. TYP. MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
ASTABLE, ASTABLE → OSC. OUTPUT
HIGH to LOW
95
190
68 ns + (0,55 ns/pF) CL
45
90
43 ns + (0,23 ns/pF) CL
30
60
22 ns + (0,16 ns/pF) CL
85
170
58 ns + (0,55 ns/pF) CL
40
80
29 ns + (0,23 ns/pF) CL
30
60
22 ns + (0,16 ns/pF) CL
150
300
123 ns + (0,55 ns/pF) CL
65
130
54 ns + (0,23 ns/pF) CL
50
100
42 ns + (0,16 ns/pF) CL
130
260
103 ns + (0,55 ns/pF) CL
60
120
49 ns + (0,23 ns/pF) CL
45
90
37 ns + (0,16 ns/pF) CL
160
320
133 ns + (0,55 ns/pF) CL
65
130
54 ns + (0,23 ns/pF) CL
15
50
100
42 ns + (0,16 ns/pF) CL
5
155
310
128 ns + (0,55 ns/pF) CL
5
10
tPHL
15
5
LOW to HIGH
10
tPLH
15
ASTABLE, ASTABLE → O, O
HIGH to LOW
5
10
tPHL
15
5
LOW to HIGH
10
tPLH
15
+/− TRIGGER → O, O
HIGH to LOW
LOW to HIGH
+ TRIGGER, RETRIGGER → O
HIGH to LOW
+ TRIGGER, RETRIGGER → O
LOW to HIGH
MR → O
HIGH to LOW
MR → O
LOW to HIGH
Output transition times
HIGH to LOW
LOW to HIGH
5
10
tPHL
65
130
54 ns + (0,23 ns/pF) CL
15
50
100
42 ns + (0,16 ns/pF) CL
5
65
130
38 ns + (0,55 ns/pF) CL
10
tPLH
30
60
19 ns + (0,23 ns/pF) CL
15
25
50
17 ns + (0,16 ns/pF) CL
5
95
190
68 ns + (0,55 ns/pF) CL
10
tPHL
40
80
29 ns + (0,23 ns/pF) CL
15
30
60
22 ns + (0,16 ns/pF) CL
5
100
200
83 ns + (0,55 ns/pF) CL
10
tPLH
45
90
34 ns + (0,23 ns/pF) CL
15
35
70
27 ns + (0,16 ns/pF) CL
5
100
200
83 ns + (0,55 ns/pF) CL
10
tPHL
45
90
34 ns + (0,23 ns/pF) CL
15
35
70
27 ns + (0,16 ns/pF) CL
5
60
120
10 ns + (1,0 ns/pF) CL
30
60
10
10
tPLH
tTHL
6 ns + (0,28 ns/pF) CL
15
20
40
5
60
120
30
60
9 ns + (0,42 ns/pF) CL
20
40
6 ns + (0,28 ns/pF) CL
10
tTLH
15
January 1995
9 ns + (0,42 ns/pF) CL
6
10 ns + (1,0 ns/pF) CL
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
VDD
V
Minimum MR pulse
5
width; HIGH
10
SYMBOL MIN. TYP. MAX.
tWMRH
15
60
30
30
15
20
10
Minimum input
pulse width; any
5
input exept MR
10
tW
15
APPLICATION INFORMATION
General features:
• Monostable (one-shot) or astable (free-running)
operation
• True and complemented buffered outputs
• Only one external R and C required
Monostable multivibrator features:
• Positive- or negative-edge triggering
• Output pulse width independent of trigger pulse duration
• Retriggerable option for pulse-width expansion
• Long pulse width possible using small RC components
by means of external counter provision
• Fast recovery time essentially independent of pulse
width
• Pulse-width accuracy maintained at duty cycles
approaching 100%
Astable multivibrator features:
• Free-running or gatable operating modes
• 50% duty cycle
• Oscillator output available
January 1995
7
220
110
100
50
70
35
TYPICAL EXTRAPOLATION
FORMULA
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
1. Astable mode design information
a. Unit-to-unit transfer-voltage variations
The following analysis presents worst-case variations from unit-to-unit as a function of transfer-voltage (VTR) shift for free
running (astable) operation.
Fig.4 Astable mode waveforms.
V TR
t 1 = – R t C t In ---------------------------V DD + V TR
V DD – V TR
t 2 = – R t C t In ------------------------------2V DD – V TR
( V TR ) ( V DD – V TR )
t A = 2 ( t 1 + t 2 ) = – 2R t C t In ------------------------------------------------------------------------- , where t A = Astable mode pulse width.
( V DD + V TR ) ( 2V DD – V TR )
Values for tA are:
VDD = 5 or 10 V
VDD = 15 V
typ. : VTR = 0,5 VDD;
tA = 4,40 RtCt
min. : VTR = 0,3 VDD;
tA = 4,71 RtCt
max.: VTR = 0,7 VDD;
tA = 4,71 RtCt
min. : VTR = 4 V;
tA = 4,84 RtCt
max.: VTR = 11 V;
tA = 4,84 RtCt
thus if tA = 4,40 RtCt is used, the maximum variation will be (+ 7,0%; −0,0%) at 10 V.
January 1995
8
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
b. Variations due to changes in VDD
In addition to variations from unit-to-unit, the astable period may vary as a function of frequency with respect to VDD.
Typical variations are presented graphically in Figs 5 and 6 with 10 V as a reference.
Fig.5 Typical O and O period accuracy as a function of supply voltage; astable mode; Tamb = 25 °C.
CURVE
A
fO
kHz
10
Ct
pF
Rt
kΩ
100
220
B
5
100
470
C
1
1000
220
January 1995
9
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
Fig.6 Typical O and O period accuracy as a function of supply voltage; astable mode; Tamb = 25 °C.
CURVE
fO
kHz
Ct
pF
Rt
kΩ
A
500
10
47
B
225
100
10
C
100
100
22
D
50
100
47
January 1995
10
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
2. Monostable mode design information
The following analysis presents worst case variations from unit-to-unit as a function of transfer-voltage (VTR) shift for
one-shot (monostalbe) operation.
Fig.7 Monostable waveforms.
V TR
t 1 ‘ = – R t C t In -------------2V DD
t M = ( t 1' + t 2 )
( V TR ) ( V DD – V TR )
t M = – R t C t In ------------------------------------------------------------ , where t M = Monostable mode pulse width.
( 2V DD – V TR ) ( 2V DD )
Values for tM are:
typ. : VTR = 0,5 VDD; tM = 2,48 RtCt
VDD = 5 to10 V
VDD = 15 V
min. : VTR = 0,3 VDD; tM = 2,78 RtCt
max.: VTR = 0,7 VDD; tM = 2,52 RtCt
min. : VTR = 4 V;
tM = 2,88 RtCt
max.: VTR = 11 V;
tM = 2,56 RtCt
Note
1. In the astable mode, the first positive half cycle has a duration of tM; succeeding durations are 1⁄2 tA.
thus if tM = 2,48 RtCt is used, the maximum variation will be (+ 12%; −0,0%) at 10 V.
January 1995
11
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
3. Retrigger mode operation
The HEF4047B can be used in the retrigger mode to extend the output pulse duration, or to compare the frequency of
an input signal with that of the internal oscillator. In the retrigger mode the input pulse is applied to pins 8 and 12, and
the output is taken from pin 10 or 11. Normal monostable action is obtained when one retrigger pulse is applied (Fig.8).
Extended pulse duration is obtained when more than one pulse is applied. For two input pulses, tRE = t1’ + t1 + 2t2.
For more than two pulses, tRE (output O), terminates at some variable time, tD, after the termination of the last retrigger
pulse; tD is variable because tRE (output O) terminates after the second positive edge of the oscillator output appears at
flip-flop 4.
Fig.8 Retrigger mode waveforms.
4. External counter option
Time tM can be extended by any amount with the use of external counting circuitry. Advantages include digitally
controlled pulse duration, small timing capacitors for long time periods, and extremely fast recovery time. A typical
implementation is shown in Fig.9.
The pulse duration at the output is: t ext = ( N – 1 ) ( t A ) + ( t M + 1 ⁄ 2 t A )
Where text = pulse duration of the circuitry, and N is the number of counts used.
Fig.9 Implementation of external counter option.
January 1995
12
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
5. Timing component limitations
The capacitor used in the circuit should be non-polarized and have low leakage (i.e. the parallel resistance of the
capacitor should be an order of magnitude greater than the external resistor used).
There is no upper or lower limit for either Rt or Ct value to maintain oscillation.
However, in consideration of accuracy, Ct must be much larger than the inherent stray capacitance in the system (unless
this capacitance can be measured and taken into account).
Rt must be much larger than the LOCMOS ‘ON’ resistance in series with it, which typically is hundreds of ohms.
The recommended values for Rt and Ct to maintain agreement with previously calculated formulae without trimming
should be:
Ct ≥ 100 pF, up to any practical value,
10 kΩ ≤ Rt ≤ 1 MΩ.
6. Power consumption
In the standby mode (monostable or astable), power dissipation will be a function of leakage current in the circuit.
For dynamic operation, the power needed to charge the external timing capacitor Ct is given by the following formulae:
Astable mode:
P = 2 Ct V2 f (f at output pin 13)
P = 4 Ct V2 f (f at output pins 10 and 11)
Monostable mode:
2

 2, 9 C t V  ( duty cycle )
P = --------------------------------------------------------------------- ( f at output pins 10 and 11 )
T
Because the power dissipation does not depend on Rt, a design for minimum power dissipation would be a small value
of Ct. The value of R would depend on the desired period (within the limitations discussed previously).
Typical power consumption in astable mode is shown in Figs 10, 11 and 12.
January 1995
13
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
Fig.10 Power consumption as a function of the output frequency at O or O; VDD = 5 V; astable mode.
Fig.11 Power consumption as a function of the output frequency at O or O; VDD = 10 V; astable mode.
January 1995
14
Philips Semiconductors
Product specification
HEF4047B
MSI
Monostable/astable multivibrator
Fig.12 Power consumption as a function of the output frequency at O or O; VDD = 15 V; astable mode.
January 1995
15