MFEV710 Pegoda EV710 Rev. 3 — 14 February 2011 202630 Product short data sheet PUBLIC 1. General description The new Pegoda is NXP’s latest generation of reference designs for secure MIFARE applications. Built around proven, well-established MIFARE solutions and powerful ARM Cortex-M3 processors, these design in kits are available in two evaluation kits: the MFEV710 and the MFEV852. The MFEV710 design in kit includes the MFRD710 contactless smartcard reader, a design based on the MFRC523 contactless reader IC. The kit supports the entire MIFARE portfolio: MIFARE Classic, MIFARE DESFire, MIFARE Plus, and MIFARE Ultralight C, including SAM AV2 (in x- and non-x modes). The kits also offer full support of MIFARE discover, with a reader library for all the MIFARE card products. It uses an open software concept and PC-based tools. The software code and hardware architecture are reusable, and each kit includes a sample SAM-based, secure reader architecture that implements multiple protocols. For added flexibility in development, the flash-based microcontroller supports custom application development based on Pegoda hardware. The microcontroller is open for customer code implementations, and the design’s hardware interfaces are open for customer extensions. The kit include native support for USB. An optional hardware extension board, available on request, provides additional support for RS232, RS485, and Ethernet. The extension board also has a JTAG interface, for debugging functionality directly on the microcontroller, and is accompanied by a free embedded toolchain for firmware customization. The GUI supplied with each kit uses the familiar Windows look and feel and offers a range of features, including history, log, timing profile management, key management, show cards, and installer. Minimum system requirements The minimum system requirements for running either evaluation kit are as follows: Intel Pentium 166 MHz or equivalent, 32 Mbytes RAM, 20 Mbytes free hard disk space, CD-ROM drive, USB support, and Windows 7, Windows XP, Windows Vista, or Windows Server in 32- or 64-bit version. 2. Features and benefits 2.1 Features Multiprotocol ISO/IEC 14443 and MIFARE operation PC/SC-based architecture on widely deployed hardware solutions Full support for entire MIFARE card portfolio and MIFAREdiscover SAM support in standard or x-mode MFEV710 NXP Semiconductors Pegoda EV710 ARM Cortex-M3 microcontroller with integrated flash memory Firmware in source code and binaries USB host interface to PC and Windows-based user interface Optional support for RS232, RS485, JTAG, Ethernet 2.2 Benefits Fast, flexible development of SAM-based, secure reader systems Quick embedded development with portable code Easy customization with flash-based microcontroller Custom firmware and JTAG debugging with optional hardware extension board 3. Applications Public transportation Access management PC peripheral terminal 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDD supply voltage - 4.75 5.0 5.25 V Tamb ambient temperature - −10 +25 70 V 5. Ordering information Table 2. Ordering information Type number MFEV710 Package Name Description Version - Package containing: - MFRD710, Pegoda contactless smartcard reader, based on MFRC523 contactless reader IC USB cable MIFARE sample cards CD with documentation and software MFEV710_SDS Product short data sheet PUBLIC All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 February 2011 202630 © NXP B.V. 2011. All rights reserved. 2 of 12 xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx NXP Semiconductors MFEV710_SDS Product short data sheet PUBLIC 6. Block diagram ANTENNA AN710 ACT. ANTENNA (5-pin header) CONNECTORS OSCILLATOR 12 MHz RESET USB (type B) All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 February 2011 202630 2 × RS232 (10-pin header) SIM connector T=1 USB DESFIRE SAM I2C RS232 RS485(RS422) (5-pin header) ANTENNA AN710 (10-pin header) RS485 I2C SPI UART I2C LPC1768 ETHERNET EXT SPI RC523 UART ETHERNET (MEC6) JTAG (JTAG) JTAG/ SWD OSCILLATOR 13.56 MHz DIPSW RM710 RD710 Block diagram RD710 Pegoda EV710 3 of 12 © NXP B.V. 2011. All rights reserved. Fig 1. MFEV710 brb575 MFEV710 NXP Semiconductors Pegoda EV710 7. Functional description 7.1 Content The kit includes the following items: • MFRD710, Pegoda contactless smartcard reader, based on MFRC523 contactless reader. • 1 USB cable • 3 MIFARE sample cards • CD with documentation and software. The following paragraphs describe the Hardware and Software Architecture related to the MFRD710. 7.2 Hardware architecture CLRD710 The reader CLRD710 is a contactless Reader/Writer compliant to the ISO/IEC 14443 standard and is able to handle contactless data rates of 106 kBit, 212 kBit, 424 kBit and 848 kBit. It is based on NXP reader-IC MFRC523, see Ref. 1; which is a highly integrated reader IC solution for contactless communication purposes at 13.56 MHz. The MFRC523 is connected to a LPC1768 μController that executes the firmware. The LPC1768 implements flash memory and allows to download and debug the firmware by means of a JTAG interface. The CLRD710 implements an external amplifier driven by the MFRC523 which is connected to the antenna to achieve an optimum reader/writer performance for contactless applications. The MIFARE SAM AV2 module, see Ref. 2; can be used for key storage and enhanced crypto operation to increase the security level. The reader provides several communication interfaces on board such as: USB, RS232, RS485 (RS422), Ethernet (via LPC_ extension board) and JTAG (a JTAG IEEE 1149.1 compliant interface for debugging). The Hardware Design is described in more detail in Ref. 4. 7.3 Software architecture The software of the CLRD710 consist of 3 components. • CLRD710 firmware based on a ARM CortexM3 implementation as well as the driver • Reader library • Graphical User Interface MIFAREdiscover 7.3.1 Firmware and driver The reader firmware can perform contact and contactless communication. MFEV710_SDS Product short data sheet PUBLIC All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 February 2011 202630 © NXP B.V. 2011. All rights reserved. 4 of 12 MFEV710 NXP Semiconductors Pegoda EV710 The contact part of the reader firmware is used to communicate with a SAM, ideally the MIFARE SAM AV2, see Ref. 2. The contactless part performs the polling and activation sequence according to PC/SC part 2, ISO/IEC 14443-3 and 14443-4 standards. The polling and activation sequence can be turned off and on with the use of escape (PC/SC part 3) commands. The polling and activation sequence is automatically disabled if escape commands are executed that would interfere with the normal operations. The firmware also interprets the ADPUs for MIFARE which are defined in PC/SC part 3. The main modes of operation are being set by DIP switches which are located on the reader. Some configuration parameters can be set with the escape commands. The reader will store them in non-violate memory. The user will be able to reset the configuration back to default state. The firmware will construct the product name – which is returned by USB descriptor – to easily identify the reader/SAM configuration. Depending on the DIP switches, there are three possible configurations: • No SAM (Pegoda N) • SAM in X-Mode (Pegoda X) • SAM in S-Mode (Pegoda S) The user will be able to flash the board with customized or original firmware with three methods: • Over USB (IAP) • Over serial port (ISP) • Over JTAG with the use of an external program For more information, please refer to Ref. 6. The implementation of the driver is described in Ref. 9. 7.3.2 NXP Reader Library The Reader Library is a special build of the functionality provided by the Basic Function library. The desired functionality can be selected by the user and compiled dependent on application requirements. On the CLRD710 the Reader library is implemented to be executed on the Host PC. The library is designed to be portable, it can be ported to any embedded environment if desired. As such it can be also ported to the controller of the CLRD710. The NXP reader library is encapsulated into Layers and Components written in ANSI C. The library structure provides a modular way of programming and setting up the reader interface. For easy portability, the reader library consists of 4 layers: • • • • MFEV710_SDS Product short data sheet PUBLIC BAL (Bus Abstraction Layer) HAL (Hardware Abstraction Layer) PAL (Protocol Abstraction Layer) AL (Application Layer) All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 February 2011 202630 © NXP B.V. 2011. All rights reserved. 5 of 12 MFEV710 NXP Semiconductors Pegoda EV710 The reader library requires a dedicated build for a usage of the CLRD710 functionality in No -SAM, SAM “X-mode” or SAM “Direct-mode”. Building the software stack for a specific reader mode requires therefore different software models to be generated. The three types of operating modes within the PC/SC mode are: • No SAM mode The most important aspect of this mode is performing activation and polling sequence for ISO 14443 A type cards as defined in PC/SC part 3. Selected cards are put in slot manager and notification is sent to PC/SC driver. There can be only one ISO 14443-3 card or multiple (maximum 14) ISO 14443-4 cards in the field. • SAM in non X-mode The most important aspect of this mode is performing activation and polling sequence for ISO 14443 A type cards as defined in PC/SC part 3. Selected cards are put in slot manager and notification is sent to PC/SC driver. There can be only one ISO 14443-3 card or multiple (maximum 14) ISO 14443-4 cards in the field. • SAM in X-mode In this mode communication is only through SAM (slot 0). Only limited number of proprietary commands can be executed The NXP reader library is available over the NXP BU-ID docu control service, please refer to Ref. 12. An application note, see Ref. 3, gives an overview how to create your on application as a project within the NXP reader library. 7.3.3 MIFAREdiscover MIFAREdiscover is the Graphical User Interface of the CLRD710 software package. It supports easy and fast application development for ISO/IEC 14443 type Smartcards by providing multiple views to the content and protocols of the cards. It is supplied over our NXP BU-ID docu control service, please refer to Ref. 11. A very first guideline to install all necessary parts and do the first steps with this Graphical User Interface is given in Ref. 5. 7.4 Certification The CLRD710 went successfully through the following certification processes: • EMC, certification to comply with EN 301 489-1 V1.6.1 (2005-09); EN 301 489-3 V1.4.1(2002-08); IEC 60950-1:2005; EN 60950-1:2006 • FCC, certification to comply with FCC Part 15, Subpart C • MIFARE certification institute to comply with Test plan for MIFARE Air-Interface Compatibility Certification of Terminals Qualification of Readers Single and Double UID Version 2.4 Date of Issue: 29.03.2010 • CE MFEV710_SDS Product short data sheet PUBLIC All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 February 2011 202630 © NXP B.V. 2011. All rights reserved. 6 of 12 MFEV710 NXP Semiconductors Pegoda EV710 8. Limiting values Table 3. Limiting values [1] In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VDD supply voltage active reader 4.75 5.00 5.25 V Tamb ambient temperature - −25 +25 +85 °C IDD supply current active, RF on - 170 - mA [1] Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 9. Abbreviations Table 4. MFEV710_SDS Product short data sheet PUBLIC Abbreviations Acronym Description AL Application Layer APDU Application Protocol Data Unit BAL Bus Abstraction Layer EEPROM Electrically Erasable Programmable Read Only Memory HAL Hardware Abstraction Layer IAP In-Application Programming ISP Internet service provider JTAG Joint Test Action Group PAL Protocol Abstraction Layer PCD Proximity Coupling Device PICC Proximity Integrated Circuit Card All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 February 2011 202630 © NXP B.V. 2011. All rights reserved. 7 of 12 MFEV710 NXP Semiconductors Pegoda EV710 10. References [1] Data sheet — MFRC523 Contactless reader IC, available on NXP web [2] Short data sheet — P5DF081 MIFARE SAM AV2, available on NXP web [3] Application Note — Example Project Pegoda, available on NXP web [4] Application Note — Hardware Design Guide Pegoda, available on NXP web [5] Application Note — Quick Start Up Guide Pegoda, available on NXP web [6] Application Note — Software Design Guide Pegoda, available on NXP web [7] Application Note — Pegoda Toolchain Information, available on NXP web [8] Application Note — Pegoda Amplifier, available on NXP web [9] Application Note — Pegoda RD710/RD852 Implementation of the USB drive, available on NXP web [10] Application Note — MIFARE SAM AV2 Documentation and Sampling, available on NXP web [11] Software — MIFAREdiscover available over BU-ID docu control, BU-ID Doc. no.: 1866**1 [12] Software — NXP Reader library including Sample Projects, available over BU-ID docu control, BU ID Doc.no.: 2003** 1. ** ... document version number MFEV710_SDS Product short data sheet PUBLIC All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 February 2011 202630 © NXP B.V. 2011. All rights reserved. 8 of 12 MFEV710 NXP Semiconductors Pegoda EV710 11. Revision history Table 5. Revision history Document ID Release date Data sheet status Change notice Supersedes MFEV710_SDS v3.0 20110214 Product short data sheet - - MFEV710_SDS Product short data sheet PUBLIC All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 February 2011 202630 © NXP B.V. 2011. All rights reserved. 9 of 12 MFEV710 NXP Semiconductors Pegoda EV710 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 12.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. MFEV710_SDS Product short data sheet PUBLIC All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 February 2011 202630 © NXP B.V. 2011. All rights reserved. 10 of 12 MFEV710 NXP Semiconductors Pegoda EV710 Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 12.4 Licenses Purchase of NXP ICs with ISO/IEC 14443 type B functionality This NXP Semiconductors IC is ISO/IEC 14443 Type B software enabled and is licensed under Innovatron’s Contactless Card patents license for ISO/IEC 14443 B. The license includes the right to use the IC in systems and/or end-user equipment. RATP/Innovatron Technology 12.5 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. MIFARE — is a trademark of NXP B.V. DESFire — is a trademark of NXP B.V. MIFARE Plus — is a trademark of NXP B.V. MIFARE Ultralight — is a trademark of NXP B.V. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] MFEV710_SDS Product short data sheet PUBLIC All information provided in this document is subject to legal disclaimers. Rev. 3 — 14 February 2011 202630 © NXP B.V. 2011. All rights reserved. 11 of 12 MFEV710 NXP Semiconductors Pegoda EV710 14. Contents 1 2 2.1 2.2 3 4 5 6 7 7.1 7.2 7.3 7.3.1 7.3.2 7.3.3 7.4 8 9 10 11 12 12.1 12.2 12.3 12.4 12.5 13 14 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Benefits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Hardware architecture CLRD710 . . . . . . . . . . . 4 Software architecture . . . . . . . . . . . . . . . . . . . . 4 Firmware and driver . . . . . . . . . . . . . . . . . . . . . 4 NXP Reader Library . . . . . . . . . . . . . . . . . . . . . 5 MIFAREdiscover . . . . . . . . . . . . . . . . . . . . . . . . 6 Certification. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information. . . . . . . . . . . . . . . . . . . . . 11 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 14 February 2011 202630