BUK7226-75A N-channel TrenchMOS standard level FET Rev. 02 — 22 February 2008 Product data sheet 1. Product profile 1.1 General description Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using NXP General Purpose Automotive (GPA) TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features 175 °C rated Q101 compliant Low on-state resistance Standard level compatible 1.3 Applications 12 V, 24 V and 42 V loads General purpose power switching Automotive systems Motors, lamps and solenoids 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C ID drain current VGS = 10 V; Tmb = 25 °C; see Figure 1 and 4 Ptot total power dissipation Tmb = 25 °C; see Figure 2 Tj junction temperature VDS [1] Min Typ Max Unit - - 75 V - - 45 A - - 158 W -55 - 175 °C - 22 26 mΩ - - 215 mJ Static characteristics RDSon drain-source on-state resistance VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 12 and 13 Avalanche ruggedness EDS(AL)S non-repetitive ID = 45 A; Vsup ≤ 75 V; drain-source avalanche RGS = 50 Ω; VGS = 10 V; energy Tj(init) = 25 °C; unclamped inductive load [1] Capped at 45 A due to bondwire. BUK7226-75A NXP Semiconductors N-channel TrenchMOS standard level FET 2. Pinning information Table 2. Pinning Pin Symbol Description 1 G gate 2 D drain 3 S source mb D mounting base; connected to drain Simplified outline Graphic symbol D mb G mbb076 S 2 1 3 SOT428 (DPAK) 3. Ordering information Table 3. Ordering information Type number BUK7226-75A Package Name Description Version DPAK plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 75 V VDGR drain-gate voltage RGS = 20 kΩ - 75 V VGS gate-source voltage -20 20 V ID drain current - 45 A Tmb = 100 °C; VGS = 10 V; see Figure 1 - 38 A - 215 A Tmb = 25 °C; VGS = 10 V; see Figure 1 and 4 [1] IDM peak drain current Tmb = 25 °C; tp ≤ 10 μs; pulsed; see Figure 4 Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 158 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C - 215 mJ - - J - 45 A - 215 A Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy ID = 45 A; Vsup ≤ 75 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped inductive load EDS(AL)R repetitive drain-source avalanche energy see Figure 3 [2][3] [4] Source-drain diode IS source current Tmb = 25 °C ISM peak source current tp ≤ 10 μs; pulsed; Tmb = 25 °C [1] [1] Capped at 45 A due to bondwire. BUK7226-75A_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 22 February 2008 2 of 13 BUK7226-75A NXP Semiconductors N-channel TrenchMOS standard level FET [2] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. [3] Repetitive avalanche rating limited by an average junction temperature of 170 °C. [4] Refer to application note AN10273 for further information. 003aac178 60 03aa16 120 ID (A) Pder (%) (1) 40 80 20 40 0 0 0 50 100 150 Tmb (°C) 0 200 VGS 10V 50 P der = (1) Capped at 45 A due to bondwire. Fig 1. Continuous drain current as a function of mounting base temperature P tot P tot (25°C ) 100 150 Tmb (°C) 200 × 100 % Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aac181 102 IAV (A) (1) 10 (2) (3) 1 10-1 10-3 10-2 10-1 1 tAV (ms) 10 (1) Singleípulse;T j = 25 °C. (2) Singleípulse;T j = 150 °C. (3) Repetitive. Fig 3. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time BUK7226-75A_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 22 February 2008 3 of 13 BUK7226-75A NXP Semiconductors N-channel TrenchMOS standard level FET 003aac179 103 ID (A) 10 μs Limit RDSon = VDS / ID 10 2 100 μs (1) 1 ms 10 10 ms DC 1 10-1 1 100 ms 102 10 103 VDS (V) Tmb = 25 °C; IDM is single pulse (1) Capped at 45 A due to bondwire. Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-a) thermal resistance from junction to ambient minimum footprint; FR4 board - 70 - K/W Rth(j-mb) thermal resistance from junction to mounting base see Figure 5 - - 1 K/W BUK7226-75A_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 22 February 2008 4 of 13 BUK7226-75A NXP Semiconductors N-channel TrenchMOS standard level FET 003aac180 1 δ = 0.5 Zth(j-mb) (K/W) 0.2 10-1 0.1 0.05 0.02 δ= P 10-2 tp T single shot t tp T 10-3 10-6 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit ID = 0.25 mA; VGS = 0 V; Tj = -55 °C 70 - - V ID = 0.25 mA; VGS = 0 V; Tj = 25 °C 75 - - V 1 - - V ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 11 2 3 4 V ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 11 - - 4.4 V VDS = 75 V; VGS = 0 V; Tj = 25 °C - 0.05 10 μA VDS = 75 V; VGS = 0 V; Tj = 175 °C - - 500 μA VDS = 0 V; VGS = 20 V; Tj = 25 °C - 2 100 nA VDS = 0 V; VGS = -20 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 25 A; Tj = 175 °C; see Figure 12 and 13 - - 54 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 12 and 13 - 22 26 mΩ IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 16 - 0.85 1.2 V Static characteristics V(BR)DSS VGS(th) IDSS IGSS RDSon drain-source breakdown voltage gate-source threshold ID = 1 mA; VDS = VGS; voltage Tj = 175 °C; see Figure 11 drain leakage current gate leakage current drain-source on-state resistance Source-drain diode VSD source-drain voltage BUK7226-75A_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 22 February 2008 5 of 13 BUK7226-75A NXP Semiconductors N-channel TrenchMOS standard level FET Table 6. Characteristics …continued Symbol Parameter trr reverse recovery time IS = 20 A; dIS/dt = -100 A/μs; VGS = -10 V; VDS = 30 V; recovered charge Tj = 25 °C Qr Conditions Min Typ Max Unit - 53 - ns - 144 - nC - 48 - nC - 7.5 - nC - 17 - nC - 1789 2385 pF - 382 458 pF - 219 300 pF - 14 - ns - 66 - ns - 61 - ns Dynamic characteristics QG(tot) total gate charge ID = 25 A; VDS = 60 V; VGS = 10 V; see Figure 14 QGS gate-source charge QGD gate-drain charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time tr rise time td(off) turn-off delay time tf fall time - 41 - ns LD internal drain inductance measured from drain lead from package to center of die; Tj = 25 °C - 2.5 - nH LS internal source inductance measured from source lead from package to source bond pad; Tj = 25 °C - 7.5 - nH VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 15 VDS = 30 V; RL = 1.2 Ω; VGS = 10 V; RG(ext) = 10 Ω; Tj = 25 °C 03nb06 200 VGS (V) = 20 ID (A) 10 9 160 03nb05 28 RDSon (mΩ) 24 8 120 7 20 80 6 16 40 5 0 12 0 2 4 6 8 10 VDS (V) T j = 25 °C; t p = 300 ȝs 5 15 20 VGS (V) T j = 25 °C; ID = 25 A Fig 6. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 7. Drain-source on-state resistance as a function of gate-source voltage; typical values BUK7226-75A_2 Product data sheet 10 © NXP B.V. 2008. All rights reserved. Rev. 02 — 22 February 2008 6 of 13 BUK7226-75A NXP Semiconductors N-channel TrenchMOS standard level FET 03aa35 10−1 ID (A) min 10−2 typ 03nb03 40 gfs (S) max 30 10−3 20 10−4 10 10−5 10−6 0 0 2 4 0 6 20 40 60 80 ID (A) VGS (V) T j = 25 °C;VDS = VGS T j = 25 °C;VDS = 25V Fig 8. Sub-threshold drain current as a function of gate-source voltage 03nb04 50 Fig 9. Forward transconductance as a function of drain current; typical values 03aa32 5 VGS(th) (V) ID (A) 40 4 30 3 max typ 2 20 min Tj = 175 °C 1 10 Tj = 25 °C 0 0 2 4 6 0 −60 0 VGS (V) VDS = 25V 120 180 Tj (°C) ID = 1 m A;VDS = VGS Fig 10. Transfer characteristics: drain current as a function of gate-source voltage; typical values Fig 11. Gate-source threshold voltage as a function of junction temperature BUK7226-75A_2 Product data sheet 60 © NXP B.V. 2008. All rights reserved. Rev. 02 — 22 February 2008 7 of 13 BUK7226-75A NXP Semiconductors N-channel TrenchMOS standard level FET 03nb07 60 RDSon (mΩ) 6 7 8 03nb25 2.4 9 10 VGS (V) = 5 a 50 1.6 40 30 0.8 20 10 0 50 100 150 0 −60 200 ID (A) T j = 25 °C a= Fig 12. Drain-source on-state resistance as a function of drain current; typical values 03nb02 10 VGS (V) 0 60 120 180 Tj (°C) R DSon R DSon (25°C ) Fig 13. Normalized drain-source on-state resistance factor as a function of junction temperature 03nb08 3000 C (pF) 8 Ciss 2000 VDS = 14 V 6 VDS = 60 V Coss 4 1000 Crss 2 0 0 20 40 60 0 10−2 10−1 QG (nC) 102 10 VDS (V) T j = 25 °C; ID = 25 A VGS = 0V ; f = 1 M H z Fig 14. Gate-source voltage as a function of turn-on gate charge; typical values Fig 15. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK7226-75A_2 Product data sheet 1 © NXP B.V. 2008. All rights reserved. Rev. 02 — 22 February 2008 8 of 13 BUK7226-75A NXP Semiconductors N-channel TrenchMOS standard level FET 03nb01 80 IS (A) 60 40 Tj = 175 °C 20 Tj = 25 °C 0 0 0.4 0.8 1.2 VSD (V) VGS = 0V Fig 16. Reverse diode current; typical values BUK7226-75A_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 22 February 2008 9 of 13 BUK7226-75A NXP Semiconductors N-channel TrenchMOS standard level FET 7. Package outline Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 y E A A A1 b2 E1 mounting base D2 D1 HD 2 L L2 1 L1 3 b1 b w M c A e e1 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 b2 c D1 D2 min E E1 min e e1 HD L L1 min L2 w y max mm 2.38 2.22 0.93 0.46 0.89 0.71 1.1 0.9 5.46 5.00 0.56 0.20 6.22 5.98 4.0 6.73 6.47 4.45 2.285 4.57 10.4 9.6 2.95 2.55 0.5 0.9 0.5 0.2 0.2 OUTLINE VERSION SOT428 REFERENCES IEC JEDEC JEITA TO-252 SC-63 EUROPEAN PROJECTION ISSUE DATE 06-02-14 06-03-16 Fig 17. Package outline SOT428 (DPAK) BUK7226-75A_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 22 February 2008 10 of 13 BUK7226-75A NXP Semiconductors N-channel TrenchMOS standard level FET 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes BUK7226-75A_2 20080222 Product data sheet - BUK7226_75A-01 Modifications: BUK7226_75A-01 • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. 20001009 Product specification; initial version BUK7226-75A_2 Product data sheet - © NXP B.V. 2008. All rights reserved. Rev. 02 — 22 February 2008 11 of 13 BUK7226-75A NXP Semiconductors N-channel TrenchMOS standard level FET 9. Legal information 9.1 Data sheet status Document status[1][2] Product status[3] Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. Definition [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 10. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] BUK7226-75A_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 22 February 2008 12 of 13 BUK7226-75A NXP Semiconductors N-channel TrenchMOS standard level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 11 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 22 February 2008 Document identifier: BUK7226-75A_2