INTEGRATED CIRCUITS DATA SHEET TDA8708A Video analog input interface Product specification Supersedes data of April 1993 File under Integrated Circuits, IC02 Philips Semiconductors June 1994 Philips Semiconductors Product specification Video analog input interface TDA8708A FEATURES APPLICATIONS • 8-bit resolution • Video signal decoding • Sampling rate up to 32 MHz • Scrambled TV (encoding and decoding) • Binary or two's complement 3-state TTL outputs • Digital picture processing • TTL-compatible digital inputs and outputs • Frame grabbing. • Internal reference voltage regulator • Power dissipation of 365 mW (typical) GENERAL DESCRIPTION • Input selector circuit (one out of three video inputs) The TDA8708A is an analog input interface for video signal processing. It includes a video amplifier with clamp and gain control, an 8-bit analog-to-digital converter (ADC) with a sampling rate of 32 MHz and an input selector. • Clamp and Automatic Gain Control (AGC) functions for CVBS and Y signals • No sample-and-hold circuit required. • The TDA8708A has white peak control in modes 1 and 2 whereas the TDA8708B has control in mode 1 only. QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCCA analog supply voltage 4.5 5.0 5.5 V VCCD digital supply voltage 4.5 5.0 5.5 V VCCO TTL output supply voltage 4.2 5.0 5.5 V ICCA analog supply current − 37 45 mA ICCD digital supply current − 24 30 mA ICCO TTL output supply current − 12 16 mA ILE DC integral linearity error − − ±1 LSB DLE DC differential linearity error − − ±0.5 LSB fclk(max) maximum clock frequency 30 32 − MHz B maximum −3 dB bandwidth (AGC amplifier) 12 18 − MHz Ptot total power dissipation − 365 500 mW ORDERING INFORMATION PACKAGE TYPE NUMBER PINS PIN POSITION MATERIAL CODE TDA8708A 28 DIP plastic SOT117-1 TDA8708AT 28 SO28L plastic SOT136-1 June 1994 2 Philips Semiconductors Product specification Video analog input interface TDA8708A BLOCK DIAGRAM andbook, full pagewidth video input selection bit 0 video input selection bit 1 14 video input 0 video input 1 video input 2 15 analog voltage output VIDEO AMPLIFIER 19 ADC input clock input 20 5 decoupling input TTL outputs V CCO (+ 5 V) 21 7 16 17 18 9 INPUT SELECTOR 8 - bit ADC AMP. 1 2 clamp capacitor connection 24 AGC capacitor connection 25 3 TTL OUTPUTS TDA8708A 4 10 11 12 AGC & CLAMP LOGIC & MODE SELECTION peak level current resistor input D6 D5 D4 D3 D2 D1 D0 BLACK LEVEL DIGITAL COMPARATOR 28 SYNC LEVEL DIGITAL COMPARATOR 27 sync level sync pulse 26 black level sync pulse 6 8 digital VCCD (+ 5 V) digital ground 22 analog VCCA (+ 5 V) Fig.1 Block diagram. June 1994 13 PEAK LEVEL DIGITAL COMPARATOR output format/ chip enable (3-state input) D7 3 23 analog ground MBB965 Philips Semiconductors Product specification Video analog input interface TDA8708A PINNING SYMBOL PIN DESCRIPTION D7 1 data output; bit 7 (MSB) D6 2 data output; bit 6 D5 3 data output; bit 5 D4 4 data output; bit 4 CLK 5 clock input VCCD 6 digital supply voltage (+5 V) D7 1 28 RPEAK VCCO 7 TTL outputs supply voltage (+5 V) D6 2 27 GATE A DGND 8 digital ground D5 3 26 GATE B OF 9 output format/chip enable (3-state input) D4 4 25 AGC D3 10 data output; bit 3 CLK 5 24 CLAMP D2 11 data output; bit 2 VCCD 6 23 AGND D1 12 data output; bit 1 VCCO 7 D0 13 data output; bit 0 (LSB) DGND 8 21 DEC I0 14 video input selection bit 0 OF 9 20 ADCIN I1 15 video input selection bit 1 VIN0 16 video input 0 VIN1 17 video input 1 VIN2 18 ANOUT TDA8708A 22 VCCA D3 10 19 ANOUT D2 11 18 VIN2 video input 2 D1 12 17 VIN1 19 analog voltage output D0 13 16 VIN0 ADCIN 20 analog-to-digital converter input DEC 21 decoupling input VCCA 22 analog supply voltage (+5 V) AGND 23 analog ground CLAMP 24 clamp capacitor connection AGC 25 AGC capacitor connection GATE B 26 black level synchronization pulse GATE A 27 sync level synchronization pulse RPEAK 28 peak level current resistor input June 1994 I0 14 15 I1 MBB964 Fig.2 Pin configuration. 4 Philips Semiconductors Product specification Video analog input interface TDA8708A The sync level comparator is active during a positive-going pulse at the GATE A input. This means that the sync pulse of the composite video signal is used as an amplitude reference. The bottom of the sync pulse is adjusted to obtain a digital output of logic 0 at the converter output. As the black level is at digital level 64, the sync pulse will have a digital amplitude of 64 LSBs. FUNCTIONAL DESCRIPTION The TDA8708A provides a simple interface for decoding video signals. The TDA8708A operates in configuration mode 1 (see Fig.4) when the video signals are weak (i.e. when the gain of the AGC amplifier has not yet reached its optimum value). This enables a fast recovery of the synchronization pulses in the decoder circuit. When the pulses at the GATE A and GATE B inputs become distinct (GATE A and GATE B pulses are synchronization pulses occurring during the sync period and rear porch respectively) the TDA8708A automatically switches to configuration mode 2 (see Fig.5). The peak-white control loop is always active. If the video signal tends to exceed the digital code of 248, the gain will be limited to avoid any over-range of the converter. The use of nominal signals will prevent the output from exceeding a digital code of 213 and the peak-white control loop will be non-active. The clamp level control is accomplished by using the same techniques as used for the gain control. The black-level digital comparator is active during a positive-going pulse at the GATE B input. The clamp capacitor will be charged or discharged to adjust the digital output to code 64. When the TDA8708A is in configuration mode 1, the gain of the AGC amplifier will be roughly adjusted (sync level to a digital output level of 0 and the peak level to a digital output level of 255). In configuration mode 2 the digital output of the ADC is compared to internal digital reference levels. The resultant outputs control the charge or discharge current of a capacitor connected to the AGC pin. The voltage across this capacitor controls the gain of the video amplifier. This is the gain control loop. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. MAX. UNIT VCCA analog supply voltage −0.3 +7.0 V VCCD digital supply voltage −0.3 +7.0 V VCCO output supply voltage −0.3 +7.0 V ∆VCC supply voltage difference between VCCA and VCCD −1.0 +1.0 V supply voltage difference between VCCO and VCCD −1.0 +1.0 V supply voltage difference between VCCA and VCCO −1.0 +1.0 V VI input voltage −0.3 VCCA V IO output current 0 +10 mA Tstg storage temperature −55 +150 °C Tamb operating ambient temperature 0 +70 °C Tj junction temperature 0 +125 °C THERMAL CHARACTERISTICS SYMBOL Rth j-a June 1994 PARAMETER VALUE UNIT SOT117-1 55 K/W SOT136-1 70 K/W thermal resistance from junction to ambient in free air 5 Philips Semiconductors Product specification Video analog input interface TDA8708A CHARACTERISTICS VCCA = V22 to V23 = 4.5 to 5.5 V; VCCD = V6 to V8 = 4.5 to 5.5 V; VCCO = V7 to V8 = 4.2 to 5.5 V; AGND and DGND shorted together; VCCA to VCCD = −0.5 to +0.5 V; VCCO to VCCD = −0.5 to +0.5 V; VCCA to VCCO = −0.5 to +0.5 V; Tamb = 0 to +70 °C; typical readings taken at VCCA = VCCD = VCCO = 5 V and Tamb = 25 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies VCCA analog supply voltage 4.5 5.0 5.5 V VCCD digital supply voltage 4.5 5.0 5.5 V VCCO TTL output supply voltage 4.2 5.0 5.5 V ICCA analog supply current − 37 45 mA ICCD digital supply current ICCO TTL output supply current − 24 30 mA TTL load (see Fig.8) − 12 16 mA Video amplifier inputs VIN(0 TO 2) INPUTS VI(p-p) input voltage (peak-to-peak value) AGC load with external capacitor; note 1 0.6 − 1.5 V |Zi| input impedance fi = 6 MHz 10 20 − kΩ CI input capacitance fi = 6 MHz − 1 − pF I0 AND I1 TTL INPUTS (SEE TABLE 1) VIL LOW level input voltage 0 − 0.8 V VIH HIGH level input voltage 2.0 − VCCD V IIL LOW level input current VI = 0.4 V −400 − − µA IIH HIGH level input current VI = 2.7 V − − 20 µA 0 − 0.8 V GATE A AND GATE B TTL INPUTS (SEE FIGS 4 AND 5) VIL LOW level input voltage VIH HIGH level input voltage 2.0 − VCCD V IIL LOW level input current VI = 0.4 V −400 − − µA IIH HIGH level input current VI = 2.7 V − − 20 µA tW pulse width see Fig.5 2 − − µs R28 = 0 Ω − 80 150 µA AGC voltage for minimum gain − 2.8 − V AGC voltage for maximum gain − 4.0 − V − V RPEAK INPUT (PIN 28) I28(min) minimum peak level current AGC INPUT (PIN 25) V25(min) V25(max) AGC output current see Table 2 CLAMP INPUT (PIN 24) V24 clamp voltage for code 128 output I24 clamp output current June 1994 − 3.5 see Table 3 6 Philips Semiconductors Product specification Video analog input interface SYMBOL PARAMETER TDA8708A CONDITIONS MIN. TYP. MAX. UNIT Video amplifier outputs ANOUT OUTPUT (PIN 19) V19(p-p) AC output voltage (peak-to-peak value) VVIN = 1.33 V (p-p); V25 = 3.6 V − 1.33 − V I19 internal current source RL = ∞ 2.0 2.5 − mA IO(p-p) output current driven by the load VANOUT = 1.33 V (p-p); note 2 − − 1.0 mA V19 DC output voltage for black level note 3 − VCCA − 2.24 − V Z19 output impedance − 20 − Ω Video amplifier dynamic characteristics αct crosstalk between VIN inputs VCCA = 4.75 to 5.25 V − −50 −45 dB Gdiff differential gain VVIN = 1.33 V (p-p); V25 = 3.6 V − 2 − % ϕdiff differential phase VVIN = 1.33 V (p-p); V25 = 3.6 V − 0.8 − deg B −3 dB bandwidth 12 − − MHz S/N signal-to-noise ratio note 4 60 − − dB SVRR1 supply voltage ripple rejection note 5 − 45 − dB ∆G gain range see Fig.10 −4.5 − +6.0 dB Gstab gain stability as a function of supply voltage and temperature see Fig.10 − − 5 % Analog-to-digital converter inputs CLK INPUT (PIN 5) VIL LOW level input voltage 0 − 0.8 V VIH HIGH level input voltage 2.0 − VCCD V IIL LOW level input current Vclk = 0.4 V −400 − − µA IIH HIGH level input current Vclk = 2.7 V − − 100 µA |Zi| input impedance fclk= 10 MHz − 4 − kΩ CI input capacitance fclk = 10 MHz − 4.5 − pF OF INPUT (3-STATE; SEE TABLE 4) VIL LOW level input voltage 0 − 0.2 V VIH HIGH level input voltage 2.6 − VCCD V V9 input voltage in high impedance state − 1.15 − V IIL LOW level input current −370 −300 − µA IIH HIGH level input current − 300 450 µA June 1994 7 Philips Semiconductors Product specification Video analog input interface SYMBOL TDA8708A PARAMETER CONDITIONS MIN. TYP. MAX. UNIT ADCIN INPUT (PIN 20; SEE TABLE 5) V20 input voltage digital output = 00 − VCCA − 2.42 − V V20 input voltage digital output = 255 − VCCA − 1.41 − V V20(p-p) input voltage amplitude (peak-to-peak value) − 1.0 − V I20 input current − 1.0 10 µA |Zi| input impedance fi = 6 MHz − 50 − MΩ CI input capacitance fi = 6 MHz − 1 − pF Analog-to-digital converter outputs DIGITAL OUTPUTS D0 TO D7 VOL LOW level output voltage IOL = 2 mA 0 − 0.6 V VOH HIGH level output voltage IOL = −0.4 mA 2.4 − VCCD V IOZ output current in 3-state mode 0.4 V < VO < VCCD −20 − +20 µA see Fig.6; note 6 30 32 − MHz − 2 − % Switching characteristics fclk(max) maximum clock input frequency Analog signal processing (fclk = 32 MHz; see Fig.8) Gdiff differential gain ϕdiff differential phase see Fig.3; note 7 − 2 − deg f1 fundamental harmonics (full-scale) fi = 4.43 MHz; note 7 − − 0 dB fall harmonics (full-scale); all components fi = 4.43 MHz; note 7 − −55 − dB SVRR2 supply voltage ripple rejection note 8 − 1 5 %/V − − ±1 LSB − − ±0.5 LSB − − ±2 LSB V20 = 1.0 V (p-p); see Fig.3; note 7 Transfer function (see Fig.8) ILE DC integral linearity error DLE DC differential linearity error ILE AC integral linearity error note 9 Timing (fclk = 32 MHz; see Figs 6, 7 and 8) DIGITAL OUTPUTS (CL = 15 pF; IOL = 2 mA; RL = 2 kΩ) tds sampling delay time − 2 − ns th output hold time 6 8 − ns td output delay time − 16 20 ns tdEZ 3-state delay time; output enable − 19 25 ns tdDZ 3-state delay time; output disable − 14 20 ns June 1994 8 Philips Semiconductors Product specification Video analog input interface TDA8708A Notes 1. 0 dB is obtained at the AGC amplifier when applying Vi(p-p) = 1.33 V. 2. The output current at pin 19 should not exceed 1 mA. The load impedance RL should be referenced to VCCA and defined as: a) AC impedance ≥1 kΩ and the DC impedance >2.7 kΩ. b) The load impedance should be coupled directly to the output of the amplifier so that the DC voltage supplied by the clamp is not disturbed. 3. Control mode 2 is selected. 4. Signal-to-noise ratio measured with 5 MHz bandwidth: V ANOUTC ( p – p ) S ---- = 20 log ------------------------------------------------- at B = 5 MHz. V ANOUTY (RMS noise) N 5. The voltage ratio is expressed as: ∆V CCA G SVRR1 = 20 log ------------------ × -------- for VI = 1 V (p-p), gain at 100 kHz = 1 and 1 V supply variation. V CCA ∆G 6. It is recommended that the rise and fall times of the clock are ≥2 ns. In addition, a ‘good layout’ for the digital and analog grounds is recommended. 7. These measurements are realized on analog signals after a digital-to-analog conversion (TDA8702 is used). 8. The supply voltage rejection is the relative variation of the analog signal (full-scale signal at input) for 1 V of supply variation: ∆ ( V I ( 00 ) – V I ( FF ) ) + ( V I ( 00 ) – V I ( FF ) ) SVRR2 = ----------------------------------------------------------------------------------------------------∆V CCA 9. Full-scale sine wave (fi = 4.4 MHz; fclk = 27 MHz). June 1994 9 Philips Semiconductors Product specification Video analog input interface TDA8708A Table 1 Video input selection (CVBS). Table 3 CLAMP output current. I1 I0 SELECTED INPUT 0 0 VIN0 0 1 VIN1 1 0 VIN2 1 1 1 VIN2 1 1 1 0 X(1) 1 0 ICLAMP MODE output < 0 ICLAMPM 1 output > 0 −2.5 µA 1 X(1) 0 X(1) 0 µA 2 0 1 output < 64 +50 µA 2 64 < output −50 µA 2 Table 2 AGC output current. GATE A GATE B DIGITAL OUTPUT GATE A GATE B DIGITAL OUTPUT IAGC MODE(2) output < 255 −2.5 µA 1 output > 255 IAGCM 1 output < 248 0 µA 2 output > 248 IAGCM 2 output < 0 +2.5 µA 2 0 < output < 248 −2.5 µA 2 Note 1. X = don't care. Table 4 OF input coding. OF open 0 active, two's complement 1 high impedance circuit(1) active, binary Note 2 output > 248 IAGCM D0 TO D7 1. Use C ≥ 10 pF to DGND. Note 1. X = don't care. 2. Mode 2 can only be initialized with successive pulses on GATE A and GATE B (see Fig.5). Table 5 Output coding and input voltage (typical values). BINARY OUTPUTS STEP VADCIN TWO'S COMPLEMENT D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 Underflow − 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 VCCA − 2.41 V 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 − 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 . − . . . . . . . . . . . . . . . . . − . . . . . . . . . . . . . . . . 254 − 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 255 VCCA − 1.41 V 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 Overflow − 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 June 1994 10 Philips Semiconductors Product specification Video analog input interface TDA8708A handbook, full pagewidth 0.25 V 5 MHz sine wave 1.0 V 0.25 V 64 µs MBB959 Fig.3 Test signal on the ADCIN pin for differential gain and phase measurements. ndbook, full pagewidthdigital MBB969 output level peak-level gain control 255 black-level clamping sync-level gain control 0 time GATE A GATE B MODE 1 Fig.4 Control mode 1. June 1994 11 Philips Semiconductors Product specification Video analog input interface TDA8708A handbook, full pagewidth digital MBB970 output level 248 safety margin peak-level gain control 213 standard picture level black-level clamping 64 sync-level control 0 tW GATE A time tW GATE B MODE 2 Fig.5 Control mode 2. handbook, full pagewidth clock input reference level (1.5 V) CLK input t ds sample N 1 sample N 2 sample N sample N 1 analog input (ADCIN) th 2.4 V data outputs data N 3 D0 to D7) data N 2 data N 1 data N data N 1 0.4 V td Fig.6 Timing diagram for data output. June 1994 12 MBB958 Philips Semiconductors Product specification Video analog input interface handbook, full pagewidth TDA8708A open OF input data outputs (D0 to D7) 2.4 V high impedance binary two's complement 0.4 V t dDZ t dEZ MBB968 Fig.7 Output format timing diagram. V CCO handbook, halfpage 2 kΩ D0 to D7 15 pF IN916 or IN3064 MBD865 DGND Fig.8 Load circuit for timing measurement; data outputs (OF = LOW or open-circuit). June 1994 13 Philips Semiconductors Product specification Video analog input interface TDA8708A V CCO handbook, halfpage 2 kΩ S1 D0 to D7 C 5 kΩ IN916 or IN3064 S2 MBB955 DGND Fig.9 Load circuit for timing measurement; 3-state outputs (OF: fi = 1 MHz; VOF = 3 V). MSA676 12 G (dB) 8 5% 4 0 (1) (2) 4 8 2.6 3 3.4 3.8 4.2 4.6 V 25 (V) (1) Typical value (VCCA = VCCD = 5 V; Tamb = 25 °C). (2) Minimum and maximum values (temperature and supply). Fig.10 Gain control curve. June 1994 14 15 pins 14 and 15 I0, I1 pin 9 OF AGND DGND DGND DGND VCCA VREF 4 V BE AGND 20 kΩ DGND pin 19 ANOUT pin 21 DEC AGND MBB971 VREF Vmid V top VCCA I2 VCCA AGND AGND pin 20 ADCIN VCCA I1 VCCA Vbottom AGND AGND I1 DGND VCCD 2.5 mA VCCA DGND Fig.11 Internal pin configuration. VCCA TDA8708A I RPEAK VCCD pin 25 AGC pin 23 AGND pin 8 DGND pin 24 CLAMP pin 22 VCCA pin 7 VCCO pin 6 VCCD Video analog input interface pins 16 to 18 VIN0, VIN1 and VIN2 binary/ two's complement chip enable VCCD 1.5 V VCCD VCCD pins 26 or 27 GATE A or GATE B handbook, full pagewidth June 1994 pin 5 clock input pins 1 to 4 and 10 to 13 data outputs VCCO pin 28 RPEAK Philips Semiconductors Product specification TDA8708A INTERNAL PIN CIRCUITRY Philips Semiconductors Product specification Video analog input interface TDA8708A APPLICATION INFORMATION Additional information can be found in the laboratory report “FBL/AN9308”. 330 Ω handbook, full pagewidth 1 28 2 27 horizontal sync 3 26 horizontal clamp 4 25 5 24 6 23 7 22 data outputs 220 nF 100 Ω 33 pF clock 18 nF 22 nF 1µF (1) 5V 22 Ω 22 nF 10 nF 8 5V 1 µH TDA8708A 21 5V 1 µF 9 20 10 pF LOW PASS FILTER 10 19 11 18 12 17 13 16 14 15 (2) 4.7 µF data outputs 4.7 µF 4.7 µF 75 Ω 75 Ω MBB967 - 1 (1) It is recommended to decouple VCCO through a 22 Ω resistor especially when the output data of TDA8708A interfaces with a capacitive CMOS load device. (2) See Figs 13 and 15 for examples of the low-pass filters. Fig.12 Application diagram. June 1994 16 75 Ω Philips Semiconductors Product specification Video analog input interface TDA8708A 22 µH 22 µH dbook, full pagewidth 12 pF 680 Ω ANOUT (pin 19) 12 pF ADCIN (pin 20) 2.2 kΩ Vi 27 pF 68 pF 27 pF Vo MBB966 - 1 VCCA (pin 22) This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ must in any event be applied. Fig.13 Example of a low-pass filter for CVBS and Y signals. Characteristics of Fig. 13 • Order 5; adapted CHEBYSHEV • Ripple ρ ≤ 0.4 dB MSA682 0 handbook, halfpage • f = 6.5 MHz at −3 dB α (dB) • fnotch = 9.75 MHz. 40 80 120 160 0 10 20 f (MHz) 30 Fig.14 Frequency response for filter shown in Fig.13. June 1994 17 Philips Semiconductors Product specification Video analog input interface 680 Ω ADOUT (pin 19) handbook, full pagewidth TDA8708A 82 µH ADCIN (pin 20) 2.2 kΩ Vi 15 pF 15 pF Vo MSA678 VCCA (pin 22) This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ must in any event be applied. Fig.15 Example of an economical low-pass filter for CVBS and Y signals. Characteristics of Fig. 15 • Order 5; adapted CHEBYSHEV • Ripple ρ ≤ 0.4 dB MSA681 0 handbook, halfpage • f = 6.5 MHz at −3 dB. α (dB) 10 20 30 40 0 10 20 f (MHz) 30 Fig.16 Frequency response for filter shown in Fig.15. June 1994 18 Philips Semiconductors Product specification Video analog input interface TDA8708A PACKAGE OUTLINES 15.80 15.24 seating plane 36.0 35.0 handbook, full pagewidth 4.0 5.1 max max 3.9 3.4 0.51 min 1.7 max 0.53 max 2.54 (13x) 0.254 M 0.32 max 15.24 1.7 max 17.15 15.90 28 15 14.1 13.7 1 14 Dimensions in mm. Fig.17 Plastic dual in-line package; 28 leads (600 mil) with internal heat spreader (SOT117-1). June 1994 19 MSA264 Philips Semiconductors Product specification Video analog input interface handbook, full pagewidth TDA8708A 18.1 17.7 7.6 7.4 A 10.65 10.00 0.1 S S 0.9 (4x) 0.4 28 15 2.45 2.25 1.1 1.0 0.3 0.1 2.65 2.35 0.32 0.23 pin 1 index 1 1.1 0.5 14 detail A 1.27 0.49 0.36 0.25 M (28x) Dimensions in mm. Fig.18 Plastic small outline package; 28 leads; large body (SOT136-1). June 1994 20 0 to 8o MBC236 - 1 Philips Semiconductors Product specification Video analog input interface TDA8708A A modified wave soldering technique is recommended using two solder waves (dual-wave), in which a turbulent wave with high upward pressure is followed by a smooth laminar wave. Using a mildly-activated flux eliminates the need for removal of corrosive residues in most applications. SOLDERING Plastic dual in-line packages BY DIP OR WAVE The maximum permissible temperature of the solder is 260 °C; this temperature must not be in contact with the joint for more than 5 s. The total contact time of successive solder waves must not exceed 5 s. BY SOLDER PASTE REFLOW Reflow soldering requires the solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the substrate by screen printing, stencilling or pressure-syringe dispensing before device placement. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified storage maximum. If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Several techniques exist for reflowing; for example, thermal conduction by heated belt, infrared, and vapour-phase reflow. Dwell times vary between 50 and 300 s according to method. Typical reflow temperatures range from 215 to 250 °C. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron below the seating plane (or not more than 2 mm above it). If its temperature is below 300 °C, it must not be in contact for more than 10 s; if between 300 and 400 °C, for not more than 5 s. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 min at 45 °C. REPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING IRON OR PULSE-HEATED SOLDER TOOL) Plastic small-outline packages During placement and before soldering, the component must be fixed with a droplet of adhesive. After curing the adhesive, the component can be soldered. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. Fix the component by first soldering two, diagonally opposite, end pins. Apply the heating tool to the flat part of the pin only. Contact time must be limited to 10 s at up to 300 °C. When using proper tools, all other pins can be soldered in one operation within 2 to 5 s at between 270 and 320 °C. (Pulse-heated soldering is not recommended for SO packages.) Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder bath is 10 s, if allowed to cool to less than 150 °C within 6 s. Typical dwell time is 4 s at 250 °C. For pulse-heated solder tool (resistance) soldering of VSO packages, solder is applied to the substrate by dipping or by an extra thick tin/lead plating before package placement. BY WAVE June 1994 21 Philips Semiconductors Product specification Video analog input interface TDA8708A DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. June 1994 22 Philips Semiconductors Product specification Video analog input interface TDA8708A NOTES June 1994 23 Philips Semiconductors – a worldwide company Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428) BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367 Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. (02)805 4455, Fax. (02)805 4466 Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213, Tel. (01)60 101-1236, Fax. (01)60 101-1211 Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands, Tel. (31)40 783 749, Fax. (31)40 788 399 Brazil: Rua do Rocio 220 - 5th floor, Suite 51, CEP: 04552-903-SÃO PAULO-SP, Brazil. P.O. Box 7383 (01064-970). Tel. (011)821-2327, Fax. (011)829-1849 Canada: INTEGRATED CIRCUITS: Tel. (800)234-7381, Fax. (708)296-8556 DISCRETE SEMICONDUCTORS: 601 Milner Ave, SCARBOROUGH, ONTARIO, M1B 1M8, Tel. (0416)292 5161 ext. 2336, Fax. (0416)292 4477 Chile: Av. Santa Maria 0760, SANTIAGO, Tel. (02)773 816, Fax. (02)777 6730 Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17, 77621 BOGOTA, Tel. (571)249 7624/(571)217 4609, Fax. (571)217 4549 Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. (032)88 2636, Fax. (031)57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. (9)0-50261, Fax. (9)0-520971 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. (01)4099 6161, Fax. (01)4099 6427 Germany: PHILIPS COMPONENTS UB der Philips G.m.b.H., P.O. Box 10 63 23, 20043 HAMBURG, Tel. (040)3296-0, Fax. (040)3296 213. Greece: No. 15, 25th March Street, GR 17778 TAVROS, Tel. (01)4894 339/4894 911, Fax. (01)4814 240 Hong Kong: PHILIPS HONG KONG Ltd., Components Div., 6/F Philips Ind. Bldg., 24-28 Kung Yip St., KWAI CHUNG, N.T., Tel. (852)424 5121, Fax. (852)428 6729 India: Philips INDIA Ltd, Components Dept, Shivsagar Estate, A Block , Dr. Annie Besant Rd. Worli, Bombay 400 018 Tel. (022)4938 541, Fax. (022)4938 722 Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4, P.O. Box 4252, JAKARTA 12950, Tel. (021)5201 122, Fax. (021)5205 189 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. (01)640 000, Fax. (01)640 200 Italy: PHILIPS COMPONENTS S.r.l., Viale F. Testi, 327, 20162 MILANO, Tel. (02)6752.3302, Fax. (02)6752 3300. Japan: Philips Bldg 13-37, Kohnan 2 -chome, Minato-ku, TOKYO 108, Tel. (03)3740 5028, Fax. (03)3740 0580 Korea: (Republic of) Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. (02)794-5011, Fax. (02)798-8022 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. (03)750 5214, Fax. (03)757 4880 Mexico: Philips Components, 5900 Gateway East, Suite 200, EL PASO, TX 79905, Tel. 9-5(800)234-7381, Fax. (708)296-8556 Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB Tel. (040)783749, Fax. (040)788399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. (09)849-4160, Fax. (09)849-7811 Philips Semiconductors Norway: Box 1, Manglerud 0612, OSLO, Tel. (022)74 8000, Fax. (022)74 8341 Pakistan: Philips Electrical Industries of Pakistan Ltd., Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton, KARACHI 75600, Tel. (021)587 4641-49, Fax. (021)577035/5874546. Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc, 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. (02)810 0161, Fax. (02)817 3474 Portugal: PHILIPS PORTUGUESA, S.A., Rua dr. António Loureiro Borges 5, Arquiparque - Miraflores, Apartado 300, 2795 LINDA-A-VELHA, Tel. (01)14163160/4163333, Fax. (01)14163174/4163366. Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. (65)350 2000, Fax. (65)251 6500 South Africa: S.A. PHILIPS Pty Ltd., Components Division, 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. (011)470-5911, Fax. (011)470-5494. Spain: Balmes 22, 08007 BARCELONA, Tel. (03)301 6312, Fax. (03)301 42 43 Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM, Tel. (0)8-632 2000, Fax. (0)8-632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. (01)488 2211, Fax. (01)481 77 30 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978, TAIPEI 100, Tel. (02)388 7666, Fax. (02)382 4382. Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, Bangkok 10260, THAILAND, Tel. (662)398-0141, Fax. (662)398-3319. Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. (0 212)279 2770, Fax. (0212)269 3094 United Kingdom: Philips Semiconductors Limited, P.O. Box 65, Philips House, Torrington Place, LONDON, WC1E 7HD, Tel. (071)436 41 44, Fax. (071)323 03 42 United States: INTEGRATED CIRCUITS: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. (800)234-7381, Fax. (708)296-8556 DISCRETE SEMICONDUCTORS: 2001 West Blue Heron Blvd., P.O. Box 10330, RIVIERA BEACH, FLORIDA 33404, Tel. (800)447-3762 and (407)881-3200, Fax. (407)881-3300 Uruguay: Coronel Mora 433, MONTEVIDEO, Tel. (02)70-4044, Fax. (02)92 0601 For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BAF-1, P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 SCD31 © Philips Electronics N.V. 1994 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 533061/1500/05/pp24 Document order number: Date of release: June 1994 9397 734 20011