Component - CRC V2.30 Datasheet.pdf

PSoC® Creator™ Component Datasheet
Cyclic Redundancy Check (CRC)
2.30
Features
 1 to 64 bits
 Time Division Multiplexing mode
 Requires clock and data for serial bit stream input
 Serial data in, parallel result
 Standard [CRC-1 (parity bit), CRC-4 (ITU-T G.704), CRC-5-USB, etc.] or custom polynomial
 Standard or custom seed value
 Enable input provides synchronized operation with other components
General Description
The default use of the Cyclic Redundancy Check (CRC) component is to compute the CRC from
a serial bit stream of any length. The input data is sampled on the rising edge of the data clock.
The CRC value is reset to 0 before starting or can optionally be seeded with an initial value. On
completion of the bitstream, the computed CRC value may be read out.
When to Use a CRC
You can use the default CRC component as a checksum to detect alteration of data during
transmission or storage. CRCs are popular because they are simple to implement in binary
hardware, are easy to analyze mathematically, and are particularly good at detecting common
errors caused by noise in transmission channels.
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document Number: 001-85007 Rev. **
Revised December 10, 2012
Cyclic Redundancy Check (CRC)
PSoC® Creator™ Component Datasheet
Input/Output Connections
This section describes the various input and output connections for the CRC. An asterisk (*) in
the list of I/Os indicates that the I/O may be hidden on the symbol under the conditions listed in
the description of that I/O.
clock – Input
The CRC requires a data input that provides the serial bitstream used to calculate the CRC. A
data clock input is also required in order to correctly sample the serial data input. The input data
is sampled on the rising edge of the data clock.
reset – Input
The reset input defines the signal to synchronous reset the CRC.
enable – Input
The CRC component runs after it is started and as long as the Enable input is held high. This
input provides synchronized operation with other components.
di – Input
Data input that provides the serial bitstream used to calculate the CRC.
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Document Number: 001-85007 Rev. **
PSoC® Creator™ Component Datasheet
Cyclic Redundancy Check (CRC)
Component Parameters
Drag a CRC component onto your design and double click it to open the Configure dialog. This
dialog has several tabs to guide you through the process of setting up the CRC component.
Polynomial Tab
Standard Polynomial
This parameter allows you to choose one of the standard CRC polynomials provided in the
Standard polynomial combo box or generate a custom polynomial. The additional information
about each standard polynomial is given in the tool tip. The default is CRC-16.
Polynomial Name
Polynomial
Use
Custom
User defined
General
CRC-1
x+1
Parity
4
CRC-4-ITU
x +x+1
CRC-5-ITU
x + x + x +1
CRC-5-USB
x +x +1
CRC-6-ITU
x +x+1
CRC-7
x +x +1
CRC-8-ATM
x +x +x+1
CRC-8-CCITT
CRC-8-Maxim
5
4
5
2
ITU G.704
2
ITU G.704
USB
6
ITU G.704
7
3
8
2
8
7
3
8
5
4
Telecom systems, MMC
ATM HEC
2
x +x +x +x +1
x +x +x +1
Document Number: 001-85007 Rev. **
1-Wire bus
1-Wire bus
Page 3 of 20
Cyclic Redundancy Check (CRC)
PSoC® Creator™ Component Datasheet
Polynomial Name
CRC-8
CRC-8-SAE
Polynomial
8
7
6
4
8
4
3
2
Use
2
x +x +x +x +x +1
General
x +x +x +x +1
9
5
SAE J1850
CRC-10
x
10
4
CRC-12
x
12
+x
11
+x +x +x+1
CRC-15-CAN
x
15
+x
14
+x
CRC-16-CCITT
x
16
+x
12
+x +1
CRC-16
x
16
+x
15
+x +1
24
23
18
32
26
23
32
28
27
26
25
32
30
29
28
26
+x +x +x +x+1
3
10
General
2
8
7
Telecom systems
4
3
+x +x +x +x +1
CAN
5
XMODEM,X.25, V.41,
Bluetooth, PPP, IrDA, CRCCCITT
2
USB
+x
17
+x
22
+x
14
+x
16
+x
11
+x
12
+x
10
7
6
5
4
+x +x +x +x +x
3
CRC-24-Radix64
x +x +x
+x+1
CRC-32-IEEE802.3
x +x +x
2
+x +x+1
+x
11
+x
10
+x +x +x +x
CRC-32C
x +x +x +x +x +x +x
13
11
10
9
8
6
x +x +x +x +x +x +1
23
22
+x
20
+x
19
+x
18
+x
14
+
General
CRC-32K
x +x +x +x +x +x +x
10
7
6
4
2
x +x +x +x +x +x+1
20
19
+x
17
+x
16
+x
15
+x
11
+
General
CRC-64-ISO
x
CRC-64-ECMA
x +x +x +x +x +x +x +x +x +x +x +
39
38
37
35
33
32
31
29
27
24
23
x +x +x +x +x +x +x +x +x +x +x +
22
21
19
17
13
12
10
9
7
4
x + x + x + x + x + x + x + x + x + x + x +1
64
64
4
8
7
5
4
3
+x +x +x+1
62
57
55
General
Ethernet, MPEG2
ISO 3309
54
53
52
47
46
45
40
ECMA-182
Polynomial Value
This parameter is represented in hexadecimal format. It is calculated automatically when one of
the standard polynomials is selected. You may also enter it manually (see Custom Polynomials).
Seed Value
This parameter is represented in hexadecimal format. The maximum possible value is 2N – 1.
N
This parameter defines the degree of polynomial. Possible values are 1 to 64 bits. The table with
numbers indicates which degrees are included in the polynomial. Cells with selected numbers
are blue; others are white. The number of active cells is equal to N. Numbers are arranged in
reverse order. You may click on the cell to select or deselect a number.
Polynomial representation
This parameter displays the resulting polynomial in mathematical notation.
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Document Number: 001-85007 Rev. **
PSoC® Creator™ Component Datasheet
Cyclic Redundancy Check (CRC)
Custom Polynomials
You may enter a custom polynomial in three different ways:
Small Changes to Standard Polynomial



Choose one of the standard polynomials.
Select the necessary degrees in the table by clicking on the appropriate cells; the text in
Standard polynomial changes to Custom.
The polynomial value is recalculated automatically based on the polynomial that is
represented.
Use Polynomial Degrees




Enter a custom polynomial in the N textbox; the text in Standard polynomial changes to
Custom.
Select the necessary degrees in the table by clicking on the appropriate cells.
Check the view of the polynomial in Polynomial representation.
The polynomial value is recalculated automatically based on the polynomial that is
represented.
Use Hexadecimal Format



Enter a polynomial value in hexadecimal form in the Polynomial Value text box.
Press [Enter] or switch to another control; the text in Standard polynomial changes to
Custom.
The N value and degrees of polynomial will be recalculated based on the entered polynomial
value.
Document Number: 001-85007 Rev. **
Page 5 of 20
Cyclic Redundancy Check (CRC)
PSoC® Creator™ Component Datasheet
Advanced Tab
Implementation
This parameter defines the implementation of the CRC component: Time Division Multiplex or
Single Cycle. The default is Single Cycle.
Local Parameters (For API use)
These parameters are used in the API and are not exposed in the GUI:




PolyValueLower (uint32) – Contains the lower half of the polynomial value in hexadecimal
format. The default is 0xB8h (LFSR= [8,6,5,4]) because the default resolution is 8.
PolyValueUpper (uint32) – Contains the upper half of the polynomial value in hexadecimal
format. The default is 0x00h because the default resolution is 8.
SeedValueLower (uint32) – Contains the lower half of the seed value in hexadecimal
format. The default is 0xFFh because the default resolution is 8.
SeedValueUpper (uint32) – Contains the upper half of the seed value in hexadecimal
format. The default is 0 because the default resolution is 8.
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Document Number: 001-85007 Rev. **
PSoC® Creator™ Component Datasheet
Cyclic Redundancy Check (CRC)
Clock Selection
There is no internal clock in this component. You must attach a clock source.
Note Generation of the proper CRC sequence for a resolution of greater than eight requires a
clock signal four times greater than the data rate, if you select Time Division Multiplex for the
Implementation parameter.
Application Programming Interface
Application Programming Interface (API) routines allow you to configure the component using
software. The following table lists and describes the interface to each function. The subsequent
sections cover each function in more detail.
By default, PSoC Creator assigns the instance name “CRC_1” to the first instance of a
component in a given design. You can rename it to any unique value that follows the syntactic
rules for identifiers. The instance name becomes the prefix of every global function name,
variable, and constant symbol. For readability, the instance name used in the following table is
“CRC.”
Function
Description
CRC_Start()
Initializes seed and polynomial registers with initial values. Computation of CRC
starts on rising edge of input clock.
CRC_Stop()
Stops CRC computation.
CRC_Wakeup()
Restores the CRC configuration and starts CRC computation on rising edge of
input clock.
CRC_Sleep()
Stops CRC computation and saves the CRC configuration.
CRC_Init()
Initializes the seed and polynomial registers with initial values.
CRC_Enable()
Starts CRC computation on rising edge of input clock.
CRC_SaveConfig()
Saves the seed and polynomial registers.
CRC_RestoreConfig()
Restores the seed and polynomial registers.
CRC_WriteSeed()
Writes the seed value.
CRC_WriteSeedUpper()
Writes the upper half of the seed value. Only generated for 33- to 64-bit CRC.
CRC_WriteSeedLower()
Writes the lower half of the seed value. Only generated for 33- to 64-bit CRC.
CRC_ReadCRC()
Reads the CRC value.
CRC_ReadCRCUpper()
Reads the upper half of the CRC value. Only generated for 33- to 64-bit CRC.
CRC_ReadCRCLower()
Reads the lower half of the CRC value. Only generated for 33- to 64-bit CRC.
CRC_WritePolynomial()
Writes the CRC polynomial value.
СRC_WritePolynomialUpper()
Writes the upper half of the CRC polynomial value. Only generated for 33- to 64bit CRC.
Document Number: 001-85007 Rev. **
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Cyclic Redundancy Check (CRC)
PSoC® Creator™ Component Datasheet
Function
Description
CRC_WritePolynomialLower()
Writes the lower half of the CRC polynomial value. Only generated for 33- to 64bit CRC.
CRC_ReadPolynomial()
Reads the CRC polynomial value.
CRC_ReadPolynomialUpper()
Reads the upper half of the CRC polynomial value. Only generated for 33- to 64bit CRC.
CRC_ReadPolynomialLower()
Reads the lower half of the CRC polynomial value. Only generated for 33- to 64bit CRC.
Global Variables
Variable
CRC_initVar
Description
Indicates whether the CRC has been initialized. The variable is initialized to 0 and set to 1 the
first time CRC_Start() is called. This allows the component to restart without reinitialization after
the first call to the CRC_Start() routine.
If reinitialization of the component is required, then the CRC_Init() function can be called before
the CRC_Start() or CRC_Enable() function.
void CRC_Start(void)
Description:
Initializes seed and polynomial registers with initial values. Computation of CRC starts
on rising edge of input clock.
Parameters:
None
Return Value:
None
Side Effects:
None
void CRC_Stop(void)
Description:
Stops CRC computation.
Parameters:
None
Return Value:
None
Side Effects:
None
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Document Number: 001-85007 Rev. **
PSoC® Creator™ Component Datasheet
Cyclic Redundancy Check (CRC)
void CRC_Sleep(void)
Description:
Stops CRC computation and saves the CRC configuration.
Parameters:
None
Return Value:
None
Side Effects:
None
void CRC_Wakeup(void)
Description:
Restores the CRC configuration and starts CRC computation on the rising edge of the
input clock.
Parameters:
None
Return Value:
None
Side Effects:
None
void CRC_Init(void)
Description:
Initializes the seed and polynomial registers with initial values.
Parameters:
None
Return Value:
None
Side Effects:
None
void CRC_Enable(void)
Description:
Starts CRC computation on the rising edge of the input clock.
Parameters:
None
Return Value:
None
Side Effects:
None
void CRC_SaveConfig(void)
Description:
Saves the initial seed and polynomial registers.
Parameters:
None
Return Value:
None
Side Effects:
None
Document Number: 001-85007 Rev. **
Page 9 of 20
Cyclic Redundancy Check (CRC)
PSoC® Creator™ Component Datasheet
void CRC_RestoreConfig(void)
Description:
Restores the initial seed and polynomial registers.
Parameters:
None
Return Value:
None
Side Effects:
None
void CRC_WriteSeed(uint8/16/32 seed)
Description:
Writes the seed value.
Parameters:
uint8/16/32 seed: Seed value
Return Value:
None
Side Effects:
The seed value is cut according to mask = 2
Resolution
– 1.
For example, if CRC Resolution is 14 bits, the mask value is:
14
mask = 2 – 1 = 0x3FFFu.
The seed value = 0xFFFFu is cut: seed and mask = 0xFFFFu and 0x3FFFu = 0x3FFFu.
void CRC_WriteSeedUpper(uint32 seed)
Description:
Writes the upper half of the seed value. Only generated for 33- to 64-bit CRC.
Parameters:
uint32 seed: Upper half of the seed value
Return Value:
None
Side Effects:
The upper half of the seed value is cut according to mask = 2
Resolution – 32
– 1.
For example, if CRC Resolution is 35 bits, the mask value is:
2
(35 – 32)
3
– 1 = 2 – 1 = 0x0000 0007u.
The upper half of the seed value = 0x0000 00FFu is cut:
upper half of seed and mask = 0x0000 00FFu and 0x0000 0007u = 0x0000 0007u.
void CRC_WriteSeedLower(uint32 seed)
Description:
Writes the lower half of the seed value. Only generated for 33- to 64-bit CRC.
Parameters:
uint32 seed: Lower half of the seed value
Return Value:
None
Side Effects:
None
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Document Number: 001-85007 Rev. **
PSoC® Creator™ Component Datasheet
Cyclic Redundancy Check (CRC)
uint8/16/32 CRC_ReadCRC(void)
Description:
Reads the CRC value.
Parameters:
None
Return Value:
uint8/16/32: Returns the CRC value
Side Effects:
None
uint32 CRC_ReadCRCUpper(void)
Description:
Reads the upper half of the CRC value. Only generated for 33- to 64-bit CRC.
Parameters:
None
Return Value:
uint32: Returns the upper half of the CRC value
Side Effects:
None
uint32 CRC_ReadCRCLower(void)
Description:
Reads the lower half of the CRC value. Only generated for 33- to 64-bit CRC.
Parameters:
None
Return Value:
uint32: Returns the lower half of the CRC value
Side Effects:
None
void CRC_WritePolynomial(uint8/16/32 polynomial)
Description:
Writes the CRC polynomial value.
Parameters:
uint8/16/32 polynomial: CRC polynomial
Return Value:
None
Side Effects:
The polynomial value is cut according to mask = 2
– 1. For example, if CRC
14
Resolution is 14 bits, the mask value is: mask = 2 – 1 = 0x3FFFu.
Resolution
The polynomial value = 0xFFFFu is cut:
polynomial and mask = 0xFFFFu and 0x3FFFu = 0x3FFFu.
Document Number: 001-85007 Rev. **
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Cyclic Redundancy Check (CRC)
PSoC® Creator™ Component Datasheet
void СRC_WritePolynomialUpper(uint32 polynomial)
Description:
Writes the upper half of the CRC polynomial value. Only generated for 33- to 64-bit
CRC.
Parameters:
uint32 polynomial: Upper half of the CRC polynomial value
Return Value:
None
Side Effects:
The upper half of the polynomial value is cut according to mask = 2
example, if CRC Resolution is 35 bits, the mask value is:
2
(35 – 32)
(Resolution – 32)
– 1. For
3
– 1 = 2 – 1 = 0x0000 0007u.
The upper half of the polynomial value = 0x0000 00FFu is cut:
upper half of polynomial and mask = 0x0000 00FFu and 0x0000 0007u = 0x0000
0007u.
void CRC_WritePolynomialLower(uint32 polynomial)
Description:
Writes the lower half of the CRC polynomial value. Only generated for 33- to 64-bit
CRC.
Parameters:
uint32 polynomial: Lower half of the CRC polynomial value
Return Value:
None
Side Effects:
None
uint8/16/32 CRC_ReadPolynomial(void)
Description:
Reads the CRC polynomial value.
Parameters:
None
Return Value:
uint8/16/32: Returns the CRC polynomial value
Side Effects:
None
uint32 CRC_ReadPolynomialUpper(void)
Description:
Reads the upper half of the CRC polynomial value. Only generated for 33- to 64-bit
CRC.
Parameters:
None
Return Value:
uint32: Returns the upper half of the CRC polynomial value
Side Effects:
None
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Document Number: 001-85007 Rev. **
PSoC® Creator™ Component Datasheet
Cyclic Redundancy Check (CRC)
uint32 CRC_ReadPolynomialLower(void)
Description:
Reads the lower half of the CRC polynomial value. Only generated for 33- to 64-bit
CRC.
Parameters:
None
Return Value:
uint32: Returns the lower half of the CRC polynomial value.
Side Effects:
None
MISRA Compliance
This section describes the MISRA-C:2004 compliance and deviations for the component. There
are two types of deviations defined:


project deviations – deviations that are applicable for all PSoC Creator components
specific deviations – deviations that are applicable only for this component
This section provides information on component-specific deviations. Project deviations are
described in the MISRA Compliance section of the System Reference Guide along with
information on the MISRA compliance verification environment.
The CRC component has the following specific deviations:
MISRAC:2004
Rule
Rule Class
(Required/
Advisory)
Rule Description
Description of Deviation(s)
14.3
R
Before preprocessing, a null statement shall
only occur on a line by itself; it may be
followed by a comment provided that the first
character following the null statement is a
white-space character.
Deviation is caused by using a macro that
has a group of statements contained
within curly braces. The macro is
CRC_EXECUTE_DFF_RESET. A MISRA
compliant implementation would require
the use of this macro to be followed by a
semicolon. This could introduce failures in
designs that used this macro directly.
19.4
R
C macros shall only expand to a braced
initializer, a constant, a parenthesized
expression, a type qualifier, a storage class
specifier, or a do-while-zero construct.
Deviation is caused by using a macro that
has a group of statements contained
within curly braces. The macro is
CRC_EXECUTE_DFF_RESET. A MISRA
compliant implementation would require
the use of this macro to be followed by a
semicolon. This could introduce failures in
designs that used this macro directly.
19.7
A
A function should be used in preference to a
function-like macro.
Deviation is caused by the macro
CRC_IS_CRC_ENABLE. If removed this
would introduce failures in designs that
used this macro directly.
Document Number: 001-85007 Rev. **
Page 13 of 20
Cyclic Redundancy Check (CRC)
PSoC® Creator™ Component Datasheet
Sample Firmware Source Code
PSoC Creator provides many example projects that include schematics and example code in the
Find Example Project dialog. For component-specific examples, open the dialog from the
Component Catalog or an instance of the component in a schematic. For general examples,
open the dialog from the Start Page or File menu. As needed, use the Filter Options in the
dialog to narrow the list of projects available to select.
Refer to the “Find Example Project” topic in the PSoC Creator Help for more information.
Functional Description
The CRC is implemented as a linear feedback shift register (LFSR). The shift register computes
the LFSR function, the polynomial register holds the polynomial that defines the LFSR
polynomial, and the seed register enables initialization of the starting data.
The seed and polynomial registers must be initialized before starting the component.
Computation of an N-bit LFSR result is specified by a polynomial with N + 1 terms, the last of
which is the X0 term where X0 = 1. For example, the widely used CRC-CCITT 16-bit polynomial is
X16 + X12 + X5 + 1. The CRC algorithm assumes the presence of the X0 term, so that the
polynomial for an N-bit result can be expressed by an N bit rather than (N + 1)-bit specification.
To specify the polynomial specification, write an (N + 1)-bit binary number corresponding to the
full polynomial, with 1s for each term present. The CRC-CCITT polynomial would be
10001000000100001b. Then, drop the right-most bit (the X0 term) to obtain the CRC polynomial
value. To implement the CRC-CCITT example, the polynomial register is loaded with a value of
8810h.
A rising edge of the input clock shifts each bit of the input data stream, MSB first, through the
shift register, computing the specified CRC algorithm. Eight clocks are required to compute the
CRC for each byte of input data.
Note that the initial seed value is lost. This is usually of no consequence because the seed value
is only used to initialize the Shift register once, for each data set.
Block Diagram and Configuration
Polynomial
Register
XN
XN-1
XN-2
X2
X1
N-1
N-2
N-3
1
0
Shift / Seed
Register
N-1
Page 14 of 20
N-2
2
1
0
Input
Data
Document Number: 001-85007 Rev. **
PSoC® Creator™ Component Datasheet
Cyclic Redundancy Check (CRC)
Timing Diagrams
clock
Figure 1. Time Division Multiplex Implementation Mode
reset
time
enable
time
di
time
time
CRC Calculated Values
clock
Figure 2. Single Cycle Implementation Mode
reset
time
enable
time
di
time
time
CRC Calculated Values
Document Number: 001-85007 Rev. **
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Cyclic Redundancy Check (CRC)
PSoC® Creator™ Component Datasheet
Resources
The CRC component is placed throughout the UDB array. The component utilizes the following
resources.
Resource Type
Configuration
Datapath
Cells
Macrocel
ls
Status
Cells
Control
Cells
DMA
Channels
Interrupts
8-Bits Single Cycle
1
3
–
1
–
–
16-Bits Single Cycle
2
3
–
1
–
–
24-Bits Single Cycle
3
3
–
1
–
–
32-Bits Single Cycle
4
3
–
1
–
–
16-Bits Time Division
1
9
–
1
–
–
24-Bits Time Division
2
10
–
1
–
–
32-Bits Time Division
2
9
–
1
–
–
40-Bits Time Division
3
10
–
1
–
–
48-Bits Time Division
3
9
–
1
–
–
56-Bits Time Division
4
10
–
1
–
–
64-Bits Time Division
4
9
–
1
–
–
API Memory Usage
The component memory usage varies significantly, depending on the compiler, device, number
of APIs used and component configuration. The following table provides the memory usage for
all APIs available in the given component configuration.
The measurements have been done with the associated compiler configured in Release mode
with optimization set for Size. For a specific design the map file generated by the compiler can
be analyzed to determine the memory usage.
PSoC 3 (Keil_PK51)
Configuration
PSoC 5 (GCC)
PSoC 5LP (GCC)
Flash
SRAM
Flash
SRAM
Flash
SRAM
Bytes
Bytes
Bytes
Bytes
Bytes
Bytes
8-Bits Single Cycle
156
2
288
5
246
5
16-Bits Single Cycle
210
2
302
5
260
5
24-Bits Single Cycle
287
2
336
9
294
5
32-Bits Single Cycle
288
2
324
9
282
5
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Document Number: 001-85007 Rev. **
PSoC® Creator™ Component Datasheet
Cyclic Redundancy Check (CRC)
PSoC 3 (Keil_PK51)
Configuration
PSoC 5 (GCC)
PSoC 5LP (GCC)
Flash
SRAM
Flash
SRAM
Flash
SRAM
Bytes
Bytes
Bytes
Bytes
Bytes
Bytes
16-Bits Time Division
242
2
362
5
320
5
24-Bits Time Division
536
2
440
9
398
5
32-Bits Time Division
619
2
476
9
434
5
40-Bits Time Division
764
2
626
13
580
5
48-Bits Time Division
895
2
692
13
638
5
56-Bits Time Division
996
2
756
13
702
5
64-Bits Time Division
1099
2
772
13
718
5
DC and AC Electrical Characteristics
Specifications are valid for –40 °C ≤ TA ≤ 85 °C and TJ ≤ 100 °C, except where noted.
Specifications are valid for 1.71 V to 5.5 V, except where noted.
DC Characteristics
Parameter
IDD
Description
Min
Typ
[1]
Max
Units
Component current consumption
8-Bits Single Cycle
–
10
–
µA/MHz
16-Bits Single Cycle
–
16
–
µA/MHz
24-Bits Single Cycle
–
26
–
µA/MHz
32-Bits Single Cycle
–
33
–
µA/MHz
16-Bits Time Division
–
17
–
µA/MHz
24-Bits Time Division
–
29
–
µA/MHz
32-Bits Time Division
–
29
–
µA/MHz
40-Bits Time Division
–
35
–
µA/MHz
48-Bits Time Division
–
35
–
µA/MHz
56-Bits Time Division
–
43
–
µA/MHz
64-Bits Time Division
–
44
–
µA/MHz
1. Device IO and clock distribution current not included. The values are at 25 °C.
Document Number: 001-85007 Rev. **
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Cyclic Redundancy Check (CRC)
PSoC® Creator™ Component Datasheet
AC Characteristics
Parameter
fCLOCK
Description
Min
Typ
8-Bits Single Cycle
–
16-Bits Single Cycle
[2]
Max
Units
–
41
MHz
–
–
32
MHz
24-Bits Single Cycle
–
–
30
MHz
32-Bits Single Cycle
–
–
28
MHz
16-Bits Time Division
–
–
34
MHz
24-Bits Time Division
–
–
24
MHz
32-Bits Time Division
–
–
29
MHz
40-Bits Time Division
–
–
24
MHz
48-Bits Time Division
–
–
27
MHz
56-Bits Time Division
–
–
23
MHz
64-Bits Time Division
–
–
28
MHz
Component clock frequency
2. The values provide a maximum safe operating frequency of the component. The component may run at higher clock
frequencies, at which point you will need to validate the timing requirements with STA results.
Component Changes
This section lists the major changes in the component from the previous version.
Version
2.30
Description of Changes
Added MISRA Compliance section.
Reason for Changes / Impact
The component has specific deviations described.
Added PSoC 4A support
Changed Timing Diagrams
2.20
Added PSoC 5LP support
2.10
Changed error messages and their appearance for
implementation parameter.
Fixed setting polynomial degree 'N' to 64-bit
resolution.
Fixed polynomial value validation.
2.0.b
Minor datasheet edits and updates
2.0.a
Added characterization data to datasheet
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Document Number: 001-85007 Rev. **
PSoC® Creator™ Component Datasheet
Version
Description of Changes
Cyclic Redundancy Check (CRC)
Reason for Changes / Impact
Minor datasheet edits and updates
2.0
1.20
Added support for PSoC 3 ES3 silicon. Changes
include:

4x clock for Time Division Multiplex
Implementation added

Single Cycle Implementation on 1x clock now
available for 1 to 32 bits.

Time Division Multiplex Implementation on 4x
clock now available for 9 to 64 bits.

Asynchronous input signal reset is added.

Synchronous input signal enable is added.

Added new 'Advanced' page to the Configure
dialog for the Implementation (Time Division
Multiplex, Single Cycle) parameter
New requirements to support the PSoC 3 ES3
device, thus a new 2.0 version of the CRC
component was created.
Added CRC_Sleep()/CRC_Wakeup() and
CRC_Init()/CRC_Enable() APIs.
To support low-power modes, as well as to
provide common interfaces to separate control of
initialization and enabling of most components.
Updated functions CRC_WriteSeed() and
CRC_WriteSeedUpper().
The mask parameter was used to cut the seed
value to define CRC resolution while writing.
Add validator to Resolution parameter.
The resolution of CRC is 1 to 64 bits. The validator
was added to restrict input values.
Add reset DFF triggers to polynomial write
functions: CRC_WritePolynomial(),
CRC_WritePolynomialUpper() and
CRC_WritePolynomialLower().
The DFF triggers need to be set in proper state
(most significant bit of polynomial, always 1)
before CRC calculation starts. To meet this
condition, any write to the Seed or Polynomial
registers resets the DFF triggers.
Updated Configure dialog to allow the Expression
View for the following parameters:
'PolyValueLower', 'PolyValueUpper',
'SeedValueLower', 'SeedValueLower'
Expression View is used to directly access the
symbol parameters. This view allows you to
connect component parameters with external
parameters, if desired.
Updated Configure dialog to add error icons for
various parameters.
If you enter an incorrect value in a text box, the
error icon displays with a tool tip of the problem
description. This provides easier use than a
separate error message.
Changed method of API generation. In version 1.10, This change allows users to view and make
APIs were generated by settings from the
changes to the generated API files, and they will
customizer. For 1.20, APIs are provided by the .c
not be overwritten on subsequent builds.
and .h files like most other components.
Seed and Polynomial parameters were changed to
have hexadecimal representation.
Document Number: 001-85007 Rev. **
Change was made to comply with corporate
standard.
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Cyclic Redundancy Check (CRC)
PSoC® Creator™ Component Datasheet
© Cypress Semiconductor Corporation, 2009-2012. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the
use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to
be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
PSoC® is a registered trademark, and PSoC® Creator™ and Programmable System-on-Chip™ are trademarks of Cypress Semiconductor Corp. All other trademarks or registered trademarks
referenced herein are property of the respective corporations.
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derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in
conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as
specified above is prohibited without the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A HALFICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein.
Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in lifesupport systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application
implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
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Document Number: 001-85007 Rev. **
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