PHILIPS TDA1519CJ

INTEGRATED CIRCUITS
DATA SHEET
TDA1519C
22 W BTL or 2  11 W
stereo power amplifier
Product specification
Supersedes data of 2001 Aug 24
2004 Jan 28
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
FEATURES
GENERAL DESCRIPTION
 Requires very few external components for Bridge-Tied
Load (BTL) operation
The TDA1519C is an integrated class-B dual output
amplifier in a 9-lead plastic single in-line power package or
20-lead heatsink small outline package.
 Stereo or BTL application
 High output power
For the TDA1519CTH (SOT418-3), the heatsink is
positioned on top of the package, which allows an external
heatsink to be mounted on top. The heatsink of the
TDA1519CTD (SOT397-1) is facing the PCB, allowing the
heatsink to be soldered onto the copper area of the PCB.
 Low offset voltage at output (important for BTL
applications)
 Fixed gain
 Good ripple rejection
 Mute/standby switch
 Load dump protection
 AC and DC short-circuit safe to ground and VP
 Thermally protected
 Reverse polarity safe
 Capability to handle high energy on outputs (VP = 0 V)
 No switch-on/switch-off plops
 Protected against electrostatic discharge
 Low thermal resistance
 Identical inputs (inverting and non-inverting)
 Pin compatible with TDA1519B (TDA1519C and
TDA1519CSP).
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
TDA1519C
SIL9P
DESCRIPTION
VERSION
plastic single in-line power package; 9 leads
SOT131-2
TDA1519CSP
SMS9P
plastic surface mounted single in-line power package; 9 leads
SOT354-1
TDA1519CTD
HSOP20
plastic, heatsink small outline package; 20 leads
SOT397-1
TDA1519CTH
HSOP20
plastic, heatsink small outline package; 20 leads; low stand-off height
SOT418-3
2004 Jan 28
2
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VP
supply voltage
operating
6.0
14.4
17.5
V
non-operating


30
V
load dump protected


45
V
4
A
IORM
repetitive peak output current


Iq(tot)
total quiescent current

40
80
mA
Istb
standby current

0.1
100
A
Isw(on)
switch-on current


40
A
BTL
25


k
stereo
50


k

6

W
Inputs
Zi
input impedance
Stereo application
Po
output power
THD = 10 %
RL = 4 

11

W
cs
channel separation
RL = 2 
40


dB
Vn(o)(rms)
noise output voltage (RMS value)

150

V

22

W
fi = 100 Hz
34


dB
fi = 1 to 10 kHz
48


dB
BTL application
Po
output power
THD = 10 %; RL = 4 
SVRR
supply voltage ripple rejection
RS = 0 
VOO
DC output offset voltage


250
mV
Tj
junction temperature


150
C
2004 Jan 28
3
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
BLOCK DIAGRAM
NINV
mute switch
1
Cm
60
kW
VA
4
OUT1
183
W
power stage
18.1 kW
VP
8
+
standby
switch
-
M/SS
standby
reference
voltage
VA
15 kW
+
+
-
×1
RR
3
15 kW
mute
reference
voltage
mute
switch
TDA1519C
TDA1519CSP
18.1 kW
power stage
183
W
6
VA
INV
OUT2
9
Cm
60
kW
input
reference
voltage
mute switch
power
ground
(substrate)
signal
ground
2
7
GND1
VP
5
mgl491
GND2
The pin numbers refer to the TDA1519C and TDA1519CSP only, for TDA1519CTD and TDA1519CTH see Figs 3 and 4.
Fig.1 Block diagram.
2004 Jan 28
4
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
PINNING
PIN
SYMBOL
DESCRIPTION
TDA1519C;
TDA1519CSP
TDA1519CTD
TDA1519CTH
1
19
19
GND1
2
20
20
ground 1 (signal)
RR
3
1
1
supply voltage ripple rejection
OUT1
4
3
3
output 1
NINV
non-inverting input
GND2
5
5
5
ground 2 (substrate)
OUT2
6
8
8
output 2
VP
7
10
10
positive supply voltage
M/SS
8
11
11
mute/standby switch input
INV
9
12
12
inverting input
n.c.

2, 4, 6, 7, 9 and 13 to 18 2, 4, 6, 7, 9 and 13 to 18 not connected
NINV 1
RR 1
20 GND1
GND1 2
n.c. 2
19 NINV
RR 3
OUT1 3
18 n.c.
OUT1 4
n.c. 4
17 n.c.
TDA1519C
GND2 5
TDA1519CSP
16 n.c.
GND2 5
GND1 20
1
RR
NINV 19
2
n.c.
n.c. 18
3
OUT1
n.c. 17
4
n.c.
n.c. 16
5
GND2
6
n.c.
n.c. 15
TDA1519CTD
TDA1519CTH
OUT2 6
n.c. 6
15 n.c.
n.c. 14
7
n.c.
VP 7
n.c. 7
14 n.c.
n.c. 13
8
OUT2
INV 12
9
n.c.
M/SS 8
OUT2 8
13 n.c.
INV 9
n.c. 9
12 INV
VP 10
11 M/SS
mgr561
M/SS 11
10 VP
001aaa348
mgl937
Fig.2
Pin configuration
TDA1519C and
TDA1519CSP.
2004 Jan 28
Fig.3
Pin configuration
TDA1519CTD.
5
Fig.4
Pin configuration
TDA1519CTH.
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
 Low standby current (<100 A)
FUNCTIONAL DESCRIPTION
 Low mute/standby switching current (allows for low-cost
supply switch)
The TDA1519C contains two identical amplifiers with
differential input stages. The gain of each amplifier is fixed
at 40 dB. A special feature of this device is the
mute/standby switch which has the following features:
 Mute condition.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
VP
PARAMETER
CONDITIONS
supply voltage

operating
Vsc
AC and DC short-circuit-safe voltage
Vrp
reverse polarity voltage
Eo
energy handling capability at outputs
IOSM
non-repetitive peak output current
IORM
repetitive peak output current
Ptot
total power dissipation
Tj
Tstg
MAX.
17.5
UNIT
V
non-operating

30
V
load dump protected;
during 50 ms; tr  2.5 ms

45
V

17.5
V
VP = 0 V

6
V

200
mJ

6
A

4
A

25
W
junction temperature

150
C
storage temperature
55
+150
C
see Fig.5
mgl492
30
(1)
Ptot
(W)
20
(2)
10
(3)
0
-25
0
50
100
150
Tamb (°C)
(1) Infinite heatsink.
(2) Rth(c-a) = 5 K/W.
(3) Rth(c-a) = 13 K/W.
Fig.5 Power derating curve for TDA1519C.
2004 Jan 28
MIN.
6
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient;
in free air
TDA1519C, TDA1519CTH and TDA1519CTD
40
K/W
Rth(j-c)
thermal resistance from junction to case;
TDA1519C, TDA1519CTH and TDA1519CTD
3
K/W
DC CHARACTERISTICS
VP = 14.4 V; Tamb = 25 C; measured in circuit of Fig.6; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VP
supply voltage
Iq(tot)
total quiescent current
VO
DC output voltage
VOO
DC output offset voltage
note 1
note 2
6.0
14.4
17.5
V

40
80
mA

6.95

V


250
mV
Mute/standby switch
Vsw(on)
switch-on voltage level
8.5


V
Vmute
mute voltage level
3.3

6.4
V
Vstb
standby voltage level
0

2
V
mV
Mute/standby condition
Vo
output voltage
mute mode; Vi = 1 V (maximum);
fi = 20 Hz to 15 kHz


20
VOO
DC output offset voltage
mute mode


250
mV
Istb
standby current
standby mode


100
A
Isw(on)
switch-on current

12
40
A
Notes
1. The circuit is DC adjusted at VP = 6 to 17.5 V and AC operating at VP = 8.5 to 17.5 V.
2. At VP = 17.5 to 30 V, the DC output voltage is 0.5VP.
2004 Jan 28
7
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
AC CHARACTERISTICS
VP = 14.4 V; RL = 4 ; f = 1 kHz; Tamb = 25 C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Stereo application (see Fig.6)
Po
output power
note 1
THD = 0.5 %
4
5

W
THD = 10 %
5.5
6.0

W
7.5
8.5

W
RL = 2 ; note 1
THD = 0.5 %
10
11

W
THD
total harmonic distortion
Po = 1 W

0.1

%
fro(l)
low frequency roll-off
3 dB; note 2

45

Hz
fro(h)
high frequency roll-off
1 dB
Gv(cl)
closed-loop voltage gain
SVRR
supply voltage ripple rejection
THD = 10 %
Zi
input impedance
Vn(o)(rms)
noise output voltage (RMS value)
20


kHz
39
40
41
dB
40


dB
on; notes 3 and 5
45


dB
mute; notes 3 and 6
45


dB
standby; notes 3
and 6
80


dB
50
60
75
k

150

V
on; notes 3 and 4
note 7
on; RS = 0 
cs
channel separation
Gv(ub)
channel unbalance
on; RS = 10 k

250
500
V
mute; note 8

120

V
40


dB

0.1
1
dB
THD = 0.5 %
15
17

W
THD = 10 %
20
22

W
THD = 0.5 %

13

W
THD = 10 %

17.5

W
RS = 10 k
BTL application (see Fig.7)
Po
output power
note 1
VP = 13.2 V; note 1
THD
total harmonic distortion
Po = 1 W

0.1

%
Bp
power bandwidth
THD = 0.5 %;
Po = 1 dB; with
respect to 15 W

35 to 15000

Hz
fro(l)
low frequency roll-off
1 dB; note 2

45

Hz
fro(h)
high frequency roll-off
1 dB
20


kHz
Gv(cl)
closed-loop voltage gain
45
46
47
dB
2004 Jan 28
8
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
SYMBOL
SVRR
TDA1519C
PARAMETER
supply voltage ripple rejection
Zi
input impedance
Vn(o)(rms)
noise output voltage (RMS value)
CONDITIONS
MIN.
TYP.
MAX.
UNIT
34


dB
on; notes 3 and 5
48


dB
mute; notes 3 and 6
48


dB
standby;
notes 3 and 6
80


dB
25
30
38
k

200

V
on; notes 3 and 4
note 7
on; RS = 0 
on; RS = 10 k

350
700
V
mute; note 8

180

V
Notes
1. Output power is measured directly at the output pins of the device.
2. Frequency response externally fixed.
3. Ripple rejection measured at the output with a source impedance of 0  (maximum ripple amplitude of 2 V).
4. Frequency f = 100 Hz.
5. Frequency between 1 and 10 kHz.
6. Frequency between 100 Hz and 10 kHz.
7. Noise voltage measured in a bandwidth of 20 Hz to 20 kHz.
8. Noise output voltage independent of RS (Vi = 0 V).
2004 Jan 28
9
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
APPLICATION INFORMATION
standby switch
VP
100 µF
3
input
reference
voltage
40 dB
+
60 kW
220 nF
non-inverting input
1
2
5
8
100
nF
7
2200
µF
internal
1/2 VP
TDA1519C
4
+
40 dB
-
60 kW
9
220 nF
inverting input
6
mgl493
signal
ground
power
ground
1000
µF
Fig.6 Stereo application diagram (TDA1519C).
standby switch
VP
3
input
reference
voltage
40 dB
+
60 kW
220 nF
non-inverting input
to pin 9
1
2
5
8
100
nF
7
internal
1/2 VP
TDA1519C
4
+
40 dB
-
60 kW
9
to pin 1
6
mgl494
signal
ground
power
ground
RL = 4 W
Fig.7 BTL application diagram (TDA1519C).
2004 Jan 28
10
2200
µF
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
mgr539
60
Iq(tot)
(mA)
50
40
30
0
4
8
12
16
20
VP (V)
Fig.8 Total quiescent current as a function of the supply voltage.
mgr540
30
Po
(W)
20
THD = 10%
10
0.5%
0
0
4
8
12
16
20
VP (V)
BTL application.
RL = 4 .
fi = 1 kHz.
Fig.9 Output power as a function of the supply voltage.
2004 Jan 28
11
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
mgr541
12
THD
(%)
8
4
0
10-1
1
10
Po (W)
102
BTL application.
RL = 4 .
fi = 1 kHz.
Fig.10 Total harmonic distortion as a function of the output power.
mgu377
0.6
THD
(%)
0.4
0.2
0
10
102
103
fi (Hz)
104
BTL application.
RL = 4 .
Po = 1 W.
Fig.11 Total harmonic distortion as a function of the operating frequency.
2004 Jan 28
12
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
PACKAGE OUTLINES
SIL9P: plastic single in-line power package; 9 leads
SOT131-2
non-concave
Dh
x
D
Eh
view B: mounting base side
d
A2
seating plane
B
E
j
A1
b
L
c
1
9
e
Z
Q
w M
bp
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A1
max.
A2
b
max.
bp
c
D (1)
d
Dh
E (1)
e
Eh
j
L
Q
w
x
Z (1)
mm
2
4.6
4.4
1.1
0.75
0.60
0.48
0.38
24.0
23.6
20.0
19.6
10
12.2
11.8
2.54
6
3.4
3.1
17.2
16.5
2.1
1.8
0.25
0.03
2.00
1.45
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
ISSUE DATE
99-12-17
03-03-12
SOT131-2
2004 Jan 28
EUROPEAN
PROJECTION
13
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
SMS9P: plastic surface-mounted single in-line power package; 9 leads
SOT354-1
D
y
d
non-concave
heatsink
A2
Dh
x
heatsink
Eh
j
E
Q
A1
L
Lp c
9
1
e
Z
θ
w M
bp
(A3)
A
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
A2
A3
bp
c
mm
4.9
4.2
0.35
0.05
4.6
4.4
0.25
0.75
0.60
0.48
0.38
D(1)
d
24.0 20.0
23.6 19.6
Dh
E(1)
10
12.2
2.54
11.8
e
Eh
j
L
Lp
Q
w
x
y
Z(1)
θ
6
3.4
3.1
7.4
6.6
3.4
2.8
2.1
1.9
0.25
0.03
0.15
2.00
1.45
3°
0°
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
ISSUE DATE
03-03-12
06-03-16
SOT354-1
2004 Jan 28
EUROPEAN
PROJECTION
14
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
HSOP20: plastic, heatsink small outline package; 20 leads
SOT397-1
A
E
D
E2
X
c
y
HE
v
A
D1
D2
11
20
Q
A2
E1
A
pin 1 index
(A3)
A1
A4
θ
Lp
1
10
detail X
Z
w
bp
e
θ
8°
0
5
mm
max
nom
min
0°
scale
Dimensions
Unit(1)
10 mm
A
A1
A2
0.3
3.5
3.6
A3
A4
0.1
bp
c
D(1)
D1
0.53 0.32 16.0 13.0
D2
E(1)
E1
E2
1.1
11.1
6.2
2.9
3.2
HE
Lp
Q
14.5
1.1
1.5
1.27
0.35
0.1
e
0.0
0.40 0.23 15.8 12.6
0.9
10.9
5.8
2.5
Outline
version
IEC
JEDEC
JEITA
y
13.9
0.8
15
z
2.5
0.1
2.0
1.4
sot397-1_po
European
projection
Issue date
03-07-23
10-10-21
SOT397-1
2004 Jan 28
w
0.25 0.25
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
References
v
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
HSOP20: plastic, heatsink small outline package; 20 leads; low stand-off height
SOT418-3
E
D
A
x
X
c
E2
y
HE
v M A
D1
D2
10
1
pin 1 index
Q
A
A2
E1
(A3)
A4
θ
Lp
detail X
20
11
Z
w M
bp
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
A2
max.
3.5
3.5
3.2
A3
0.35
A4(1)
D1
D2
E(2)
E1
E2
e
HE
Lp
Q
+0.08 0.53 0.32 16.0 13.0
−0.04 0.40 0.23 15.8 12.6
1.1
0.9
11.1
10.9
6.2
5.8
2.9
2.5
1.27
14.5
13.9
1.1
0.8
1.7
1.5
bp
c
D(2)
v
w
x
y
0.25 0.25 0.03 0.07
Z
θ
2.5
2.0
8°
0°
Notes
1. Limits per individual lead.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
ISSUE DATE
02-02-12
03-07-23
SOT418-3
2004 Jan 28
EUROPEAN
PROJECTION
16
NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
cooling) vary between 100 and 200 seconds depending
on heating method.
SOLDERING
Introduction
Typical reflow peak temperatures range from
215 to 270 C depending on solder paste material. The
top-surface temperature of the packages should
preferably be kept:
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
 below 225 C (SnPb process) or below 245 C (Pb-free
process)
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mount components are mixed on
one printed-circuit board. Wave soldering can still be used
for certain surface mount ICs, but it is not suitable for fine
pitch SMDs. In these situations reflow soldering is
recommended. Driven by legislation and environmental
forces the worldwide use of lead-free solder pastes is
increasing.
– for all the BGA, HTSSON..T and SSOP-T packages
– for packages with a thickness Š 2.5 mm
– for packages with a thickness < 2.5 mm and a volume
 350 mm3 so called thick/large packages.
 below 240 C (SnPb process) or below 260 C (Pb-free
process) for packages with a thickness < 2.5 mm and a
volume < 350 mm3 so called small/thin packages.
Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.
Through-hole mount packages
SOLDERING BY DIPPING OR BY SOLDER WAVE
Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250 C or 265 C, depending on solder
material applied, SnPb or Pb-free respectively.
WAVE SOLDERING
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
The total contact time of successive solder waves must not
exceed 5 seconds.
To overcome these problems the double-wave soldering
method was specifically developed.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
If wave soldering is used the following conditions must be
observed for optimal results:
 Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
MANUAL SOLDERING
 For packages with leads on two sides and a pitch (e):
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 C, contact may be up to 5 seconds.
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Surface mount packages
The footprint must incorporate solder thieves at the
downstream end.
REFLOW SOLDERING
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
 For packages with leads on four sides, the footprint must
be placed at a 45 angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
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NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
dispensing. The package can be soldered after the adhesive is cured.
Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 C or 265 C, depending on solder material
applied, SnPb or Pb-free respectively.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
MANUAL SOLDERING
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron
applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated
tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
Suitability of IC packages for wave, reflow and dipping soldering methods
SOLDERING METHOD
PACKAGE(1)
MOUNTING
WAVE
Through-hole mount CPGA, HCPGA
suitable
REFLOW(2) DIPPING

suitable
DBS, DIP, HDIP, RDBS, SDIP, SIL
suitable(3)


Through-holesurface mount
PMFP(4)
not suitable
not suitable

Surface mount
BGA, HTSSON..T(5), LBGA, LFBGA, SQFP,
SSOP-T(5), TFBGA, USON, VFBGA
not suitable
suitable

DHVQFN, HBCC, HBGA, HLQFP, HSO,
HSOP, HSQFP, HSSON, HTQFP, HTSSOP,
HVQFN, HVSON, SMS
not suitable(6)
suitable

PLCC(7), SO, SOJ
suitable
suitable

suitable

not
recommended(7)(8)
SSOP, TSSOP, VSO, VSSOP
not
recommended(9)
CWQCCN..L(11), PMFP(10), WQCCN32L(11)
not suitable
LQFP, QFP, TQFP
suitable

not suitable

Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your NXP Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
3. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
4. Hot bar soldering or manual soldering is suitable for PMFP packages.
5. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217 C  10 C measured in the atmosphere of the reflow oven. The package body peak temperature
must be kept as low as possible.
6. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
7. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
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NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
8. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
9. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
10. Hot bar or manual soldering is suitable for PMFP packages.
11. Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted
on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar
soldering process. The appropriate soldering profile can be provided on request.
2004 Jan 28
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NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
DATA SHEET STATUS
DOCUMENT
STATUS(1)
PRODUCT
STATUS(2)
DEFINITION
Objective data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary data sheet
Qualification
This document contains data from the preliminary specification.
Product data sheet
Production
This document contains the product specification.
Notes
1. Please consult the most recently issued document before initiating or completing a design.
2. The product status of device(s) described in this document may have changed since this document was published
and may differ in case of multiple devices. The latest product status information is available on the Internet at
URL http://www.nxp.com.
Right to make changes  NXP Semiconductors
reserves the right to make changes to information
published in this document, including without limitation
specifications and product descriptions, at any time and
without notice. This document supersedes and replaces all
information supplied prior to the publication hereof.
DEFINITIONS
Product specification  The information and data
provided in a Product data sheet shall define the
specification of the product as agreed between NXP
Semiconductors and its customer, unless NXP
Semiconductors and customer have explicitly agreed
otherwise in writing. In no event however, shall an
agreement be valid in which the NXP Semiconductors
product is deemed to offer functions and qualities beyond
those described in the Product data sheet.
Suitability for use  NXP Semiconductors products are
not designed, authorized or warranted to be suitable for
use in life support, life-critical or safety-critical systems or
equipment, nor in applications where failure or malfunction
of an NXP Semiconductors product can reasonably be
expected to result in personal injury, death or severe
property or environmental damage. NXP Semiconductors
accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at
the customer’s own risk.
DISCLAIMERS
Limited warranty and liability  Information in this
document is believed to be accurate and reliable.
However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to
the accuracy or completeness of such information and
shall have no liability for the consequences of use of such
information.
Applications  Applications that are described herein for
any of these products are for illustrative purposes only.
NXP Semiconductors makes no representation or
warranty that such applications will be suitable for the
specified use without further testing or modification.
In no event shall NXP Semiconductors be liable for any
indirect, incidental, punitive, special or consequential
damages (including - without limitation - lost profits, lost
savings, business interruption, costs related to the
removal or replacement of any products or rework
charges) whether or not such damages are based on tort
(including negligence), warranty, breach of contract or any
other legal theory.
Customers are responsible for the design and operation of
their applications and products using NXP
Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or
customer product design. It is customer’s sole
responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as
for the planned application and use of customer’s third
party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks
associated with their applications and products.
Notwithstanding any damages that customer might incur
for any reason whatsoever, NXP Semiconductors’
aggregate and cumulative liability towards customer for
the products described herein shall be limited in
accordance with the Terms and conditions of commercial
sale of NXP Semiconductors.
2004 Jan 28
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NXP Semiconductors
Product specification
22 W BTL or 2  11 W
stereo power amplifier
TDA1519C
Export control  This document as well as the item(s)
described herein may be subject to export control
regulations. Export might require a prior authorization from
national authorities.
NXP Semiconductors does not accept any liability related
to any default, damage, costs or problem which is based
on any weakness or default in the customer’s applications
or products, or the application or use by customer’s third
party customer(s). Customer is responsible for doing all
necessary testing for the customer’s applications and
products using NXP Semiconductors products in order to
avoid a default of the applications and the products or of
the application or use by customer’s third party
customer(s). NXP does not accept any liability in this
respect.
Quick reference data  The Quick reference data is an
extract of the product data given in the Limiting values and
Characteristics sections of this document, and as such is
not complete, exhaustive or legally binding.
Non-automotive qualified products  Unless this data
sheet expressly states that this specific NXP
Semiconductors product is automotive qualified, the
product is not suitable for automotive use. It is neither
qualified nor tested in accordance with automotive testing
or application requirements. NXP Semiconductors accepts
no liability for inclusion and/or use of non-automotive
qualified products in automotive equipment or
applications.
Limiting values  Stress above one or more limiting
values (as defined in the Absolute Maximum Ratings
System of IEC 60134) will cause permanent damage to
the device. Limiting values are stress ratings only and
(proper) operation of the device at these or any other
conditions above those given in the Recommended
operating conditions section (if present) or the
Characteristics sections of this document is not warranted.
Constant or repeated exposure to limiting values will
permanently and irreversibly affect the quality and
reliability of the device.
In the event that customer uses the product for design-in
and use in automotive applications to automotive
specifications and standards, customer (a) shall use the
product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and
specifications, and (b) whenever customer uses the
product for automotive applications beyond NXP
Semiconductors’ specifications such use shall be solely at
customer’s own risk, and (c) customer fully indemnifies
NXP Semiconductors for any liability, damages or failed
product claims resulting from customer design and use of
the product for automotive applications beyond NXP
Semiconductors’ standard warranty and NXP
Semiconductors’ product specifications.
Terms and conditions of commercial sale  NXP
Semiconductors products are sold subject to the general
terms and conditions of commercial sale, as published at
http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an
individual agreement is concluded only the terms and
conditions of the respective agreement shall apply. NXP
Semiconductors hereby expressly objects to applying the
customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license  Nothing in this document
may be interpreted or construed as an offer to sell products
that is open for acceptance or the grant, conveyance or
implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
2004 Jan 28
21
NXP Semiconductors
provides High Performance Mixed Signal and Standard Product
solutions that leverage its leading RF, Analog, Power Management,
Interface, Security and Digital Processing expertise
Customer notification
This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal
definitions and disclaimers. No changes were made to the technical content, except for package outline
drawings which were updated to the latest version.
Contact information
For additional information please visit: http://www.nxp.com
For sales offices addresses send e-mail to: [email protected]
© NXP B.V. 2011
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
RA2/04/pp22
Date of release: 2004 Jan 28