PHILIPS UAA2068AHL

INTEGRATED CIRCUITS
DATA SHEET
UAA2068AHL
Transmit chain and synthesizer with
integrated VCO for DECT
Product specification
File under Integrated Circuits, IC17
1999 Jun 04
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
UAA2068AHL
The reference divider ratio is fixed at 16. Outputs of the
main and reference dividers drive a phase comparator
where a charge pump produces phase error current pulses
for integration in an external loop filter. Only a passive loop
filter is necessary. The charge-pump current (phase
comparator gain) is set by an external resistor (RSET) at pin
RSET.
FEATURES
• Economical integrated solution for frequency generation
in DECT cordless telephones
• Integrated low phase noise 950 MHz VCO with
frequency doubler
• Local Oscillator (LO) drive (−14 dBm) for RF mixer
circuit
The VCO is powered from an internally regulated voltage
source and includes internal varicap diodes. Its tuning
range is wider than the required band to allow for
production spreads. In a Time Division Multiple Access
(TDMA) system such as DECT, the VCO and the
synthesizer are switched on one slot before the required
one to lock the VCO to the required channel frequency.
Just before the required slot, the synthesizer is switched
off, allowing open-loop modulation of the VCO during
transmission. When opening the loop, the frequency
pulling (due to switching off the synthesizer) can be
maintained within the DECT specification.
• Dedicated DECT PLL synthesizer
• 3-line serial interface bus
• 3 dBm output preamplifier with an integrated switch
• Low current consumption from 3 V supply
• Compatible with Philips Semiconductors ABC baseband
chip (PCD509x series).
APPLICATIONS
• 1880 to 1920 MHz DECT cordless telephones.
The device is designed to operate from 3 NiCd cells in
pocket phones, with low current and nominal 3.6 V
supplies. Separate power and ground pins are provided to
the different parts of the circuit. The ground leads should
be short-circuited externally to prevent large currents
flowing across the die and thus causing damage.
All supply pins (VCC) must also be at the same potential,
except VCC(CP) which can be equal to or greater than the
other supply pins (e.g. VCC = 3 V and VCC(CP) = 5 V for
wider VCO control voltage range).
GENERAL DESCRIPTION
The UAA2068AHL BiCMOS device integrates a 950 MHz
VCO, a frequency doubler, main and reference dividers
and a phase comparator, to implement a phase-locked
loop for DECT channel frequencies. The 1.9 GHz signal is
buffered and switched, in TX mode, to drive the transmit
power amplifier (CGY20xx series) or, in RX mode, to be
used as an LO signal for the receiver mixer IC
(UAA3540TS).
The synthesizer’s main divider is driven by the frequency
doubler output in the range from 1880 to 1920 MHz and
programmed via a 3-wire serial bus.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
UAA2068AHL
1999 Jun 04
NAME
DESCRIPTION
VERSION
LQFP32
plastic low profile quad flat package; 32 leads; body 5 × 5 × 1.4 mm
SOT401-1
2
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
UAA2068AHL
QUICK REFERENCE DATA
VCC = 3.6 V; VCC(CP) = 3.6 V; Tamb = 25 °C; unless otherwise specified. Characteristics for which only a typical value is
given are not tested.
SYMBOL
PARAMETER
CONDITIONS
MIN.
3.0
TYP.
3.6
MAX.
5.2
UNIT
VCC
supply voltage
V
VCC(CP)
charge-pump supply voltage
VCC(CP) ≥ VCC
3.0
3.6
5.2
V
ICC(SYA) +
ICC(SYD)
synthesizer supply current
S_EN = 1
−
9.5
14
mA
ICC(VCO) +
ICC(BUF)
VCO and buffer parts supply current
VCO_ON = 1
−
9.5
14
mA
ICC(DBL)
doubler supply current
in RX mode
−
14.4
19
mA
in TX mode
−
10
14
mA
in RX mode
−
0
50
µA
ICC(AMP)
TX preamplifier supply current
−
24
32
mA
ICC(pd)
total supply current in Power-down mode
−
5
50
µA
fo(RF)
RF output frequency
1880
−
1920
MHz
fxtal
crystal reference input frequency
−
13.824
−
MHz
fPC
phase comparator frequency
−
864
−
kHz
Tamb
operating ambient temperature
−10
−
+60
°C
in TX mode
1999 Jun 04
3
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
UAA2068AHL
BLOCK DIAGRAM
handbook, full pagewidth
VCC(AMP)
R_OFF
TXA
TXB
AMPGND
30
26
VCC(DBL)
T_EN
15
VCC(BUF)
11
VCC(VCO)
16
L
L
VREG VCOB VCOA
17
24
21
20
23
29
28
PREAMP
RF
SWITCH
DOUBLER
BUFFER
VCO
18
VTUNE
VMOD
27
VCC(DBL)
25
LOA
LOB
12
UAA2068AHL
LO
BUFFER
13
22
19
14
VCC(SYD)
2
VCC(SYA)
5
9
VCO_ON
VCGND
VCOGND
DBLGND
VCC(CP)
MAIN DIVIDER
PHASE
COMPARATOR
3-LINE BUS
8
CHARGE
PUMP
REFERENCE DIVIDER
32
1
31
4
3
S_EN DATA CLK XTAL SYDGND
6
SYAGND
10
RSET
7
CPGND
RSET
FCA071
Fig.1 Block diagram.
1999 Jun 04
4
CP
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
UAA2068AHL
PINNING
SYMBOL
PIN
DESCRIPTION
DATA
1
3-wire programming bus data input
VCC(SYD)
2
synthesizer CMOS divider positive supply voltage
SYDGND
3
synthesizer CMOS divider ground
XTAL
4
reference frequency input
VCC(SYA)
5
synthesizer prescaler positive supply voltage
SYAGND
6
synthesizer prescaler ground
CPGND
7
charge-pump ground
CP
8
charge-pump output signal
VCC(CP)
9
charge-pump positive supply voltage
RSET
10
charge-pump current setting input
VCC(DBL)
11
doubler positive supply voltage
LOA
12
local oscillator output A
LOB
13
local oscillator output B
DBLGND
14
doubler ground
T_EN
15
transmit enable signal input
VCC(BUF)
16
VCO isolation buffer positive supply voltage
VCC(VCO)
17
VCO positive supply voltage
VMOD
18
transmit modulation input
VCOGND
19
VCO ground; note 1
VCOA
20
VCO inductor connection A
VCOB
21
VCO inductor connection B
VCGND
22
internal varicap ground; note 1
VTUNE
23
VCO tuning input
VREG
24
VCO regulator output
VCO_ON
25
VCO power-on control input; note 2
R_OFF
26
power-on control for RX LO buffer/TX preamplifier; note 3
AMPGND
27
transmit amplifier ground
TXB
28
transmit amplifier output B
TXA
29
transmit amplifier output A
VCC(AMP)
30
transmit amplifier positive supply voltage
CLK
31
3-wire programming bus clock input
S_EN
32
synthesizer enable signal input
Notes
1. Pins 19 and 22 are internally short-circuited.
2. Use with S_PWR on ABC baseband chip.
3. Use with R_PWR on ABC baseband chip.
1999 Jun 04
5
Philips Semiconductors
Product specification
25 VCO_ON
26 R_OFF
27 AMPGND
28 TXB
UAA2068AHL
29 TXA
31 CLK
32 S_EN
handbook, full pagewidth
30 VCC(AMP)
Transmit chain and synthesizer with
integrated VCO for DECT
DATA
1
24 VREG
VCC(SYD)
2
23 VTUNE
SYDGND
3
22 VCGND
XTAL
4
21 VCOB
UAA2068AHL
18 VMOD
CP
8
17 VCC(VCO)
VCC(CP)
VCC(BUF) 16
7
T_EN 15
CPGND
DBLGND 14
19 VCOGND
LOB 13
6
LOA 12
SYAGND
VCC(DBL) 11
20 VCOA
RSET 10
5
9
VCC(SYA)
FCA070
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
RF SWITCH
Transmit chain
The RF switch passes the doubled VCO signal to either
the TX preamplifier (when T_EN is HIGH) or to the RX LO
buffer (when T_EN is LOW). In TX mode, the difference in
the RF power levels, observed at the TX output when
T_EN is switched from LOW-to-HIGH, is typically 40 dB.
VCO, BUFFER AND FREQUENCY DOUBLER
The VCO operates at a nominal centre frequency of
950 MHz. The VCO is fully integrated apart from two
inductors which complete the resonator network. The VCO
operates from an on-chip regulated power supply (VREG),
which minimizes frequency disturbances due to variations
in supply voltage. The buffered VCO signal is fed into a
frequency doubler. The large difference between the
transmitted and VCO frequencies reduces transmitter
oscillator coupling problems.
TX PREAMPLIFIER
The TX preamplifier amplifies the RF signal up to a level of
3 dBm which is suitable for use with Philips
Semiconductors DECT power amplifiers such as the
CGY20xx series. It is powered-up when both R_OFF and
VCO_ON are HIGH.
The output of the doubler is used to drive the synthesizer
main divider and can also be switched to either the TX
preamplifier or the RX LO output buffer. The high isolation
obtained from the VCO buffer and the frequency doubler
ensures that very small frequency changes occur when
turning on the TX preamplifier or the RX LO output buffer.
In TX mode, the oscillator can be directly modulated with
GMSK filtered data at pin VMOD.
1999 Jun 04
RX LO BUFFER
The RX LO buffer outputs the frequency doubled VCO
signal at a level of −14 dBm. This signal can then be used
as the local oscillator drive for the receive mixers of
devices such as the UAA3540TS. The buffer is
powered-up when R_OFF is LOW and VCO_ON is HIGH.
6
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
UAA2068AHL
For the divider ratio, the first bit (b6) entered is the most
significant (MSB).
Synthesizer
MAIN DIVIDER
S_EN must be LOW to capture new programming data.
S_EN must be HIGH to switch-on the synthesizer.
The main divider is clocked by the RF signal from the
internal frequency doubler. The divider operates at
frequencies from 1880 to 1920 MHz. It consists of a
bipolar prescaler followed by a CMOS counter. Any main
divider ratio from 2176 to 2303 inclusive can be
programmed.
Operating modes
The synthesizer is on when the input signal S_EN is HIGH,
and off when S_EN is LOW. When turned on, the dividers
and phase detector are synchronized to avoid a random
initial phase error. When turned off, the phase detector is
synchronized with the dividers to avoid interrupting a
charge-pump pulse.
REFERENCE DIVIDER
The reference divider is clocked by the signal at pin XTAL.
The circuit operates with levels from 50 to 500 mV (RMS)
at a frequency of 13.824 MHz, with a fixed divider ratio
of 16.
The VCO is on when the input signal VCO_ON is HIGH.
The polarity of VCO_ON is chosen for compatibility with
output S_PWR at the ABC chip. When turned on, it needs
some time (typically 30 µs) to reach its steady state.
PHASE COMPARATOR
The TX preamplifier is on when both R_OFF and VCO_ON
are HIGH. The polarity of R_OFF is chosen for
compatibility with output R_PWR at the ABC chip. When
turned on, it needs some time (typically 10 µs) to reach its
steady state. In transmit mode, the timing of the R_OFF
LOW-to-HIGH transition can be chosen such that the TX
preamplifier is turned on while the synthesizer loop
remains closed thus avoiding frequency pulling of the
VCO. In the receive mode, depending on the exact timing
of R_OFF compared to VCO_ON, the TX preamplifier can
be switched on at the beginning of the previous slot, but is
switched off when R_OFF goes LOW; this occurs when
the synthesizer loop is closed. The LO output amplifier is
turned on when R_OFF is LOW and VCO_ON is HIGH.
The phase comparator is driven by the output of the main
and reference dividers. It produces current pulses at the
charge-pump output (pin CP). The pulse duration is equal
to the difference in time of arrival of the edges from the two
dividers. If the main divider edge arrives first, pin CP sinks
current; if the reference divider edge arrives first, pin CP
sources current. The DC value of the charge-pump current
is nominally ten times the current drawn by the external
resistor connected to pin RSET Additional circuitry is
included to ensure that the gain of the phase detector
remains linear even for small phase errors.
The charge pump has a separate supply, VCC(CP), which
helps to reduce the interference on the charge-pump
output from other parts of the circuit. VCC(CP) can be higher
than the other supply voltages if a wider range on the VCO
input is required. The VCC(CP) voltage must not be less
than that on other VCC pins.
The UAA2068AHL has a very low current consumption in
Power-down mode.
Serial programming bus
A simple 3-line unidirectional serial bus is used to program
the circuit. These 3 lines are data (DATA), clock (CLK) and
enable (S_EN). The data sent to the device is loaded in
bursts framed by S_EN. Programming clock edges and
their appropriate data bits are ignored until S_EN goes
active LOW. The programmed information is read directly
by the main divider when S_EN returns HIGH. During
synthesizer operation, S_EN should be kept HIGH.
In normal operating mode, the last 16 bits serially clocked
into the device are retained within the register. Additional
leading bits are ignored, and no check is made on the
number of clock pulses. The data format is given in
Table 2. The first bit entered is b15, the last bit is b0.
1999 Jun 04
7
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
Table 1
UAA2068AHL
Mode control; note 1
BLOCK STATUS
VCO_ON
R_OFF
T_EN
S_EN
VCO, buffer, doubler, RF switch, TX preamplifier and LO buffer
powered-down
0
X
X
X
VCO, buffer, doubler, RF switch and TX preamplifier powered-up
1
1
1
X
1
1
0
X
1
0
0
X
1
0
1
X
To power-down PLL blocks; notes 2 and 3
1
X
X
0
To power-up PLL blocks; notes 2 and 3
1
X
X
1
LO buffer powered-down
Nominal RF signal at TX output
VCO, buffer, doubler, RF switch and TX preamplifier powered-up
LO buffer powered-down
No RF signal output
VCO, buffer, doubler, RF switch and LO buffer powered-up
TX preamplifier powered-down
Nominal RF signal at LO buffer output
VCO, buffer, doubler, RF switch and LO buffer powered-up
TX preamplifier powered-down
No RF signal output
All blocks in power-down state; notes 2 and 3
0
X
X
0
New PLL division ratio is loaded and the PLL blocks are powered-up on
the rising edge of S_EN; note 3
1
X
X
0 to 1
Notes
1. X = don’t care.
2. PLL blocks are the main divider, reference divider, phase detector and charge pump.
3. A reference signal is needed on pin XTAL for correct operation.
Table 2
Bit allocation; note 1
FIRST IN
REGISTER BIT ALLOCATION
LAST IN
DATA FIELD
b15
0
b14
0
b13
0
b12
1
b11
0
b10
0
b9
0
b8
b7
0
1
b6(2)
b5
b4
main divider
Notes
1. For normal operation, b15 to b0 need to be programmed.
2. Bit b6 is the MSB of the main divider coefficient.
3. The main divider ratio is equal to 2176 plus the programmed value (see Table 3).
1999 Jun 04
8
b3
b2
b1
programming(3)
b0
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
Table 3
UAA2068AHL
Main divider programming
b6
b5
b4
b3
b2
b1
b0
Binary equivalent of n
MAIN DIVIDER
RATIO
SYNTHESIZED
FREQUENCY (MHz)
2176 + n
0.864 × (2176 + n)
0
0
0
0
0
0
1
2177
1880.928
0
0
1
0
1
0
1
2197
1898.208
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
−0.3
+5.5
V
VCC(CP)
charge-pump supply voltage
−0.3
+5.5
V
VCC(CP) − VCC
difference in voltage between VCC(CP) and VCC
−0.3
+5.5
V
∆GND
difference in ground supply voltage applied
between all ground pins
−
0.3
V
Ptot
total power dissipation
−
275
mW
Tstg
storage temperature
−55
+125
°C
Tamb
operating ambient temperature
−10
+60
°C
Tj
junction temperature
−
150
°C
note 1
Note
1. Pins short-circuited internally must be short-circuited externally.
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices.
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
1999 Jun 04
PARAMETER
CONDITIONS
thermal resistance from junction to ambient
9
in free air
VALUE
UNIT
100
K/W
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
UAA2068AHL
CHARACTERISTICS
VCC = 3.6 V; VCC(CP) = 3.6 V; Tamb = 25 °C; unless otherwise specified. Characteristics for which only a typical value is
given are not tested.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VCC
supply voltage
VCC(CP)
charge-pump supply voltage
ICC(SYA) +
ICC(SYD)
synthesizer supply current
ICC(VCO) + VCO and buffer parts supply
ICC(BUF)
current
ICC(DBL)
ICC(AMP)
ICC(pd)
doubler supply current
TX preamplifier supply current
3
3.6
5.2
V
VCC(CP) ≥ VCC
3
3.6
5.2
V
S_EN = 1
−
9.5
14
mA
VCO_ON = 1
−
9.5
14
mA
in RX mode
−
14.4
19
mA
in TX mode
−
10
14
mA
in RX mode
−
0
50
µA
in TX mode
−
24
32
mA
−
5
50
µA
MHz
total supply current in
Power-down mode
Synthesizer main divider
fRF
RF frequency
1880
−
1920
Rm
main divider ratio
2176
−
2303
Synthesizer reference divider input
fxtal
crystal reference input frequency
−
13.824
−
MHz
Vxtal(rms)
sinusoidal input signal level
(RMS value)
50
−
500
mV
Rref
reference division ratio
−
16
−
Ri
input resistance (real part of the
input impedance)
−
4.5
−
kΩ
Ci
input capacitance (imaginary
part of the input impedance)
−
2.5
−
pF
−
864
−
kHz
−
1.5
−
mA
fxtal = 13.824 MHz
Phase detector
fPC
phase comparator frequency
Charge-pump output
Io(cp)
charge-pump output current
Io(cp)(err)
charge-pump output current error note 1
−25
−
+25
%
Imatch
sink-to-source current matching
VCP = 0.5VCC
−
±5
−
%
IL(cp)
charge-pump-off leakage current
VCP = 0.5VCC
−1
0
+1
nA
VCP = 0.5VCC;
RSET = 8.2 kΩ
Charge-pump current setting resistor input; pin RSET
RSET
external resistor connected
between pin RSET and ground
5.6
−
12
kΩ
VSET
regulated voltage at pin RSET
−
1.2
−
V
1999 Jun 04
10
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
SYMBOL
PARAMETER
UAA2068AHL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCO
940
−
960
MHz
tuning input VCO gain
−
45
−
MHz/V
modulation input VCO gain
−
1
−
MHz/V
fVCO
oscillator frequency
GVCO
GMOD
over full temperature
range; note 2
Switch part
FTLOTXoff isolation between LO and TX
outputs when TX preamplifier is
off (RX mode)
f = 1890 MHz; note 2
−
−50
−
dB
FTLOTXon isolation due to the switch when
TX preamplifier is on (TX mode)
f = 1890 MHz; note 2
−
−40
−
dB
over full temperature
range; note 2
0
3
7
dBm
1880
−
1920
MHz
TX preamplifier and LO buffer parts
Po(TX)
TX preamplifier output power
fo(TX)
output frequency on TX
preamplifier or LO buffer
Ro(TX)
TX preamplifier output resistance
(real part of the parallel output
impedance)
balanced
−
150
−
Ω
Co(TX)
TX preamplifier output
capacitance (imaginary part of
the parallel output impedance)
balanced
−
0.5
−
pF
referenced to the fo(TX)
level; note 2
−
−41
−36
dBc
FTVCOTX VCO frequency feedthrough at
the TX output
CNR25
carrier-to-noise ratio at TX output carrier offset
∆f = 25 kHz
−
−75
−
dBc/Hz
CNR4686
carrier-to-noise ratio at TX output carrier offset
∆f = 4686 kHz
−
−135
−132
dBc/Hz
∆fo(offset)
total frequency shift due to
measured 20 µs after
200 mV VCC change disabling the disabling the
synthesizer
synthesizer; note 2
−
−
±15
kHz
∆fo(drift)
frequency drift during a slot
note 2
−
1
± 10
kHz
Po(LO)
LO preamplifier output power
note 2
−
−14
−
dBm
Ro(LO)
LO preamplifier output
resistance (real part of the
parallel output impedance)
balanced
−
120
−
Ω
1999 Jun 04
11
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
SYMBOL
Co(LO)
PARAMETER
LO preamplifier output
capacitance (imaginary part of
the parallel output impedance)
UAA2068AHL
CONDITIONS
MIN.
−
balanced
TYP.
MAX.
−
0
UNIT
pF
Interface logic input signal levels; pins DATA, CLK, S_EN, T_EN, R_OFF and VCO_ON
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
Ibias
input bias current
Ci
input capacitance
note 3
logic 1 or logic 0
2.2
−
VCC + 0.3 V
−0.3
−
+0.5
V
−5
−
+5
µA
−
2
−
pF
Notes
1. Condition: 0.5 < VCP < (VCC(CP) − 0.5).
2. Measured and guaranteed only on the Philips evaluation board, including PCB and balun filter.
3. VIH should never exceed 5.2 V.
SERIAL BUS TIMING CHARACTERISTICS
VCC = 3.6 V; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
Serial programming clock; CLK
tr
input rise time
−
10
40
ns
tf
input fall time
−
10
40
ns
Tcy
clock period
100
−
−
ns
Enable programming; S_EN
tSTART
delay to rising clock edge
40
−
−
ns
tEND
delay from last falling clock edge
−20
−
−
ns
tW
minimum inactive pulse width
4000
−
−
ns
tSU;S_EN
enable set-up time to next clock edge
20
−
−
ns
Register serial input data; DATA
tSU;DAT
input data to clock set-up time
20
−
−
ns
tHD;DAT
input data to clock hold time
20
−
−
ns
1999 Jun 04
12
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
tSU;DAT
handbook, full pagewidth
tHD;DAT
UAA2068AHL
tf
Tcy
tEND
tr
tSU;S_EN
CLK
DATA
MSB
LSB
S_EN
tSTART
MBK095
Fig.3 Serial bus timing diagram.
1999 Jun 04
13
tW
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
UAA2068AHL
TIMING CHARACTERISTICS
previous slot
handbook, full pagewidth
active slot
slot time
In TX mode
DATA
CLK
S_EN
VCO_ON
= S_PWR (1)
R_OFF
= R_PWR (1)
T_EN
In RX mode
DATA
CLK
S_EN
VCO_ON
= S_PWR (1)
R_OFF
= R_PWR (1)
T_EN
MGK384
(1) On ABC baseband chip.
Fig.4 Application bus timing diagram.
1999 Jun 04
14
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
UAA2068AHL
APPLICATION INFORMATION
TXOUT
handbook, full pagewidth
1 pF
1 pF
8.2 nH
8.2 nH
VCC
6.8 nH
10 pF
6.8 nH
10 pF
1.8 nH
22 pF
22 pF
1 kΩ
3.9 pF
8.2 pF
8.2 pF
VCC
100 nF
VCC(SYA)
SYAGND
CPGND
CP
26
VCO_ON
R_OFF
TXB
TXA
AMPGND
27
25
24
2
23
3
22
21
4
UAA2068AHL
5
20
6
19
7
18
8
17
10
RSET
VCC(CP)
9
8.2 pF
28
11
RSET
8.2 kΩ
VCC
120 pF
8.2
pF
12
13
14
15
T_EN
XTAL
29
8.2 pF
16
VREG
VTUNE
82 nF
VCGND
VCOB
L1
6.8 nH
VCOA
VCOGND
L2
6.8 nH
8.2
pF
VMOD
VCC(VCO)
from
ABC chip
8.2 pF
VCC(BUF)
SYDGND
30
DBLGND
8.2 pF
VCC(SYD)
31
LOB
VCC
32
1 kΩ
1
LOA
from
ABC
chip
DATA
VCC(DBL)
1 kΩ 8.2 pF
VCC(AMP)
8.2 pF
1 kΩ
CLK
S_EN
1 kΩ
from ABC
chip
8.2 pF
VCC
VCC
8.2 pF
8.2
pF
3.9 kΩ
loop filter
560 pF
8.2 nF
NPO
1.5 kΩ
8.2
pF
to receiver
1 kΩ
from ABC chip
8.2 pF
FCA072
L1 and L2: order of magnitude.
Values depend on board layout.
Fig.5 Typical application diagram.
1999 Jun 04
15
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
UAA2068AHL
PACKAGE OUTLINE
SOT401-1
LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm
c
y
X
A
17
24
ZE
16
25
e
A A2
E HE
(A 3)
A1
w M
pin 1 index
θ
bp
32
Lp
9
L
1
8
detail X
ZD
e
v M A
w M
bp
D
B
HD
v M B
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HD
HE
L
Lp
v
w
y
mm
1.60
0.15
0.05
1.5
1.3
0.25
0.27
0.17
0.18
0.12
5.1
4.9
5.1
4.9
0.5
7.15
6.85
7.15
6.85
1.0
0.75
0.45
0.2
0.12
0.1
Z D (1) Z E (1)
θ
0.95
0.55
7
0o
0.95
0.55
o
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
95-12-19
97-08-04
SOT401-1
1999 Jun 04
EUROPEAN
PROJECTION
16
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
UAA2068AHL
If wave soldering is used the following conditions must be
observed for optimal results:
SOLDERING
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Wave soldering
Manual soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
1999 Jun 04
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
17
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
UAA2068AHL
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
REFLOW(1)
WAVE
BGA, SQFP
not suitable
HLQFP, HSQFP, HSOP, SMS
not
PLCC(3),
SO, SOJ
suitable
suitable(2)
suitable
suitable
suitable
LQFP, QFP, TQFP
not recommended(3)(4)
suitable
SSOP, TSSOP, VSO
not recommended(5)
suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Jun 04
18
Philips Semiconductors
Product specification
Transmit chain and synthesizer with
integrated VCO for DECT
UAA2068AHL
NOTES
1999 Jun 04
19
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Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1999
SCA 65
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
465008/01/pp20
Date of release: 1999 Jun 04
Document order number:
9397 750 05841