APT24F50B APT24F50S 500V, 24A, 0.24Ω Max, trr ≤210ns N-Channel FREDFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. TO -24 7 D 3 PAK APT24F50B APT24F50S D G Single die FREDFET S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI • ZVS phase shifted and other full bridge • Low trr for high reliability • Half bridge • Ultra low Crss for improved noise immunity • PFC and other boost converter • Low gate charge • Buck converter • Avalanche energy rated • Single and two switch forward • RoHS compliant • Flyback Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 24 Continuous Drain Current @ TC = 100°C 15 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 495 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 11 A 1 82 Thermal and Mechanical Characteristics Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 335 RθJC Junction to Case Thermal Resistance 0.37 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range TL Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw Microsemi Website - http://www.microsemi.com 0.15 -55 150 300 °C/W °C 0.22 oz 6.2 g 10 in·lbf 1.1 N·m Rev E 8-2011 Min Characteristic 050-8132 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 500 ∆VBR(DSS)/∆TJ Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ VGS = 10V, ID = 11A 3 Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance VDS = 500V TJ = 25°C VGS = 0V TJ = 125°C Typ Max 0.60 0.21 4 -10 0.24 5 250 1000 ±100 VGS = ±30V Unit V V/°C Ω V mV/°C μA nA TJ = 25°C unless otherwise specified Parameter gfs 2.5 VGS = VDS, ID = 1mA Threshold Voltage Temperature Coefficient IDSS Symbol Reference to 25°C, ID = 250μA Breakdown Voltage Temperature Coefficient RDS(on) AP24F50B_S Min Test Conditions VDS = 50V, ID = 11A 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Max 17 3630 50 390 VGS = 0V, VDS = 25V f = 1MHz Co(cr) Typ Unit S pF 225 VGS = 0V, VDS = 0V to 333V 115 Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time Resistive Switching Current Rise Time VDD = 333V, ID = 11A tr td(off) tf Turn-Off Delay Time 90 21 41 16 19 41 14 VGS = 0 to 10V, ID = 11A, VDS = 250V RG = 4.7Ω 6 , VGG = 15V Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge Irrm Reverse Recovery Current dv/dt Peak Recovery dv/dt Test Conditions Min Typ D MOSFET symbol showing the integral reverse p-n junction diode (body diode) Max 24 A G 82 S ISD = 11A, TJ = 25°C, VGS = 0V 1.0 210 400 TJ = 25°C TJ = 125°C ISD = 11A 3 TJ = 25°C diSD/dt = 100A/μs TJ = 125°C VDD = 100V TJ = 25°C Unit TJ = 125°C ISD ≤ 11A, di/dt ≤1000A/μs, VDD = 333V, TJ = 125°C 0.68 1.64 7.1 9.7 V ns μC A 20 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 8.18mH, RG = 25Ω, IAS = 11A. 050-8132 Rev E 8-2011 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -8.43E-8/VDS^2 + 1.96E-8/VDS + 5.61E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT24F50B_S V GS 40 = 10V T = 125°C TJ = -55°C 35 60 30 50 TJ = 25°C 40 30 20 0 25 6V 20 15 5.5V 10 TJ = 125°C 0 0 NORMALIZED TO VGS = 10V @ 11A VDS> ID(ON) x RDS(ON) MAX. 250μSEC. PULSE TEST @ <0.5 % DUTY CYCLE 60 2.0 1.5 1.0 0.5 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics 70 ID, DRAIN CURRENT (A) RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE Figure 1, Output Characteristics 50 TJ = -55°C 40 TJ = 25°C 30 TJ = 125°C 20 10 0 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 3, RDS(ON) vs Junction Temperature 30 0 1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 6,000 Ciss 25 TJ = -55°C C, CAPACITANCE (pF) gfs, TRANSCONDUCTANCE 6.5V 5 0 5 10 15 20 25 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 2.5 = 7 &10V GS 5V TJ = 150°C 10 V J 70 ID, DRIAN CURRENT (A) ID, DRAIN CURRENT (A) 80 TJ = 25°C 20 TJ = 125°C 15 10 1,000 Coss 100 5 Crss 10 15 20 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 25 70 14 VDS = 100V 10 VDS = 250V 8 6 VDS = 400V 4 2 0 100 200 300 400 500 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage ID = 11A 12 0 0 20 40 60 80 100 120 140 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 60 50 40 TJ = 25°C 30 TJ = 150°C 20 10 0 0 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Drain Current vs Source-to-Drain Voltage Rev E 8-2011 VGS, GATE-TO-SOURCE VOLTAGE (V) 16 5 050-8132 0 10 ISD, REVERSE DRAIN CURRENT(A) 0 APT24F50B_S 100 100 IDM ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) IDM 10 13μs 100μs 1ms Rds(on) 1 10ms 100ms 1 13μs Rds(on) 100μs 1ms 10ms 100ms DC line TJ = 150°C TC = 25°C 1 Scaling for Different Case & Junction Temperatures: ID = ID(T = 25°C)*(TJ - TC)/125 DC line TJ = 125°C TC = 75°C 0.1 10 C 0.1 10 100 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 1 10 100 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area 0.35 D = 0.9 0.30 0.7 0.25 0.20 0.5 Note: 0.15 P DM ZθJC, THERMAL IMPEDANCE (°C/W) 0.40 0.3 0.10 0 t2 SINGLE PULSE t1 = Pulse Duration t Duty Factor D = 1 /t2 Peak T J = P DM x Z θJC + T C 0.1 0.05 0.05 10 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration -5 e3 100% Sn Plated 15.49 (.610) 16.26 (.640) 6.15 (.242) BSC 5.38 (.212) 6.20 (.244) Drai n (Heat Sink) e1 SAC: Tin, Silver, Copper 4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 1.0 D3PAK Package Outline TO-247 (B) Package Outline Drai n t1 4.98 (.196) 5.08 (.200) 1.47 (.058) 1.57 (.062) 15.95 (.628) 16.05(.632) Revised 4/18/95 20.80 (.819) 21.46 (.845) 1.04 (.041) 1.15(.045) 13.79 (.543) 13.99(.551) 13.41 (.528) 13.51(.532) Revised 8/29/97 11.51 (.453) 11.61 (.457) 3.50 (.138) 3.81 (.150) 050-8132 Rev E 8-2011 0.46 (.018) 0.56 (.022) {3 Plcs} 4.50 (.177) Max. 0.40 (.016) 1.016(.040) 2.21 (.087) 2.59 (.102) 19.81 (.780) 20.32 (.800) 2.87 (.113) 3.12 (.123) 1.65 (.065) 2.13 (.084) 1.01 (.040) 1.40 (.055) 5.45 (.215) BSC 2-Plcs. Dimensions in Millimeters (Inches) Gate Drai n Source 0.020 (.001) 0.178 (.007) 2.67 (.105) 2.84 (.112) 1.27 (.050) 1.40 (.055) 1.22 (.048) 1.32 (.052) 1.98 (.078) 2.08 (.082) 5.45 (.215) BSC {2 Plcs. } Source Drai n Gate Dimensions in Millimeters (Inches) 3.81 (.150) 4.06 (.160) (Base of Lead) Heat Sink (Drain) and Leads are Plated