UBA2080/1 Half-bridge driver IC Rev. 1.1 — 6 December 2011 Objective data sheet 1. General description The UBA2080 and UBA2081 are high voltage monolithic integrated circuits made using the latch-up free Silicon-On-Insulator (SOI) process. The circuit is designed for driving MOSFETs in a half-bridge configuration. 2. Features and benefits Integrated half-bridge driver circuit Integrated bootstrap diode Maximum voltage of 600 V Output driver capability: IO(sink) = 400 mA and IO(source) = 200 mA Maximum frequency 800 kHz UBA2080: Outputs in phase with inputs UBA2081: Adjustable dead-time Shutdown input 3. Applications Driver (via external MOSFETs) for any kind of load in a half-bridge configuration 4. Ordering information Table 1. Ordering information Type number UBA2080P Package Name Description Version DIP8 plastic dual in-line package; 8 leads SOT97-1 SO8 plastic small outline package; 8 leads SOT96-1 SO14 plastic small outline package; 14 leads SOT108-1 UBA2081P UBA2080T UBA2081T UBA2080AT UBA2080/1 NXP Semiconductors Half-bridge driver IC 5. Block diagram FS VDD ULVO ULVO R1 HS DRIVER GH R2 S LOGIC HIN SH LEVEL SHIFTER LS DRIVER LIN GL GND aaa-001102 Fig 1. Block diagram (UBA2080X) FS VDD ULVO ULVO R1 HS DRIVER GH R2 S LOGIC CLK SH LEVEL SHIFTER LS DRIVER SD GL NON-OVERLAP GND Vref aaa-001107 Fig 2. Block diagram (UBA2081X) Refer to Figure 7 “Typical UBA2080X application” and Figure 8 “Typical UBA2081X application” for detailed information on the required application components. UBA2080_UBA2081 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 2 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC 6. Pinning information 6.1 Pinning GND 1 14 SEL GND 2 13 GND SD/LIN 3 12 VDD GL GND 4 7 SH CLK/HIN 5 3 6 GH FS 6 9 GND 4 5 FS GH 7 8 SH 1 GND 2 LIN HIN UBA2080 aaa-001121 Fig 3. UBA2080AT 11 GL 8 VDD 10 GND 8 GL 7 SH 3 6 GH 4 5 FS VDD 1 GND 2 SD CLK aaa-001126 aaa-001134 UBA2080X: Pin configuration DIP8 and SO8 package Fig 4. UBA2080AT: Pin configuration SO14 package UBA2081 Fig 5. UBA2081X: Pin configuration DIP8 and SO8 package 6.2 Pin description Table 2. Symbol Pin description UBA2080X/1X DIP8 and SO8 Pin Description UBA2080X (DIP8/SO8) VDD 1 IC supply GND 2 IC ground and low-side driver return LIN 3 - low-side driver logic input SD - 3 low-side driver logic input HIN 4 - high-side driver logic input CLK - 4 high-side driver logic input FS 5 floating supply voltage GH 6 high-side MOSFET gate SH 7 high-side MOSFET source GL 8 low-side MOSFET gate Table 3. UBA2080_UBA2081 Objective data sheet UBA2081X (DIP8/SO8) Pin description UBA2080AT (SO14) Symbol Pin Description GND 1, 2, 4, 9, 10, 13 IC ground and low side driver return SD/LIN 3 low-side driver logic input CLK/HIN 5 high-side driver logic input FS 6 floating supply voltage SH 8 high-side MOSFET source GH 7 high-side MOSFET gate All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 3 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC Table 3. Pin description UBA2080AT (SO14) …continued Symbol Pin Description GL 11 low-side MOSFET gate VDD 12 IC supply SEL 14 select UBA2080 or UBA2081 functionality 7. Functional description 7.1 Start-up state The IC enters the start-up state when the supply voltage on pin VDD increases. In the start-up state, the high-side power transistor is non-conducting and the low-side power transistor is switched on. The internal circuit is reset and the capacitor on the bootstrap pin FS is charged. The start-up state is defined until the value of VDD = the VDD(start) value. After which the IC switches to the oscillation state. The circuit enters the start-up state again when the voltage on pin VDD VDD(stop). 7.2 UBA2080 oscillation state In the oscillation state, the output voltage of the GL and GH drivers depend on the logical signals HIN and LIN, see Table 4 To prevent cross conduction in the half-bridge MOSFETs, the combination HIN = LIN = 1 is not allowed. Both GL and GH are LOW under this condition. Table 4. logic table State 7.3 HIN LIN GL GH Start-up - - HIGH LOW Oscillation 0 0 LOW LOW Oscillation 0 1 HIGH LOW Oscillation 1 0 LOW HIGH Oscillation 1 1 LOW LOW UBA2081 oscillation state In the oscillation state, the output voltage of the GL and GH drivers depend on the logical signals CLK and SD, see Table 5 Table 5. UBA2080_UBA2081 Objective data sheet logic table State CLK SD GL GH Start-up - - HIGH LOW Oscillation 0 0 HIGH LOW Oscillation 1 0 LOW HIGH Oscillation 0 1 LOW LOW Oscillation 1 1 LOW LOW All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 4 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC 7.4 UBA2081 non-overlap time The external resistor (RSD) on pin SD sets the non-overlap time of the UBA2081. The relationship between this resistor value and actual dead-time is listed in Figure 6. aaa-001135 3000 tno (ns) 2000 1000 0 0 1 2 3 RSD (MΩ) Fig 6. UBA2080_UBA2081 Objective data sheet Non-overlap time versus SD resistor (RSD) All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 5 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDD supply voltage nominal 0 14 V VFS voltage on pin FS VSH voltage on pin SH VSH VSH + 14 V source high-side MOSFET -3 600 V t < 1 s -14 600 V logic input for high-side driver 14 V Vi(HIN) input voltage on pin HIN Vi(LIN) input voltage on pin LIN logic input for low-side driver 0 14 V VCLK voltage on pin CLK logic input for output drivers 14 V Vi(SD) input voltage on pin SD logic input for output drivers and analog input for non-overlap setting 0 14 V SR slew rate on pin SH; repetitive 6 +6 V/ns Tj junction temperature 40 +150 C Tamb ambient temperature 40 +150 C Tstg storage temperature 55 +150 C - 1 kV - 2 kV - 250 V VESD electrostatic discharge voltage [1] human body model: pins FS, GH and SH pins VDD, HIN, LIN, SD, CLK [2] machine model: all pins [1] In accordance with the Human Body Model (HBM): equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor. [2] In accordance with the Machine Model (MM): equivalent to discharging a 200 pF capacitor through a 1.5 k series resistor and a 0.75 H inductor. 9. Thermal characteristics Table 7. Thermal characteristics Symbol Parameter Conditions thermal resistance from junction to ambient in free air [1] 160 K/W thermal resistance from junction to ambient in free air [1] 100 K/W Typ Unit SO8 Rth(j-a) SO14 and DIP8 Rth(j-a) [1] In accordance with IEC 60747-1. UBA2080_UBA2081 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 6 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC 10. Characteristics Table 8. Characteristics Tj = 25 C; all voltages are measured with respect to SGND; VDD = 12.8 V; positive currents flow into the IC. Symbol Parameter Conditions Min Typ Max Unit FS = GH = SH = 600 V - - 10 A High-voltage supply Ileak leakage current Start-up state IVDD current on pin VDD 420 520 620 A VDD(start) start supply voltage 11 12 13 V VDD(stop) stop supply voltage 8 8.5 9 V VDD(hys) hysteresis of supply voltage 3 3.5 4 V start to stop Pin LIN input VIH HIGH-level input voltage 1.6 2.2 2.8 V Vhys(LIN) hysteresis voltage on pin LIN - 400 - mV II(LIN) input current on pin LIN - 0 1 A VIH HIGH-level input voltage 1.6 2.2 2.8 V Vhys(HIN) hysteresis voltage on pin HIN - 400 - mV II(HIN) input current on pin HIN - 0 1 A VIH HIGH-level input voltage 2.7 - - V VIL LOW-level input voltage - - 0.8 V II(CLK) input current on pin CLK - 0 1 A 1.6 2.2 2.8 V Pin HIN input Pin CLK input Pin SD input VIH HIGH-level input voltage to activate shutdown Vhys(SD) hysteresis voltage on pin SD tno non-overlap time - 400 - mV RSD = 100 k; typical minimum - 140 - ns RSD = 3 M; typical maximum - 2.4 - s gate drivers IO(source) output source current VFS = VVDD = 12 V; VSH = 0 V; VGH = VGL = 8 V - 200 - mA IO(sink) output sink current VFS = VVDD = 12 V; VSH = 0 V; VGH = VGL = 4 V - 400 - mA Vd(bs) bootstrap diode voltage Id(bs) = 20 mA - 2.3 - V VUVLO undervoltage lockout voltage reset 3.6 4.2 4.8 V IFS current on pin FS VFS = VVDD = 12 V; VSH = 0 V 27 32 37 A Timing td delay time UBA2080 - 50 - ns ton turn-on time UBA2080 - 240 - ns toff turn-off time UBA2080 - 180 - ns fmax maximum frequency 800 - - kHz UBA2080_UBA2081 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 7 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC 11. Application information HVIN FS HIN from µC GH LIN CFS SH UBA2080X to load GL VDD VDD supply CVDD GND aaa-001424 Fig 7. Typical UBA2080X application HVIN FS input clock SD GH CLK SH UBA2081X tno RSD VDD supply CFS to load GL VDD CVDD GND aaa-001425 Remark: The capacitor connected to the SD pin ensures a noise immune dead-time. Fig 8. UBA2080_UBA2081 Objective data sheet Typical UBA2081X application All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 8 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC 12. Package outline SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 D E A X c y HE v M A Z 5 8 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 inches 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.014 0.0075 0.20 0.19 0.16 0.15 0.05 0.01 0.01 0.004 0.028 0.012 0.244 0.039 0.028 0.041 0.228 0.016 0.024 θ 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. Fig 9. REFERENCES OUTLINE VERSION IEC JEDEC SOT96-1 076E03 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Package outline SOT96-1 UBA2080_UBA2081 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 9 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC DIP8: plastic dual in-line package; 8 leads (300 mil) SOT97-1 ME seating plane D A2 A A1 L c Z w M b1 e (e 1) b MH b2 5 8 pin 1 index E 1 4 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.14 0.53 0.38 1.07 0.89 0.36 0.23 9.8 9.2 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 1.15 inches 0.17 0.02 0.13 0.068 0.045 0.021 0.015 0.042 0.035 0.014 0.009 0.39 0.36 0.26 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.045 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT97-1 050G01 MO-001 SC-504-8 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-13 Fig 10. Package outline SOT97-1 UBA2080_UBA2081 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 10 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.010 0.057 inches 0.069 0.004 0.049 0.05 0.244 0.039 0.041 0.228 0.016 0.028 0.024 0.01 0.01 0.028 0.004 0.012 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 11. Package outline SOT108-1 UBA2080_UBA2081 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 11 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC 13. Revision history Table 9. Revision history Document ID Release date UBA2080_UBA2081 v.1.1 20111206 Modifications: UBA2080_UBA2081 v.1 UBA2080_UBA2081 Objective data sheet • Data sheet status Change notice Supersedes Objective data sheet - UBA2080_UBA2081 v.1 Figure 6 “Non-overlap time versus SD resistor (RSD)” on page 5: Axes units changed. 20111116 Objective data sheet - All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 12 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC 14. Legal information 14.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 14.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 14.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. UBA2080_UBA2081 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 13 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 14.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 15. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] UBA2080_UBA2081 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1.1 — 6 December 2011 © NXP B.V. 2011. All rights reserved. 14 of 15 UBA2080/1 NXP Semiconductors Half-bridge driver IC 16. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 7.2 7.3 7.4 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 15 16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Start-up state . . . . . . . . . . . . . . . . . . . . . . . . . . 4 UBA2080 oscillation state. . . . . . . . . . . . . . . . . 4 UBA2081 oscillation state . . . . . . . . . . . . . . . . 4 UBA2081 non-overlap time . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal characteristics . . . . . . . . . . . . . . . . . . 6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Application information. . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Contact information. . . . . . . . . . . . . . . . . . . . . 14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 6 December 2011 Document identifier: UBA2080_UBA2081