APT24M120B2 APT24M120L 1200V, 24A, 0.63Ω Max N-Channel MOSFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. T-Ma x TM TO-264 APT24M120B2 APT24M120L D Single die MOSFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI/RFI • PFC and other boost converter • Low RDS(on) • Buck converter • Ultra low Crss for improved noise immunity • Two switch forward (asymmetrical bridge) • Low gate charge • Single switch forward • Avalanche energy rated • Flyback • RoHS compliant • Inverters Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 24 Continuous Drain Current @ TC = 100°C 15 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 1875 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 12 A 1 90 Thermal and Mechanical Characteristics Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 1040 RθJC Junction to Case Thermal Resistance 0.12 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range TL Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight Torque Mounting Torque ( TO-264 Package), 4-40 or M3 screw Microsemi Website - http://www.microsemi.com 0.11 -55 150 300 °C/W °C 0.22 oz 6.2 g 10 in·lbf 1.1 N·m Rev C 7-2011 Min Characteristic 050-8072 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 1200 ∆VBR(DSS)/∆TJ Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ VGS = 10V, ID = 12A 3 Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics VDS = 1200V VGS = 0V Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Typ Max 1.41 0.50 4 -10 0.63 5 TJ = 25°C 100 500 ±100 TJ = 125°C VGS = ±30V Unit V V/°C Ω V mV/°C μA nA TJ = 25°C unless otherwise specified Parameter gfs 3 VGS = VDS, ID = 2.5mA Threshold Voltage Temperature Coefficient IDSS Symbol Reference to 25°C, ID = 250μA Breakdown Voltage Temperature Coefficient RDS(on) APT24M120B2_L Min Test Conditions VDS = 50V, ID = 12A VGS = 0V, VDS = 25V f = 1MHz Co(cr) 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Typ 27 8370 100 615 Max Unit S pF 240 VGS = 0V, VDS = 0V to 800V 125 Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time Resistive Switching Current Rise Time VDD = 800V, ID = 12A tr td(off) tf 260 42 120 45 27 145 42 VGS = 0 to 10V, ID = 12A, VDS = 600V RG = 2.2Ω 6 , VGG = 15V Turn-Off Delay Time Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Diode Forward Voltage ISD = 12A, TJ = 25°C, VGS = 0V trr Reverse Recovery Time ISD = 12A 3 Qrr Reverse Recovery Charge Peak Recovery dv/dt Typ Max Unit 24 A G VSD dv/dt Min D 90 S diSD/dt = 100A/μs, TJ = 25°C ISD ≤ 12A, di/dt ≤1000A/μs, VDD = 800V, TJ = 125°C 1 1270 30 V ns μC 10 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 26.04mH, RG = 2.2Ω, IAS = 12A. 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 050-8072 Rev C 7-2011 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(cr) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -3.80E-7/VDS^2 + 4.62E-8/VDS + 6.57E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT24M120B2_L 70 V GS 25 = 10V T = 125°C J 20 TJ = -55°C ID, DRIAN CURRENT (A) 50 40 30 TJ = 25°C 20 10 GS 15 5V 10 5 4.5V TJ = 125°C TJ = 150°C 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 0 Figure 2, Output Characteristics 90 NORMALIZED TO 2.5 2.0 1.5 1.0 0.5 250μSEC. PULSE TEST @ <0.5 % DUTY CYCLE 70 60 TJ = -55°C 50 TJ = 25°C 40 TJ = 125°C 30 20 10 0 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 3, RDS(ON) vs Junction Temperature 35 0 1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 20,000 Ciss 10,000 30 TJ = -55°C 25 C, CAPACITANCE (pF) gfs, TRANSCONDUCTANCE VDS> ID(ON) x RDS(ON) MAX. 80 VGS = 10V @ 12A ID, DRAIN CURRENT (A) RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE Figure 1, Output Characteristics 3.0 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) TJ = 25°C 20 TJ = 125°C 15 10 1000 Coss 100 5 0 VGS, GATE-TO-SOURCE VOLTAGE (V) 16 2 4 6 8 10 12 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 200 400 600 800 1000 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 12 VDS = 240V 10 VDS = 600V 8 6 VDS = 960V 4 2 0 0 90 ID = 12A 14 0 10 14 50 100 150 200 250 300 350 400 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage ISD, REVERSE DRAIN CURRENT (A) 0 Crss 80 70 60 50 40 TJ = 25°C 30 TJ = 150°C 20 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage Rev C 7-2011 0 = 6, 7, 8 & 9V V 050-8072 ID, DRAIN CURRENT (A) 60 200 100 100 IDM ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) APT24M120B2_L 200 10 13μs 100μs 1ms 1 10ms Rds(on) 0.1 Rds(on) 10 13μs 100μs 1ms TJ = 150°C TC = 25°C 1 DC line 0.1 10 100 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 10ms Scaling for Different Case & Junction Temperatures: 100ms ID = ID(T = 25°C)*(TJ - TC)/125 l C DC line 100ms TJ = 125°C TC = 75°C 1 IDM 1 10 100 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area 0.12 D = 0.9 0.10 0.7 0.08 Note: 0.5 0.06 P DM ZθJC, THERMAL IMPEDANCE (°C/W) 0.14 0.3 0.04 t2 t1 = Pulse Duration SINGLE PULSE 0.02 0 t1 t Duty Factor D = 1 /t2 Peak T J = P DM x Z θJC + T C 0.1 0.05 10-5 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 1.0 TO-264 (L) Package Outline T-MAX™ (B2) Package Outline e3 100% Sn Plated 4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 4.60 (.181) 5.21 (.205) 1.80 (.071) 2.01 (.079) 15.49 (.610) 16.26 (.640) 19.51 (.768) 20.50 (.807) 3.10 (.122) 3.48 (.137) 5.38 (.212) 6.20 (.244) 5.79 (.228) 6.20 (.244) Drai n Drai n 20.80 (.819) 21.46 (.845) 7-2011 4.50 (.177) Max. 0.40 (.016) 1.016(.040) 25.48 (1.003) 26.49 (1.043) 2.87 (.113) 3.12 (.123) 2.29 (.090) 2.69 (.106) 1.65 (.065) 2.13 (.084) 19.81 (.780) 20.32 (.800) 1.01 (.040) 1.40 (.055) 19.81 (.780) 21.39 (.842) Gate Drai n Rev C Source 2.21 (.087) 2.59 (.102) 5.45 (.215) BSC 2-Plcs. 050-8072 These dimensions are equal to the TO-247 without the mounting hole. Dimensions in Millimeters (Inches) 0.48 (.019) 0.84 (.033) 2.59 (.102) 3.00 (.118) 0.76 (.030) 1.30 (.051) 2.79 (.110) 3.18 (.125) 5.45 (.215) BSC 2-Plcs. Dimensions in Millimeters (Inches) 2.29 (.090) 2.69 (.106) Gate Drai n Source