Document No.001-90570 Rev. *A ECN # 4791104 Cypress Semiconductor Product Qualification Report QTP# 121904 December 2013 LL65 144 Meg QDR-IV Flip Chip Synchronous SRAM Device Family CY7C4121KV13 CY7C4141KV13 CY7C4122KV13 CY7C4142KV13 CY7C4021KV13 CY7C4041KV13 CY7C4022KV13 CY7C4042KV13 CY7C4121KV13 CY7C4141KV13 CY7C4122KV13 CY7C4142KV13 CY7C4021KV13 CY7C4041KV13 CY7C4022KV13 CY7C4042KV13 65nm (LL65P-18R) Technology, UMC Fab 12A QDR-IV, B2A2, 144Mb, x18, 667MHz, 361 FCBGA QDR-IV, B2A2, 144Mb, x36, 667MHz, 361 FCBGA QDR-IV, B2A2b (w/ bank switching), 144Mb, x18, 1066MHz, 361 FCBGA QDR-IV, B2A2b (w/ bank switching), 144Mb, x36, 1066MHz, 361 FCBGA 72Mb, QDR-IV, B2:A2, 4Mb X 18, 667MHz, 361 FCBGA 72Mb, QDR-IV, B2:A2, 2Mb X 36, 667MHz, 361 FCBGA 72Mb, QDR-IV, B2:A2B, 4Mb X 18,1066MHz, 361 FCBGA 72Mb, QDR-IV, B2:A2B, 2Mb X 36,1066MHz, 361 FCBGA QDR-IV, B2A2, 144Mb, x18, 667MHz, 361 Flip Chip BGA QDR-IV, B2A2, 144Mb, x36, 667MHz, 361 Flip Chip BGA QDR-IV, B2A2b (w/ bank switching), 144Mb, x18, 1066MHz, 361 FCBGA QDR-IV, B2A2b (w/ bank switching), 144Mb, x36, 1066MHz, 361 FCBGA 72Mb, QDR-IV, B2:A2, 4Mb X 18, 667MHz, 361 FCBGA 72Mb, QDR-IV, B2:A2, 2Mb X 36, 667MHz, 361 FCBGA 72Mb, QDR-IV, B2:A2B, 4Mb X 18,1066MHz, 361 FCBGA 72Mb, QDR-IV, B2:A2B, 2Mb X 36,933MHz, 361 FCBGA CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Zhaomin Ji Principal Reliability Engineer (408) 432-7021 Mira Ben-Tzur Quality Engineering Director (408) 943-2675 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 1 of 14 Document No.001-90570 Rev. *A ECN # 4791104 QUALIFICATION HISTORY Qual Report Description of Qualification Purpose Date Comp 091706 Qualification of 65nm (LL65) Technology at UMC Fab 12A and New Device CY7C1553K Base Die 72M QDR Product Family Aug 2009 093202 Qualification of UMC 65nm Process Improvement Nov 2009 103405 LL65 144M QDR Product Family Qualification Dec 2010 121904 LL65 144M QDR-IV Flip-Chip High Speed Product Family Qualification Dec 2013 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 2 of 14 Document No.001-90570 Rev. *A ECN # 4791104 PRODUCT DESCRIPTION (for qualification) Qualification Purpose: Qualify LL65 144M QDR-IV Flip-Chip Product Family at UMC Fab 12A Marketing Part #: CY7C4121KV, CY7C4122KV,CY7C4141KV, CY7C4142KV Device Description: 1.8V Commercial and Industrial available in 361L Flip-Chip BGA Cypress Division: Cypress Semiconductor Corporation –Memory Product Division Overall Die (or Mask) REV Level (pre-requisite for qualification): What ID markings on Die: 7C4141K TECHNOLOGY/FAB PROCESS DESCRIPTION – LL65FH-12 Number of Metal Layers: 6+RDL Passivation Type and Materials: Metal Metal 1: Cu 0.18um Composition: Metal 2: Cu 0.22um Metal 3: Cu 0.22um Metal 4: Cu 0.36um Metal 5: Cu 1.25um Metal6: Cu 1.25um RDL: Al 2.5um 0.4um Oxide / 0.5um Nitride Generic Process Technology/Design Rule (-drawn): CMOS, 65nm Gate Oxide Material/Thickness (MOS): 19.5A Name/Location of Die Fab (prime) Facility: UMC Fab 12 Die Fab Line ID/Wafer Process ID: L65LL PACKAGE AVAILABILITY PACKAGE 361 Flip-Chip BGA ASSEMBLY SITE FACILITY ASE-Taiwan, QTP#122002 Note: Package Qualification details upon request Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 3 of 14 Document No.001-90570 Rev. *A ECN # 4791104 MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION Package Designation: 361 HFC BGA Package Size 21mm x 21mm x 2.515mm Substrate NTK, 3+2+3 layers, 1.15mm Die Size: 13.973mm x 14.301mm x 0.787mm Substrate BT- core R1515W/ABF-GX13 Underfill UA32 (8410-99) Soldermask AUS703 Lid adhesive & TIM Bump source / Solder Composition SE4450 ASE Kaohsiung /LF bump (SnAg2.4+/-0.5%) ASE Chung-Li /LF bump (SnAg1.8+/-0.5%) Bump pad pitch / Height 198um / 85um UBM Structure /Size Ti-1KA/Cu-5KA/plated 3um Ni / 90um Ultra low Alpha solder bump 0.002 alpha/cm2/hr Bond Diagram Designation: 001-74529 MSL 3 Solder Reflow Temp 260C Package Cross Section Yes/No: Yes Assembly Process Flow: 001-90343 Name/Location of Assembly (prime) facility: ASE- G (Taiwan) ELECTRICAL TEST / FINISH DESCRIPTION Test Location: ASE-G (Taiwan) Company Confidential A printed copy of this document is considered uncontrolled. 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Page 4 of 14 Document No.001-90570 Rev. *A ECN # 4791104 RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT Stress/Test Test Condition (Temp/Bias) Result P/F High Temperature Operating Life Early Failure Rate (EFR) Dynamic Operating Condition, Core Voltage 1.45V, 125C P High Temperature Operating Life Latent Failure Rate (LFR) Dynamic Operating Condition, Core Voltage 1.45V, 125C P Pre/Post LFR AC/DC Char AC/DC Critical Parameter Char at LFR 80hrs, 500hrs & 1000hrs P High Temperature Steady State Life (HTSSL) Low Temperature Operating Life High Accelerated Saturation Test (HAST) Temperature Humidity Bias Test (THB) Temperature Cycle Pressure Cooker P Static Operating Condition, Vcc Max= 2.05V, 125C Dynamic Operating Condition, Vcc = 2.05V, -30C 130C, 2.05V, 85%RH Precondition: JESD22 Moisture Sensitivity MSL 3 192 Hrs, 30C/60%RH+3IR-Reflow, 260C 85C, 2.25V, 85%RH Precondition: JESD22 Moisture Sensitivity MSL 3 192 Hrs, 30C/60%RH+3IR-Reflow, 260C MIL-STD-883C, Method 1010, Condition C, -65C to 150C MIL-STD-883C, Method 1010, Condition B, -55C to 125C Precondition: JESD22 Moisture Sensitivity MSL 3 192 Hrs, 30C/60%RH+3IR-Reflow, 260C 121C, 100%RH, 15 Psig Precondition: JESD22 Moisture Sensitivity MSL 3 192 Hrs, 30C/60%RH+3IR-Reflow, 260C P P P P P Precondition JESD22 Moisture Sensitivity P High Temperature Storage 150C 5C, no bias P Electrostatic Discharge Human Body Model (ESD-HBM) 3,300V, JESD22-A114E Electrostatic Discharge Charge Device Model (ESD-CDM) 500V, JESD22-C101C Electrostatic Discharge Machine Model (ESD-MM) 200V, JESD22-A115-A P Soft Error (Alpha Particle) JESD89A P Soft Error (Neutron/Proton) JESD89A P Current Density Meets the Technology Device Level Reliability Specifications P Age Bond Strength 200C, 4HRS MIL-STD-883, Method 883-2011 J-STD-020 P Acoustic Microscopy Static Latchup 125C, 140mA In accordance with JESD78 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 5 of 14 P P P P Document No.001-90570 Rev. *A ECN # 4791104 RELIABILITY FAILURE RATE SUMMARY Stress/Test Device Tested/ Device Hours # Fails Activation Energy Thermal AF3 Failure Rate 2,964 Devices 0 N/A N/A 0 PPM High Temperature Operating Life1,2 Long Term Failure Rate (150C) 89,000 DHRs 0 0.7 170 High Temperature Operating Life1,2 Long Term Failure Rate (125C) 1,366,904 DHRs 0 0.7 55 High Temperature Operating Life Early Failure Rate 10 FIT Assuming an ambient temperature of 55C and a junction temperature rise of 15C. Chi-squared 60% estimations used to calculate the failure rate.. 3 Thermal Acceleration Factor is calculated from the Arrhenius equation 1 2 E 1 1 AF = exp A - k T2 T1 where: EA =The Activation Energy of the defect mechanism. k = Boltzmann's constant = 8.62x10-5 eV/Kelvin. T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device at use conditions. Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 6 of 14 Document No.001-90570 Rev. *A ECN # 4791104 Reliability Test Data QTP #: 091706 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism STRESS: ACOUSTIC, MSL3 CY7C1514KV18 (7C1553K) 8842022 610851583 TAIWN-G COMP 15 0 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G COMP 15 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G COMP 15 0 STRESS: AGE BOND STRENGTH CY7C1514KV18 (7C1553K) 8842022 610851583 TAIWN-G COMP 5 0 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G COMP 5 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G COMP 5 0 610417278 CML-R COMP 3 0 STRESS: DYNAMIC LATCH-UP CY7C1470V33 (7C1470A) 4321389 STRESS: ESD-HUMAN BODY CIRCUIT PER JEDEC EIA/JESD22-A114-B, 2,200V CY7C1514KV18 (7C1553K) 8842022 610852338 TAIWN-G COMP 8 0 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G COMP 8 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G COMP 8 0 CY7C1514KV18 (7C1553K) 8844021 610908348 TAIWN-G COMP 8 0 STRESS: ESD-CHARGE DEVICE MODEL, 500V CY7C1514KV18 (7C1553K) 8842022 610852338 TAIWN-G COMP 9 0 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G COMP 9 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G COMP 9 0 610852338 TAIWN-G COMP 5 0 STRESS: ESD-MACHINE MODEL, 200V CY7C1514KV18 (7C1553K) 8842022 STRESS: HI-ACCEL SATURATION TEST, 130C, 85%RH, 2.25V, PRE COND 192 HR 30C/60%RH, MSL3 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G 128 78 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G 128 77 0 TAIWN-G 1000 70 0 336 77 0 STRESS: HIGH TEMPERATURE STORAGE, PLASTIC, 150C CY7C1514KV18 (7C1553K) 8844020 610851583 STRESS: HIGH TEMP STEADY STATE LIFE TEST, 150C, 2.25V, Vcc Max CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, BOOST REGULATED AT CORE 1.45V, EXTERNAL 2.05V CY7C15631KV18 (7C1553K) 8908001 610920385 TAIWN-G 96 2367 0 CY7C15631KV18 (7C1553K) 8912000 610920386 TAIWN-G 96 2217 0 CY7C15631KV18 (7C1553K) 8910015 610920548 TAIWN-G 96 1321 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, BOOST REGULATED AT CORE 1.45V, EXTERNAL 2.05V CY7C1514KV18 (7C1553K) 8844021 610908348 TAIWN-G 500 178 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 125C, BOOST REGULATED AT CORE 1.45V, EXTERNAL 2.05V CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G 1000 178 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G 1000 178 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 7 of 14 Document No.001-90570 Rev. *A ECN # 4791104 Reliability Test Data QTP #: 091706 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism STRESS: LOW TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, -30C, 2.25V Vcc CY7C1514KV18 (7C1553K) 8842022 610852338 TAIWN-G 500 45 0 STRESS: PRESSURE COOKER TEST, 121C, 100%RH, 15 Psig, PRE COND 192 HR 30C/60%RH, MSL3 CY7C1514KV18 (7C1553K) 8842022 610851583 TAIWN-G 168 76 0 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G 168 78 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G 168 77 0 STRESS: Pre-/ Post HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE CHAR CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G COMP 10 0 STRESS: STATIC LATCH-UP TESTING, 125C, 3.42V, +/-240mA CY7C1514KV18 (7C1553K) 8844020 610854680 TAIWN-G COMP 9 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G COMP 9 0 CY7C1514KV18 (7C1553K) 8844021 610908348 TAIWN-G COMP 9 0 CY7C15631KV18 (7C1553K) 8911000 610922436 TAIWN-G COMP 9 0 STRESS: TEMPERATURE CYCLE COND. C -65C TO 150C, PRE COND 192 HRS 30C/60%RH, MSL3 CY7C1514KV18 (7C1553K) 8842022 610851583 TAIWN-G 1000 77 0 CY7C1514KV18 (7C1553K) 8844020 610854240 TAIWN-G 1000 78 0 CY7C1514KV18 (7C1553K) 8844022 610906896 TAIWN-G 1000 77 0 STRESS: STRESS: TEMPRATURE HUMIDITY TEST, 85C, 85%RH, 2.25V, PRE COND 192 HR 30C/60%RH, MSL3 CY7C1514KV18 (7C1553K) 8842022 610851583 TAIWN-G 1000 77 0 0 STRESS: SER – ALPHA PARTICLE, 3-TEPM, 3-VOLTAGE, @ 85C, Vcc Nom CY7C1514KV18 (7C1553K) 8842022 610851583 TAIWN-G COMP 3 610851583 TAIWN-G COMP 1WF STRESS: X-SECTION/STEM XY AUDIT CY7C1514KV18 (7C1553K) 8842022 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 8 of 14 Document No.001-90570 Rev. *A ECN # 4791104 Reliability Test Data QTP #: 093202 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism STRESS: ESD-HUMAN BODY CIRCUIT PER JEDEC EIA/JESD22-A114-B, 2,200V CY7C15631KV18 (7C1553K) 8911000 610922435 TAIWN-G COMP 8 0 TAIWN-G 1000 80 0 STRESS: HIGH TEMPERATURE STORAGE, PLASTIC, 150C CY7C15631KV18 (7C1553K) 8911000 610922435 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, BOOST REGULATED AT CORE 1.45V, EXTERNAL 2.05V CY7C15631KV18 (7C1553K) 8912000 610921675 TAIWN-G 96 596 0 CY7C15631KV18 (7C1553K) 8910015 610921676 TAIWN-G 96 711 0 CY7C15631KV18 (7C1553K) 8911000 610922435 TAIWN-G 96 1795 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 125C, BOOST REGULATED AT CORE 1.45V, EXTERNAL 2.05V CY7C15631KV18 (7C1553K) 8912000 610921675 TAIWN-G 168 190 0 CY7C15631KV18 (7C1553K) 8911000 610922435 TAIWN-G 500 184 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 9 of 14 Document No.001-90570 Rev. *A ECN # 4791104 Reliability Test Data QTP #: 103405 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism CY7C1612K (7C1612K) 8845001 611032553 CML-RA COMP 15 0 CY7C1612K (7C1612K) 8845001 611032555 CML-RA COMP 15 0 CY7C1612K (7C1612K) 8845001 611032554 CML-RA COMP 15 0 CY7C1612K (7C1612K) 8908003 611024882 CML-RA COMP 15 0 CY7C1612K (7C1612K) 8845001 611024890 CML-RA COMP 15 0 STRESS: ACOUSTIC, MSL3 STRESS: ESD-HUMAN BODY CIRCUIT PER JEDEC EIA/JESD22-A114-B, 2,200V CY7C16539K (7C16539K) 8845004 610933466 G-Taiwan COMP 8 0 CY7C1612K (7C1612K) 8845001 611032553 CML-RA COMP 8 0 STRESS: ESD-CHARGE DEVICE MODEL, 500V CY7C16539K (7C16539K) 8845004 610933466 G-Taiwan COMP 9 0 CY7C1612K (7C1612K) 8845001 611032553 CML-RA COMP 9 0 STRESS: ESD-MACHINE MODEL, 200V CY7C16539K (7C16539K) 8845004 610933466 G-Taiwan COMP 5 0 CY7C1612K (7C1612K) 8845001 611032553 CML-RA COMP 5 0 STRESS: HI-ACCEL SATURATION TEST (130C, 85%RH, 2.05V), PRE COND 192 HR 30C/60%RH, MSL3 CY7C1612K (7C1612K) 8845001 611032553 CML-RA 264 76 0 CY7C1612K (7C1612K) 8908003 611024882 CML-RA 264 72 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 2.05V, REG ON CY7C16538K (7C16538K) 8937000 610945141 G-Taiwan 96 48 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, BOOST REGULATED AT CORE 1.45V, EXTERNAL 2.05V CY7C16538K (7C16538K) 8937000 610944083 G-Taiwan 96 1809 0 CY7C1614K (7C1614K) 8927001 610946060 G-Taiwan 96 1224 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 125C, BOOST REGULATED AT CORE 1.45V, EXTERNAL 2.05V CY7C16538K (7C16538K) 8937000 610944083 G-Taiwan 168 178 0 CY7C16538K (7C16538K) 8937000 610944083 G-Taiwan 1000 178 0 CY7C1614K (7C1614K) 8927001 610946060 G-Taiwan 168 178 0 CY7C1614K (7C1614K) 8927001 610946060 G-Taiwan 1000 178 0 STRESS: HIGH TEMP STORAGE 150C CY7C1612K (7C1612K) 8845001 611032553 CML-RA 500 76 0 CY7C1612K (7C1612K) 8845001 611032553 CML-RA 1000 74 0 CY7C1612K (7C1612K) 8845001 611032553 CML-RA 1500 66 0 CY7C1612K (7C1612K) 8908003 611024882 CML-RA 500 77 0 CY7C1612K (7C1612K) 8908003 611024882 CML-RA 1000 76 0 STRESS: HIGH TEMP STEADY STATE LIFE TEST, 150C, 2.05V, Vcc Max CY7C16539K (7C16539K) 8845004 610933941 CML-RA 168 77 0 CY7C16539K (7C16539K) 8845004 610933941 CML-RA 336 77 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 10 of 14 Document No.001-90570 Rev. *A ECN # 4791104 Reliability Test Data QTP #: 103405 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism STRESS: PRESSURE COOKER TEST, 121C, 100%RH, PRE COND 192 HR 30C/60%RH, MSL3 CY7C1612K (7C1612K) 8845001 611032553 CML-RA 168 75 0 CY7C1612K (7C1612K) 8845001 611032553 CML-RA 288 72 0 CY7C1612K (7C1612K) 8845001 611032555 CML-RA 168 73 0 CY7C1612K (7C1612K) 8845001 611032555 CML-RA 288 73 0 STRESS: Pre-/ Post HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE CHAR CY7C16538K (7C16538K) 8937000 610944083 G-Taiwan COMP 10 0 CY7C1614K (7C1614K) 8927001 610946060 G-Taiwan COMP 10 0 STRESS: STATIC LATCH-UP TESTING, 125C, 3.42V, +/-180mA CY7C16539K (7C16539K) 8845004 610933466 TAIWN-G COMP 9 0 CY7C1612K (7C1612K) 8845001 611032553 CML-RA COMP 9 0 STRESS: TC COND. B -55C TO 125C, PRE COND192 HRS 30C/60%RH, MSL3 CY7C1614KV (7C1614K) 8945028 611036123 CML-RA 500 74 0 CY7C1614KV (7C1614K) 8945028 611036123 CML-RA 1000 74 0 CY7C1614KV (7C1614K) 8945028 611036123 CML-RA 1300 74 0 CY7C1618KV (7C1618K) 8945028 611036125 CML-RA 500 76 0 CY7C1618KV (7C1618K) 8945028 611036125 CML-RA 1000 75 0 CY7C1618KV (7C1618K) 8945028 611036125 CML-RA 1300 75 0 CY7C1613KV (7C1613K) 8015005 611041460 CML-RA 500 77 0 CY7C1613KV (7C1613K) 8015005 611041460 CML-RA 1000 77 0 CY7C1613KV (7C1613K) 8015005 611041460 CML-RA 1300 77 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 11 of 14 Document No.001-90570 Rev. *A ECN # 4791104 Reliability Test Data QTP #: 121904 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism CY7C4141K (7C4141K) 8240014 611310662 ASE-G COMP 15 0 CY7C4141K (7C4141K) 9311001 611330199 ASE-G COMP 15 0 CY7C4141K (7C4141K) 9311001 611324142 ASE-G COMP 15 0 STRESS: ACOUSTIC, MSL3 STRESS: ESD-HUMAN BODY CIRCUIT PER JEDEC EIA/JESD22-A114-B, 2,200V CY7C4141K (7C4141K) 8240014 611237575 ASE-G COMP 8 0 CY7C4141K (7C4141K) 9311001 611330199 ASE-G COMP 8 0 CY7C4141K (7C4141K) 9310013 611340821 ASE-G COMP 8 0 STRESS: ESD-HUMAN BODY CIRCUIT PER JEDEC EIA/JESD22-A114-B, 3,300V CY7C4141K (7C4141K) 8240014 611237575 ASE-G COMP 3 0 CY7C4141K (7C4141K) 9311001 611330199 ASE-G COMP 3 0 CY7C4141K (7C4141K) 9310013 611340821 ASE-G COMP 3 0 STRESS: ESD-CHARGE DEVICE MODEL, 500V CY7C4141K (7C4141K) 8240014 611237575 ASE-G COMP 9 0 CY7C4141K (7C4141K) 9311001 611330199 ASE-G COMP 9 0 CY7C4141K (7C4141K) 9310013 611340821 ASE-G COMP 9 0 611237575 ASE-G COMP 5 0 STRESS: ESD-MACHINE MODEL, 200V CY7C4141K (7C4141K) 8240014 STRESS: HI-ACCEL SATURATION TEST (130C, 85%RH, 2.05V), PRE COND 192 HR 30C/60%RH, MSL3 CY7C4141K (7C4141K) 8240014 611310662 ASE-G COMP 30 0 CY7C4141K (7C4141K) 9311001 611324142 ASE-G COMP 45 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, BOOST REGULATED AT CORE 1.45V, EXTERNAL 2.05V CY7C4141K (7C4141K) 8240014 611310662 ASE-G 96 499 0 CY7C4141K (7C4141K) 9311001 611330199 ASE-G 96 1400 0 CY7C4141K (7C4141K) 9311001 611324141 ASE-G 96 600 0 CY7C4141K (7C4141K) 9310013 611340821 ASE-G 96 465 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 125C, BOOST REGULATED AT CORE 1.45V, EXTERNAL 2.05V CY7C4141K (7C4141K) 8240014 611310662 ASE-G 168 178 0 CY7C4141K (7C4141K) 8240014 611310662 ASE-G 1000 177 0 CY7C4141K (7C4141K) 9311001 611330199 ASE-G 168 178 0 CY7C4141K (7C4141K) 9311001 611330199 ASE-G 1000 178 0 CY7C4141K (7C4141K) 9311001 611324141 ASE-G 168 178 0 CY7C4141K (7C4141K) 9311001 611324142 ASE-G 1000 178 0 CY7C4141K (7C4141K) 9310013 611340821 ASE-G 168 178 0 STRESS: HIGH TEMP STORAGE 150C CY7C4141K (7C4141K) 8240014 611310662 ASE-G 500 77 0 CY7C4141K (7C4141K) 8240014 611310662 ASE-G 1000 77 0 STRESS: HIGH TEMP STEADY STATE LIFE TEST, 150C, 2.05V, Vcc Max CY7C4141K (7C4141K) 8240014 611310662 ASE-G 168 77 0 CY7C4141K (7C4141K) 8240014 611310662 ASE-G 336 77 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 12 of 14 Document No.001-90570 Rev. *A ECN # 4791104 Reliability Test Data QTP #: 121904 Device Fab Lot # Assy Lot # Ass Loc Duration Samp Rej Failure Mechanism STRESS: PRESSURE COOKER TEST, 121C, 100%RH, PRE COND 192 HR 30C/60%RH, MSL3 CY7C4141K (7C4141K) 8240014 611310662 ASE-G 96 77 0 CY7C4141K (7C4141K) 8240014 611310662 ASE-G 168 77 0 CY7C4141K (7C4141K) 8240014 611310662 ASE-G 288 77 0 CY7C4141K (7C4141K) 9311001 611330199 ASE-G 96 77 0 CY7C4141K (7C4141K) 9311001 611330199 ASE-G 168 77 0 CY7C4141K (7C4141K) 9311001 611330199 ASE-G 288 77 0 CY7C4141K (7C4141K) 9311001 611324142 ASE-G 96 77 0 CY7C4141K (7C4141K) 9311001 611324142 ASE-G 168 77 0 CY7C4141K (7C4141K) 9311001 611324142 ASE-G 288 77 0 STRESS: Pre-/ Post (168H/1000H) HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE CHAR CY7C4141K (7C4141K) 8240014 611310662 ASE-G COMP 10 0 CY7C4141K (7C4141K) 9311001 611330199 ASE-G COMP 10 0 CY7C4141K (7C4141K) 9311001 611324141 ASE-G COMP 10 0 STRESS: STATIC LATCH-UP TESTING, 85C, 3.42V, +/-140mA CY7C4141K (7C4141K) 8240014 611237575 ASE-G COMP 6 0 CY7C4141K (7C4141K) 9310013 611340821 ASE-G COMP 6 0 STRESS: STATIC LATCH-UP TESTING, 85C, 3.42V, +/-180mA CY7C4141K (7C4141K) 8240014 611237575 ASE-G COMP 2 0 CY7C4141K (7C4141K) 9310013 611340821 ASE-G COMP 2 0 STRESS: STATIC LATCH-UP TESTING, 125C, 3.42V, +/-140mA CY7C4141K (7C4141K) 8240014 611237575 ASE-G COMP 2 0 CY7C4141K (7C4141K) 9310013 611340821 ASE-G COMP 2 0 ASE-G COMP 3 0 STRESS: SOFT ERROR NEUTRON TESTING CY7C4141K (7C4141K) 8240014 611237575 STRESS: TEMPRATURE CYCLE, COND. C -65C TO 150C, PRE COND192 HRS 30C/60%RH, MSL3 CY7C4141K (7C4141K) 8240014 611310662 ASE-G 500 77 0 CY7C4141K (7C4141K) 9311001 611330199 ASE-G 500 77 0 CY7C4141K (7C4141K) 9311001 611324142 ASE-G 500 77 0 Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 13 of 14 Document No.001-90570 Rev. *A ECN # 4791104 Document History Page Document Title: Document Number: Rev. ECN No. ** 4229037 *A 4791104 QTP 121904: LL65 144 Meg QDR-IV Flip Chip Synchronous SRAM Product Qualification Report 001-90570 Orig. of Change ZIJ ZIJ Description of Change DCON Removed distribution and posting from document history page Initial spec release. Changed substrate BT- core material to R1515W/ABF-GX13 2.and added ASE Chung-Li /LF bump (SnAg1.8+/-0.5%) to the Bump source / Solder Composition section to be aligned with the package spec 00190666. Company Confidential A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision. Page 14 of 14