NSC CLC034MA

February 2005
CLC034
SMPTE 292M / 259M Adaptive Cable Equalizer
General Description
Features
The CLC034 SMPTE 292M / 259M adaptive cable equalizer
is a monolithic integrated circuit for equalizing data transmitted over cable (or any media with similar dispersive loss
characteristics). The equalizer operates over a wide range of
data rates from 143 Mbps to 1.485 Gbps and supports
SMPTE 292M, SMPTE 344M and SMPTE 259M.
n SMPTE 292M, SMPTE 344M and SMPTE 259M
compliant
n Supports DVB-ASI at 270Mbps
n High data rates: 143 Mbps to 1.485 Gbps
n Equalizes up to 140 meters of Belden 1694A at 1.485
Gbps or up to 350 meters of Belden 1694A at 270 Mbps
n Manual bypass, cable length indicator, and output mute
with a programmable threshold
n Single-ended or differential input
n 50Ω differential outputs
n Single 3.3V supply operation
n Replaces the GS1524
The CLC034 implements DC restoration to correctly handle
pathological data conditions. DC restoration can be bypassed for low data rate applications. The equalizer is flexible in allowing either single-ended or differential input drive.
Additional features include a combined carrier detect and
output mute pin which mutes the output when no signal is
present. A programmable mute reference is used to mute the
output at a selectable level of signal degradation. A cable
length indicator is provided to determine the amount of cable
being equalized.
Applications
n SMPTE 292M, SMPTE 344M, and SMPTE 259M serial
digital interfaces
Typical Application
20085901
© 2005 National Semiconductor Corporation
DS200859
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CLC034 SMPTE 292M / 259M Adaptive Cable Equalizer
PRELIMINARY
CLC034
Absolute Maximum Ratings (Note 1)
Supply Voltage
Input Voltage (all inputs)
Input Coupling Capacitance
Cable Input Voltage Swing (Note 5)
−0.5V to 3.6V
Operating Free Air Temperature (TA)
−0.3V to VCC+0.3V
ESD Rating (HBM)
1.0 µF
720 to 880 mVP-P
0˚C to +70˚C
2kV
Recommended Operating
Conditions
3.3V ± 5%
Supply Voltage (VCC – VEE)
DC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Notes 2, 3).
Symbol Parameter
VCMIN
Input Common Mode Voltage
VSDI
Input Voltage Swing
Conditions
Reference
0m cable length, differential,
(Note 6)
VCMOUT Output Common Mode Voltage
VSDO
Min
SDI, SDI
720
SDO, SDO
Output Voltage Swing
50Ω load, differential
CLI DC Voltage
0m cable
Carrier not present
800
mVP-P
V
1.9
V
MUTEREF
1.3
V
0.69
V
2.6
V
1.2
Min to mute outputs
3.0
V
V
80
2
mVP−P
2.5
CD/MUTE
Supply Current
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950
V
Max to force outputs active
ICC
V
VCC –
VSDO/2
Carrier present
CD/MUTE Input Voltage
Units
750
MUTEREF Range
CD/MUTE Output Voltage
Max
CLI
no signal
MUTEREF DC Voltage (floating)
Typ
1.75
2.0
V
90
mA
CLC034
AC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Note 3).
Symbol Parameter
BRSDI
Maximum Equalized Cable
Length (with equalizer
pathological)
tr,tf
Conditions
Input Data Rate
Output Rise Time, Fall Time
Reference
Min
SDI, SDI
143
Typ
m
270Mbps, Belden 8281,
0.2UI output jitter
280
m
1.485Gbps, Belden 1694A,
0.25UI output jitter
140
m
1.485Gbps, Belden 8281,
0.25UI output jitter
100
m
20% – 80%
Output Overshoot
Note 4
single-ended
Output Resistance
Input Return Loss
RIN
Input Resistance
CIN
Input Capacitance
Mbps
350
tOS
ROUT
Units
270Mbps, Belden 1694A,
0.2UI output jitter
SDO, SDO
80
Mismatch in Rise/Fall Time
RLIN
Max
1485
220
ps
30
ps
10
%
50
Ω
18-20
dB
single-ended
TBD
kΩ
single-ended
1
pF
SDI, SDI
15
Note 1: "Absolute Maximum Ratings" are those parameter values beyond which the life and operation of the device cannot be guaranteed. The stating herein of
these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. The table of "Electrical Characteristics"
specifies acceptable device operating conditions.
Note 2: Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are stated referenced to VEE = 0 Volts.
Note 3: Typical values are stated for VCC = +3.3V and TA = +25˚C.
Note 4: Specification is guaranteed by design.
Note 5: These specifications assume and 800 mVP-P signal at the cable input. Levels above and below 800 mV are allowable, but performance may vary. The cable
will attenuate the signal prior to entering the equalizer.
Note 6: The maximum input voltage swing of 950 mVP-P assumes a nonstressing, DC-balance signal; specifically, the SMPTE-recommended color bar test signal.
Pathological or other stressing signals may not be used. This specification is for 0m cable only.
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CLC034
Connection Diagram
20085903
16-Pin SOIC
Order Number CLC034MA
See NS Package Number M16A
Pin Descriptions
Pin #
Name
Description
1
CLI
Cable length indicator. Provides a voltage proportional to the cable length being equalized.
2
VCC
Positive power supply (+3.3V).
3
VEE
Negative power supply (ground).
4
SDI
Serial data true input.
5
SDI
Serial data complement input.
6
VEE
Negative power supply (ground).
7
AEC+
AEC loop filter external capacitor (1µF) positive connection.
8
AEC-
AEC loop filter external capacitor (1µF) negative connection.
9
BYPASS
Bypasses equalization and DC restoration when high. No equalization occurs in this mode.
10
MUTEREF
MUTE Reference. Determines the maximum cable to be equalized before muting.
11
VEE
Negative power supply (ground).
12
SDO
Serial data complement output.
13
SDO
Serial data true output.
14
VEE
Negative power supply (ground).
15
VCC
Positive power supply (+3.3V).
16
CD/MUTE
Bi-directional carrier detect and output mute. CD/MUTE is high when no signal is present. If
unconnected, MUTE is controlled by the MUTEREF setting. To force MUTE on, tie to VCC. To
disable MUTE, tie to GND. CD/MUTE has no function in BYPASS mode.
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CLC034
Block Diagram
20085902
Mute is forced off if this pin is tied to ground, and the outputs
will always mute if this pin is tied to VCC.
The loop response in the AEC block is controlled by an
external 1µF capacitor placed across the AEC+ and AECpins.
Device Operation
BLOCK DESCRIPTION
The Equalizer block is a multi-stage adaptive filter. If Bypass
is high, the equalizer is disabled.
The DC Restore block receives the differential signals from
the equalizer filter block. This block incorporates a selfbiasing DC restore circuit to fully DC restore the signals. If
Bypass is high, this function is disabled.
The Output block produces SDO and SDO.
The Cable Length Indicator provides a voltage to indicate
the length of cable being equalized.
The Mute Reference determines the amount of cable to
equalize before muting the outputs. This is set by applying a
voltage proportional to the required length of cable. The
higher the voltage, the lower the mute threshold.
Carrier Detect / Mute is bi-directional, serving two purposes. As an output, carrier detect monitors the signal power
out of the equalizing filter and compares it to the mute
reference to determine if a valid signal is present. Carrier
detect provides a high voltage when no signal is present.
Mute can be forced on or off by using this pin as an input.
INPUT INTERFACING
The CLC034 accepts either differential or single-ended input. The input must be AC coupled. Transformer coupling is
not supported.
The CLC034 correctly handles equalizer pathological signals
for standard definition and high definition serial digital video,
as described in SMPTE RP 178 and RP 198, respectively.
OUTPUT INTERFACING
The SDO and SDO outputs are internally loaded with 50Ω.
They produce a 750 mVP-P differential output, or a
375 mVP-P single-ended output.
REPLACING THE GENNUM GS1524
The CLC034 is form-fit-function compatible with the Gennum
GS1524.
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CLC034 SMPTE 292M / 259M Adaptive Cable Equalizer
Physical Dimensions
inches (millimeters)
unless otherwise noted
16-Pin SOIC
Order Number CLC034MA
NS Package Number M16A
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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