5962-87807012A SMD

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Changes in accordance with NOR 5962-R050-92.
91-11-19
Monica L. Poelking
B
Add case outline 2. Redraw the waveforms and add test circuit and notes to
figure 4, switching waveforms and test circuit. Update boilerplate to
MIL-PRF-38535 requirements. Editorial changes throughout. - LTG
05-11-28
Thomas M. Hess
C
Update test condition of IOH and IOL values for High and Low output voltage to
table I. Update boilerplate paragraphs to current MIL-PRF-38535
requirements. - MAA
11-07-26
Thomas M. Hess
CURRENT CAGE CODE 67268
REV
SHEET
REV
SHEET
REV STATUS
REV
C
C
C
C
C
C
C
C
C
C
C
C
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
PMIC N/A
PREPARED BY
Greg A. Pitz
STANDARD
MICROCIRCUIT
DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
CHECKED BY
D. A. DiCenzo
APPROVED BY
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
N. A. Hauck
DRAWING APPROVAL DATE
MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS,
OCTAL D-TYPE FLIP-FLOP WITH ENABLE,
MONOLITHIC SILICON
87-05-15
REVISION LEVEL
AMSC N/A
C
SIZE
CAGE CODE
A
14933
SHEET
DSCC FORM 2233
APR 97
5962-87807
1 OF 12
5962-E436-11
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
5962-87807
01
R
A
Drawing number
Device type
(see 1.2.1)
Case outline
(see 1.2.2)
Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
01
Circuit function
54HC377
Octal D-type flip-flop with enable
1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
R
2
Descriptive designator
Terminals
GDIP1-T20 or CDIP2-T20
CQCC1-N20
Package style
20
20
Dual-in-line
Square chip carrier
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings. 1/
Supply voltage range (VCC) ...................................................... -0.5 V dc to +7.0 V dc
DC input voltage range (VIN) .................................................... -0.5 V dc to VCC + 0.5 V dc
DC output voltage range (VOUT) ............................................... -0.5 V dc to VCC + 0.5 V dc
Clamp diode current ................................................................ 20 mA
DC output current (per pin) ...................................................... 25 mA
DC VCC or GND current (per pin) ............................................. 50 mA
Storage temperature range (TSTG) ........................................... -65C to +150C
Maximum power dissipation (PD) 2/ ......................................... 500 mW
Lead temperature (soldering, 10 seconds) .............................. 260C
Thermal resistance, junction-to-case (JC) ............................... See MIL-STD-1835
Junction temperature (TJ) ........................................................ 175C
1.4 Recommended operating conditions.
Supply voltage range (VCC) ...................................................... +2.0 V dc to +6.0 V dc
Input voltage range (VIN) .......................................................... 0.0 V dc to VCC
Output voltage range (VOUT) .................................................... 0.0 V dc to VCC
Case operating temperature range (TC) ................................... -55C to +125C
Input rise or fall time (tr, tf ):
VCC = 2.0 V ........................................................................... 0 to 1000 ns
VCC = 4.5 V ........................................................................... 0 to 500 ns
VCC = 6.0 V ........................................................................... 0 to 400 ns
1/
2/
Unless otherwise specified, all voltages are referenced to ground.
For TC = +100C to +125C, derate linearly at 12 mW/C.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87807
A
REVISION LEVEL
C
SHEET
2
1.4 Recommended operating conditions - Continued.
Minimum setup time, enable or input D to clock (ts):
TC = +25C:
VCC = 2.0 V ....................................................................... 100 ns
VCC = 4.5 V ....................................................................... 20 ns
VCC = 6.0 V ....................................................................... 17 ns
TC = -55C to +125C:
VCC = 2.0 V ....................................................................... 150 ns
VCC = 4.5 V ....................................................................... 30 ns
VCC = 6.0 V ....................................................................... 25 ns
Minimum clock pulse width (tw):
TC = +25C:
VCC = 2.0 V ....................................................................... 100 ns
VCC = 4.5 V ....................................................................... 20 ns
VCC = 6.0 V ....................................................................... 17 ns
TC = -55C to +125C:
VCC = 2.0 V ....................................................................... 150 ns
VCC = 4.5 V ....................................................................... 30 ns
VCC = 6.0 V ....................................................................... 25 ns
Minimum hold time, input D to clock (th1):
TC = +25C:
VCC = 2.0 V ....................................................................... 5 ns
VCC = 4.5 V ....................................................................... 5 ns
VCC = 6.0 V ....................................................................... 5 ns
TC = -55C to +125C:
VCC = 2.0 V ....................................................................... 5 ns
VCC = 4.5 V ....................................................................... 5 ns
VCC = 6.0 V ....................................................................... 5 ns
Minimum hold time, enable to clock (th2):
TC = +25C:
VCC = 2.0 V ....................................................................... 5 ns
VCC = 4.5 V ....................................................................... 5 ns
VCC = 6.0 V ....................................................................... 5 ns
TC = -55C to +125C:
VCC = 2.0 V ....................................................................... 5 ns
VCC = 4.5 V ....................................................................... 5 ns
VCC = 6.0 V ....................................................................... 5 ns
Maximum clock frequency (fMAX):
TC = +25C:
VCC = 2.0 V ....................................................................... 5 MHz
VCC = 4.5 V ....................................................................... 25 MHz
VCC = 6.0 V ....................................................................... 29 MHz
TC = -55C to +125C:
VCC = 2.0 V ....................................................................... 3 MHz
VCC = 4.5 V ....................................................................... 16 MHz
VCC = 6.0 V ....................................................................... 19 MHz
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87807
A
REVISION LEVEL
C
SHEET
3
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to
MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and
qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management
(QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the
device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with
MIL-PRF-38535 is required to identify when the QML flow option is used.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535, appendix A and herein.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.
3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87807
A
REVISION LEVEL
C
SHEET
4
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN
listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD
PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device.
3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance
to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in
accordance with MIL-PRF-38535 to identify when the QML flow option is used.
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and
Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the
requirements of MIL-PRF-38535, appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided
with each lot of microcircuits delivered to this drawing.
3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that
affects this drawing.
3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime's agent, and the acquiring activity retain the
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87807
A
REVISION LEVEL
C
SHEET
5
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions 1/
-55C  TC +125C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Min
High level output
voltage
VOH
VIN = VIH minimum or
VIL maximum
IOH = -20 A
VIN = VIH minimum or
VIL maximum
IOH = -4.0 mA
VIN = VIH minimum or
VIL maximum
IOH = -5.2 mA
Low level output
voltage
High level input
voltage 2/
Low level input
voltage 2/
Quiescent supply
current
Input leakage
current
Input capacitance
VOL
VIN = VIH minimum or
VIL maximum
IOL = + 20 A
VCC = 2.0 V
1, 2, 3
All
4.4
VCC = 6.0 V
5.9
VCC = 4.5 V
3.7
VCC = 6.0 V
5.2
1, 2, 3
Max
1.9
VCC = 4.5 V
VCC = 2.0 V
V
All
0.1
VCC = 4.5 V
0.1
VCC = 6.0 V
0.1
VIN = VIH minimum or
VIL maximum
IOL = +4.0 mA
VCC = 4.5 V
0.4
VIN = VIH minimum or
VIL maximum
IOL = +5.2 mA
VCC = 6.0 V
0.4
VIH
VCC = 2.0 V
All
V
3.15
VCC = 6.0 V
4.2
1, 2, 3
All
V
1.5
VCC = 4.5 V
VCC = 2.0 V
VIL
1, 2, 3
Unit
0.3
VCC = 4.5 V
0.9
VCC = 6.0 V
1.2
V
ICC
VCC = 6.0 V, VIN = VCC or GND
1, 2, 3
All
160
A
IIN
VCC = 6.0 V, VIN = VCC or GND
1, 2, 3
All
1.0
A
CIN
VCC = GND, TC = 25C
See 4.3.1c
4
All
10.0
pF
See 4.3.1d
7
All
Functional tests
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87807
A
REVISION LEVEL
C
SHEET
6
TABLE I. Electrical performance characteristics – Continued.
Test
Symbol
Conditions 1/
-55C  TC +125C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Min
Propagation delay
time, clock to Qn
3/
tPHL,
tPLH
CL = 50 pF
See figure 4
VCC = 2.0 V
9
VCC = 4.5 V
VCC = 6.0 V
All
tTLH,
tTHL
CL = 50 pF
See figure 4
VCC = 2.0 V
VCC = 6.0 V
205
310
9
41
10, 11
62
9
35
9
VCC = 4.5 V
Max
10, 11
10, 11
Transition time
4/
Unit
ns
53
All
75
10, 11
110
9
15
10, 11
22
9
13
10, 11
19
ns
1/ For a power supply of 5.0 V 10%, the worst case output voltages (VOH and VOL) occur for HC at 4.5 V. Thus, the 4.5 V
values should be used when designing with this supply. Worst cases VIH and VIL occur at VCC = 5.5 V and 4.5 V,
respectively. (The VIH value at 5.5 V is 3.85 V). The worst case leakage currents (IIN and ICC) occur for CMOS at the
higher voltage and so the 6.0 V values should be used. Power dissipation capacitance (CPD), typically 30 pF, determine
2
the no load dynamic power consumption, PD = CPD VCC f + ICC VCC, and the no load dynamic current consumption,
IS = CPD VCC f + ICC.
2/ Tests are not required if applied as a forcing function for VOH and VOL.
3/ AC testing at VCC = 2.0 V and VCC = 6.0 V shall be guaranteed, if not tested, to the specified limits.
4/ Transition times (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87807
A
REVISION LEVEL
C
SHEET
7
Device type
All
Case outlines
R and 2
Terminal number
Terminal symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
ENABLE G
Q1
D1
D2
Q2
Q3
D3
D4
Q4
GND
CLOCK
Q5
D5
D6
Q6
Q7
D7
D8
Q8
VCC
FIGURE 1. Terminal connections.
Operating mode
Clock
Load “1”
Load “0”


Hold (do nothing)

X
Inputs
Enable
l
l
h
H
Dn
h
l
Outputs
Qn
H
L
X
X
No change
No change
H = High voltage level steady state
h = High voltage level one setup time prior to the low-to-high clock transition
L = Low voltage level steady state
l = Low voltage level one setup time prior to the low-to-high clock transition
 = Low-to-high clock transition
X = Irrelevant
FIGURE 2. Truth table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87807
A
REVISION LEVEL
C
SHEET
8
FIGURE 3. Logic diagram.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87807
A
REVISION LEVEL
C
SHEET
9
NOTES:
1. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance).
2. Input signal from pulse generator: VIN = 0.0 V to VCC; PRR  1 MHz; ZO = 50; tr = 6.0 ns; tf = 6.0 ns; tr and tf shall be
measured from 0.1 VCC to 0.9 VCC and from 0.9 VCC to 0.1 VCC, respectively; duty cycle = 50 percent.
3. The outputs are measured one at a time with one transition per measurement.
FIGURE 4. Switching waveforms and test circuit.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87807
A
REVISION LEVEL
C
SHEET
10
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
appendix A.
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices
prior to quality conformance inspection. The following additional criteria shall apply:
a. Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method
1015 of MIL-STD-883.
(2) TA = +125C, minimum.
b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
TABLE II. Electrical test requirements.
MIL-STD-883 test requirements
Interim electrical parameters
(method 5004)
Final electrical test parameters
(method 5004)
Group A test requirements
(method 5005)
Groups C and D end-point
electrical parameters
(method 5005)
Subgroups
(in accordance with
MIL-STD-883, method 5005,
table I)
---1*, 2, 3, 9
1, 2, 3, 4, 7, 9, 10, 11
1, 2, 3
* PDA applies to subgroup 1.
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of
MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
4.3.1 Group A inspection.
a.
Tests shall be as specified in table II herein.
b.
Subgroups 5, 6, and 8 in table I, method 5005 of MIL-STD-883 shall be omitted.
c.
Subgroup 4 (CIN measurement) shall be measured only for the initial test and after process or design changes which
may affect input capacitance. Capacitance shall be measured between the designated terminal and GND at a
frequency of 1 MHz. Test all applicable pins on 5 devices with zero failures.
d.
Subgroup 7 shall include verification of the truth table as specified on figure 2 herein.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87807
A
REVISION LEVEL
C
SHEET
11
4.3.2 Groups C and D inspections.
a.
End-point electrical parameters shall be as specified in table II herein.
b.
Steady-state life test conditions, method 1005 of MIL-STD-883.
(1)
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1005 of MIL-STD-883.
(2)
TA = +125C, minimum.
(3)
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing.
6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.4 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires
configuration control and the applicable SMD. DLA Land and Maritime will maintain a record of users and this list will be used
for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices
(FSC 5962) should contact DLA Land and Maritime -VA, telephone (614) 692-0544.
6.5 Comments. Comments on this drawing should be directed to DLA Land and Maritime -VA, Columbus, Ohio 43218-3990
or telephone (614) 692-0547.
6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in
MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and
accepted by DLA Land and Maritime -VA.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-87807
A
REVISION LEVEL
C
SHEET
12
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 11-07-26
Approved sources of supply for SMD 5962-87807 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DLA Land and Maritime -VA. This information
bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime
maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-8780701RA
01295
SNJ54HC377J
5962-87807012A
01295
SNJ54HC377FK
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
Vendor CAGE
number
01295
Vendor name
and address
Texas Instruments Incorporated
Semiconductor Group
8505 Forest Ln.
P.O. Box 660199
Dallas, TX 75243
Point of contact:
U.S. Highway 75 South
P.O. Box 84, M/S 853
Sherman, TX 75090-9493
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.
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