5962-9754701Q2A SMD

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Replace reference to MIL-STD-973 with reference to MIL-PRF-38535.
Delete 1.5 and make change to 4.4.1b. - ro
06-06-14
R. MONNIN
B
Update drawing to current MIL-PRF-38535 requirements.
Remove class M references. - jt
14-06-19
C. SAFFLE
REV
SHEET
REV
SHEET
REV STATUS
REV
B
B
B
B
B
B
B
B
B
B
B
B
B
OF SHEETS
SHEET
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PMIC N/A
PREPARED BY
LARRY E. SHAW
STANDARD
MICROCIRCUIT
DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
CHECKED BY
TUAN D. NGUYEN
APPROVED BY
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
RAY L. MONNIN
DRAWING APPROVAL DATE
97-03-14
REVISION LEVEL
B
MICROCIRCUIT, DIGITAL, BIPOLAR, LOWPOWER SCHOTTKY TTL, 4-BIT MAGNITUDE
COMPARATORS, MONOLITHIC SILICON
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
5962-97547
1 OF 12
5962-E321-14
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and
space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or
Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
-
97547
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
01
Q
E
A
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type. The device type identify the circuit function as follows:
Device type
Generic number
01
Circuit function
54LS85
4-bit magnitude comparators
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
Device requirements documentation
Q or V
Certification and qualification to MIL-PRF-38535
1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows:
Outline letter
E
F
2
Descriptive designator
GDIP1-T16 or CDIP2-T16
GDFP2-F16 or CDFP3-F16
CQCC1-N20
Terminals
16
16
20
Package style
Dual-in-line
Flat pack
Square leadless chip carrier
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-97547
A
REVISION LEVEL
B
SHEET
2
1.3 Absolute maximum ratings. 1/ 2/ 3/
Supply voltage range (VCC) .............................................................
Input voltage (VI) ...............................................................................
Operating free-air temperature range ...............................................
Maximum power dissipation (PD) .....................................................
Storage temperature range ..............................................................
Junction temperature (TJ) ................................................................
7.0 V dc
7.0 V dc
-55°C to +125°C
140 mW
-65°C to +150°C
150°C
Thermal resistance, junction-to-case (θJC) ....................................... See MIL-STD-1835
1.4 Recommended operating conditions.
Supply voltage range (VCC) .............................................................. +4.5 V dc to +5.5 V dc
Minimum high level input voltage (VIH) ............................................ +2.0 V
Maximum low level input voltage (VIL) .............................................. +0.7 V
Maximum high level output current (IOH) ......................................... -400 µA
Maximum low level output current (IOL) ............................................ +4 mA
Case operating temperature range (TC) .......................................... -55°C to +125°C
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://quicksearch.dla.mil/ or from the Standardization Document Order
Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
_____
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
2/
Unless otherwise noted, all voltages are referenced to GND.
3/
The limits for the parameters specified herein shall apply over the full specified VCC range and case temperature range of
-55°C to +125°C. Unused inputs must be held high or low.
STANDARD
MICROCIRCUIT DRAWING
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COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-97547
A
REVISION LEVEL
B
SHEET
3
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Test circuit and timing waveforms. The test circuit and timing waveforms shall be as specified on figure 3.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance
submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the
manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall
be provided with each lot of microcircuits delivered to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-97547
A
REVISION LEVEL
B
SHEET
4
TABLE I. Electrical performance characteristics.
Test
Conditions
-55°C ≤ TC ≤ +125°C
Symbol
Group A
subgroups
4.5 V ≤ VCC ≤ 5.5 V
Device
type
unless otherwise specified
Limits 1/
Min
Unit
Max
Input clamp voltage
VIK
II = -18 mA, VCC = 4.5 V
1,2,3
01
Short circuit output current
IOS 2/
VCC = 5.5 V
1,2,3
01
-20
High level output voltage
VOH
IOH = -400 µA, VCC = 4.5 V,
1,2,3
01
2.5
1,2,3
01
0.4
V
1,2,3
01
0.1
mA
-1.5
V
-100
mA
V
VIL = 0.7 V, VIH = 2 V
Low level output voltage
VOL
IOL = 4 mA, VCC = 4.5 V,
VIL = 0.7 V, VIH = 2 V
Input current at maximum
input voltage
II
VI = 7 V, VCC = 5.5 V,
A < B, A > B inputs
0.3
VI = 7 V, VCC = 5.5 V,
all other inputs
High level input current
IIH
1,2,3
VI = 2.7 V, VCC = 5.5 V,
01
20
µA
A < B, A > B inputs
60
VI = 2.7 V, VCC = 5.5 V,
all other inputs
Low level input current
IIL
1,2,3
VI = 0.4 V, VCC = 5.5 V,
01
-0.4
mA
A < B, A > B inputs
-1.2
VI = 0.4 V, VCC = 5.5 V,
all other inputs
Supply current
Functional test
ICC
VI = 4.5 V, VCC = 5.5 V 3/
VCC = 4.5 V,
4/
1,2,3
01
7,8
01
20
L
H
L
H
mA
VIN = VIH min or VIL max,
verify output VO,
see 4.4.1b
VCC = 5.5 V,
4/
VIN = VIH min or VIL max,
verify output VO,
see 4.4.1b
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
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COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-97547
A
REVISION LEVEL
B
SHEET
5
TABLE I. Electrical performance characteristics – Continued.
Test
Symbol
Conditions
-55°C ≤ TC ≤ +125°C
Number
of gate
levels
4.5 V ≤ VCC ≤ 5.5 V
Group A
subgroups
device type 01
unless otherwise specified
Propagation delay time,
low-to-high level output,
tPLH
any A or B data input
Limits 1/
Min
9
Unit
Max
VCC = 5 V, TA = +25°C, 5/
1
36
CL = 15 pF, RL = 2 kΩ,
2
36
to output A < B, A > B
3
36
VCC = 5 V, TA = +25°C, 5/
4
45
ns
CL = 15 pF, RL = 2 kΩ,
to output A = B
Propagation delay time,
high-to-low level output,
tPHL
any A or B data input
VCC = 5 V, TA = +25°C, 5/
1
9
30
CL = 15 pF, RL = 2 kΩ,
2
30
to output A < B, A > B
3
30
VCC = 5 V, TA = +25°C, 5/
4
45
ns
CL = 15 pF, RL = 2 kΩ,
to output A = B
Propagation delay time,
low-to-high level output,
tPLH
1
9
22
ns
1
9
17
ns
2
9
20
ns
2
9
26
ns
CL = 15 pF, RL = 2 kΩ,
A < B or A = B input
Propagation delay time,
high-to-low level output,
VCC = 5 V, TA = +25°C, 5/
to output A > B
tPHL
VCC = 5 V, TA = +25°C, 5/
CL = 15 pF, RL = 2 kΩ,
A < B or A = B input
to output A > B
Propagation delay time,
low-to-high level output,
A = B input
tPLH
Propagation delay time,
high-to-low level output,
A = B input
tPHL
VCC = 5 V, TA = +25°C, 5/
CL = 15 pF, RL = 2 kΩ,
to output A = B
VCC = 5 V, TA = +25°C, 5/
CL = 15 pF, RL = 2 kΩ,
to output A = B
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-97547
A
REVISION LEVEL
B
SHEET
6
TABLE I. Electrical performance characteristics – Continued.
Test
Symbol
Conditions
-55°C ≤ TC ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
VCC = 5 V, TA = +25°C, 5/
1
9
22
ns
1
9
17
ns
Limits 1/
Min
Propagation delay time,
low-to-high level output,
tPLH
A > B or A = B input
Max
CL = 15 pF, RL = 2 kΩ,
A > B or A = B input
Propagation delay time,
high-to-low level output,
Unit
to output A < B
tPHL
VCC = 5 V, TA = +25°C, 5/
CL = 15 pF, RL = 2 kΩ,
to output A < B
1/
For negative and positive voltage and current values, the sign designates the potential difference in reference to GND
and the direction of current flow, respectively, and the absolute value of the magnitude, not the sign, is relative to the
minimum and maximum limits, as applicable, listed herein.
2/
Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed
one second.
3/
ICC is measured with outputs open, A = B grounded, and all other inputs at 4.5 V.
4/
Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic
patterns used for fault detection. The test vectors used to verify the truth table shall, at a minimum, test all functions of
each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the
truth table in figure 2 herein. Functional tests shall be performed in sequence as approved by the qualifying activity on
qualified devices. Allowable tolerances per MIL-STD-883 may be incorporated. For outputs L ≤ 0.8 V, H ≥ 2.0 V.
5/
Test circuit and timing waveforms are shown in figure 4.
STANDARD
MICROCIRCUIT DRAWING
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COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
B
SHEET
7
Device type
Case outlines
Terminal
number
01
E and F
2
Terminal symbol
1
B3
NC
2
A < B in
B3
3
A = B in
A < B in
4
A > B in
A = B in
5
A > B out
A > B in
6
A = B out
NC
7
A < B out
A > B out
8
GND
A = B out
9
B0
A < B out
10
A0
GND
11
B1
NC
12
A1
B0
13
A2
A0
14
B2
B1
15
A3
A1
16
VCC
NC
17
---
A2
18
---
B2
19
---
A3
20
---
VCC
NC = No connection
FIGURE 1. Terminal connections.
STANDARD
MICROCIRCUIT DRAWING
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REVISION LEVEL
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8
COMPARING
CASCADING
INPUTS
INPUTS
OUTPUTS
A3, B3
A2, B2
A1, B1
A0, B0
A>B
A<B
A=B
A>B
A<B
A=B
A3 > B3
X
X
X
X
X
X
H
L
L
A3 < B3
X
X
X
X
X
X
L
H
L
A3 = B3
A2 > B2
X
X
X
X
X
H
L
L
A3 = B3
A2 < B2
X
X
X
X
X
L
H
L
A3 = B2
A2 = B2
A1 > B1
X
X
X
X
H
L
L
A3 = B3
A2 = B2
A1 < B1
X
X
X
X
L
H
L
A2 = B3
A2 = B2
A1 = B1
A0 > B0
X
X
X
H
L
L
A3 = B3
A2 = B2
A1 = B1
A0 < B0
X
X
X
L
H
L
A3 = B3
A2 = B2
A1 = B1
A0 = B0
H
L
L
H
L
L
A3 = B3
A2 = B2
A1 = B1
A0 = B0
L
H
L
L
H
L
A3 = B3
A2 = B2
A1 = B1
A0 = B0
X
X
H
L
L
H
A3 = B3
A2 = B2
A1 = B1
A0 = B0
H
H
L
L
L
L
A3 = B3
A2 = B2
A1 = B1
A0 = B0
L
L
L
H
H
L
H = High level voltage
L = Low level voltage
X = Irrelevant
FIGURE 2. Truth table.
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NOTES:
1. CL includes probe and jig capacitance.
2. All diodes are 1N3064 or equivalent
FIGURE 3. Test circuit and timing waveforms.
STANDARD
MICROCIRCUIT DRAWING
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COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
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REVISION LEVEL
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4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection.
4.2.1 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table II herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections, and as specified herein.
4.4.1 Group A inspection.
a.
Tests shall be as specified in table II herein.
b.
For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device.
c.
Subgroups 4, 5, 6, 10, and 11 in table I, method 5005 of MIL-STD-883 shall be omitted.
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MICROCIRCUIT DRAWING
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REVISION LEVEL
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TABLE II. Electrical test requirements.
Test requirements
Interim electrical
parameters (see 4.2)
Final electrical
parameters (see 4.2)
Group A test
requirements (see 4.4)
Group C end-point electrical
parameters (see 4.4)
Group D end-point electrical
parameters (see 4.4)
Group E end-point electrical
parameters (see 4.4)
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Device
Device
class Q
class V
----1,2,3, 1/
7,8,9
1,2,3,7,8,9
1,2,3, 2/
7,8,9
1,2,3,7,8,9
1,2,3
1,2,3,7,8,9
1,2,3
1,2,3
---
---
1/ PDA applies to subgroup 1.
2/ PDA applies to subgroups 1 and 7.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein.
4.4.2.1 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MILSTD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured
(see 3.5 herein).
a.
End-point electrical parameters shall be as specified in table II herein.
b.
For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. All device classes must meet the postirradiation end-point
electrical parameter limits as defined in table I at TA = +25°C ±5°C, after exposure, to the subgroups specified in table II
herein.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes
Q and V.
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REVISION LEVEL
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6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires
configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and
this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic
devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108.
6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990,
or telephone (614) 692-0540.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in
MIL-HDBK-103 and QML-38535. The vendors listed in MIL-HDBK-103 and QML-38535 have submitted a certificate of
compliance (see 3.6 herein) to DLA Land and Maritime-VA and have agreed to this drawing.
STANDARD
MICROCIRCUIT DRAWING
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DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
B
SHEET
13
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 14-06-19
Approved sources of supply for SMD 5962-97547 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information
bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime
maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-9754701QEA
01295
SNJ54LS85J
5962-9754701QFA
01295
SNJ54LS85W
5962-9754701Q2A
01295
SNJ54LS85FK
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
Vendor CAGE
number
01295
Vendor name
and address
Texas Instruments, Inc.
Semiconductor Group
8505 Forest Ln.
P.O. Box 660199
Dallas, TX 75243
Point of contact:
U.S. Highway 75 South
P.O. Box 84, M/S 853
Sherman, TX 75090-9493
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.
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