APT31M100B2 APT31M100L 1000V, 32A, 0.38Ω Max N-Channel MOSFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. T-Ma x TM TO-264 APT31M100B2 APT31M100L D Single die MOSFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI/RFI • PFC and other boost converter • Low RDS(on) • Buck converter • Ultra low Crss for improved noise immunity • Two switch forward (asymmetrical bridge) • Low gate charge • Single switch forward • Avalanche energy rated • Flyback • RoHS compliant • Inverters Absolute Maximum Ratings Symbol ID Ratings Parameter Continuous Drain Current @ TC = 25°C 32 Continuous Drain Current @ TC = 100°C 20 Unit A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 1875 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 16 A 120 1 Thermal and Mechanical Characteristics Min Characteristic Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 1040 RθJC Junction to Case Thermal Resistance 0.12 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range TL Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight Torque Mounting Torque ( TO-264 Package), 4-40 or M3 screw Microsemi Website - http://www.microsemi.com 0.11 -55 150 300 °C/W °C 0.22 oz 6.2 g 10 in·lbf 1.1 N·m 050-8071 Rev D 7-2011 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 1000 ∆VBR(DSS)/∆TJ Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ VGS = 10V, ID = 16A 3 Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics VDS = 1000V VGS = 0V Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Typ Max 1.15 0.34 4 -10 0.38 5 TJ = 25°C 100 500 ±100 TJ = 125°C VGS = ±30V Unit V V/°C Ω V mV/°C μA nA TJ = 25°C unless otherwise specified Parameter gfs 3 VGS = VDS, ID = 2.5mA Threshold Voltage Temperature Coefficient IDSS Symbol Reference to 25°C, ID = 250μA Breakdown Voltage Temperature Coefficient RDS(on) APT31M100B2_L Min Test Conditions VDS = 50V, ID = 16A 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Max 34 8500 115 700 VGS = 0V, VDS = 25V f = 1MHz Co(cr) Typ Unit S pF 290 VGS = 0V, VDS = 0V to 667V 150 Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time Resistive Switching Current Rise Time VDD = 667V, ID = 16A tr td(off) tf 260 46 125 39 35 130 33 VGS = 0 to 10V, ID = 16A, VDS = 500V RG = 2.2Ω 6 , VGG = 15V Turn-Off Delay Time Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Diode Forward Voltage ISD = 16A, TJ = 25°C, VGS = 0V trr Reverse Recovery Time ISD = 16A 3 Qrr Reverse Recovery Charge Peak Recovery dv/dt Typ Max Unit 32 A G VSD dv/dt Min D 120 S diSD/dt = 100A/μs, TJ = 25°C ISD ≤ 16A, di/dt ≤1000A/μs, VDD = 667V, TJ = 125°C 1 1140 30 V ns μC 10 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 14.65mH, RG = 2.2Ω, IAS = 16A. 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 050-8071 Rev D 7-2011 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(cr) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -2.47E-7/VDS^2 + 4.36E-8/VDS + 8.44E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT31M100B2_L 100 V 90 GS 35 = 10V T = 125°C J 30 V TJ = -55°C 70 ID, DRIAN CURRENT (A) 60 50 TJ = 25°C 40 30 20 0 25 20 15 5V 10 5 TJ = 125°C 10 TJ = 150°C 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 4.5V 0 NORMALIZED TO VGS = 10V @ 16A 2.5 1.5 1.0 250μSEC. PULSE TEST @ <0.5 % DUTY CYCLE 80 TJ = -55°C 60 TJ = 25°C 40 TJ = 125°C 20 0.5 0 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 3, RDS(ON) vs Junction Temperature 0 1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 20,000 45 Ciss 10,000 40 35 TJ = -55°C 30 C, CAPACITANCE (pF) gfs, TRANSCONDUCTANCE VDS> ID(ON) x RDS(ON) MAX. 100 2.0 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics 120 ID, DRAIN CURRENT (A) RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE Figure 1, Output Characteristics 3.0 TJ = 25°C 25 TJ = 125°C 20 15 10 1000 Coss 100 Crss 5 0 VGS, GATE-TO-SOURCE VOLTAGE (V) 16 4 8 12 16 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 200 400 600 800 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 12 VDS = 200V 10 VDS = 500V 8 6 VDS = 800V 4 2 0 0 120 ID = 16A 14 0 10 20 50 100 150 200 250 300 350 400 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage ISD, REVERSE DRAIN CURRENT (A) 0 = 6, 7, 8 & 9V GS 100 80 60 TJ = 25°C 40 TJ = 150°C 20 0 0 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage 050-8071 Rev D 7-2011 ID, DRAIN CURRENT (A) 80 APT31M100B2_L 200 200 100 100 IDM ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) IDM 10 13μs 100μs 1ms 1 0.1 Rds(on) 10ms TJ = 150°C TC = 25°C 1 DC line 0.1 10 100 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 13μs 100μs Rds(on) 1ms 10ms Scaling for Different Case & Junction Temperatures: 100ms ID = ID(T = 25°C)*(TJ - TC)/125 DC line C 100ms TJ = 125°C TC = 75°C 1 10 1 10 100 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area 0.12 D = 0.9 0.10 0.7 0.08 Note: 0.5 0.06 P DM ZθJC, THERMAL IMPEDANCE (°C/W) 0.14 0.3 0.04 t2 t1 = Pulse Duration SINGLE PULSE 0.02 0 t1 t Duty Factor D = 1 /t2 Peak T J = P DM x Z θJC + T C 0.1 0.05 10-5 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration T-MAX™ (B2) Package Outline 1.0 TO-264 (L) Package Outline e3 100% Sn Plated 4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 4.60 (.181) 5.21 (.205) 1.80 (.071) 2.01 (.079) 15.49 (.610) 16.26 (.640) 19.51 (.768) 20.50 (.807) 3.10 (.122) 3.48 (.137) 5.38 (.212) 6.20 (.244) 5.79 (.228) 6.20 (.244) Drai n Drai n 20.80 (.819) 21.46 (.845) 050-8071 Rev D 7-2011 4.50 (.177) Max. 0.40 (.016) 1.016(.040) 25.48 (1.003) 26.49 (1.043) 2.87 (.113) 3.12 (.123) 2.29 (.090) 2.69 (.106) 1.65 (.065) 2.13 (.084) 19.81 (.780) 20.32 (.800) 1.01 (.040) 1.40 (.055) 19.81 (.780) 21.39 (.842) Gate Drai n Source 2.21 (.087) 2.59 (.102) 5.45 (.215) BSC 2-Plcs. These dimensions are equal to the TO-247 without the mounting hole. Dimensions in Millimeters (Inches) 0.48 (.019) 0.84 (.033) 2.59 (.102) 3.00 (.118) 0.76 (.030) 1.30 (.051) 2.79 (.110) 3.18 (.125) 5.45 (.215) BSC 2-Plcs. Dimensions in Millimeters (Inches) 2.29 (.090) 2.69 (.106) Gate Drai n Source