APT34F100B2 APT34F100L 1000V, 35A, .38Ω Max trr ≤300ns N-Channel FREDFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. T-Max® TO-264 APT34F100B2 APT34F100L D Single die FREDFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI • ZVS phase shifted and other full bridge • Low trr for high reliability • Half bridge • Ultra low Crss for improved noise immunity • PFC and other boost converter • Low gate charge • Buck converter • Avalanche energy rated • Single and two switch forward • RoHS compliant • Flyback Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 35 Continuous Drain Current @ TC = 100°C 21 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 2165 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 18 A 1 140 Thermal and Mechanical Characteristics Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 1135 RθJC Junction to Case Thermal Resistance 0.11 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range TL Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight Torque Mounting Torque ( TO-264 Package), 4-40 or M3 screw Microsemi Website - http://www.microsemi.com 0.11 -55 150 300 °C/W °C 0.22 oz 6.2 g 10 in·lbf 1.1 N·m Rev D 8-2011 Min Characteristic 050-8123 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter VBR(DSS) Drain-Source Breakdown Voltage ∆VBR(DSS)/∆TJ Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ Min 1000 VGS = 10V, ID = 18A 3 Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics VDS = 1000V Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Typ Max 1.15 0.32 4 -10 0.38 5 TJ = 25°C VGS = 0V 250 1000 ±100 TJ = 125°C VGS = ±30V Unit V V/°C Ω V mV/°C μA nA TJ = 25°C unless otherwise specified Parameter gfs 2.5 VGS = VDS, ID = 2.5mA Threshold Voltage Temperature Coefficient IDSS Symbol Test Conditions VGS = 0V, ID = 250μA Reference to 25°C, ID = 250μA Breakdown Voltage Temperature Coefficient RDS(on) APT34F100B2_L Min Test Conditions VDS = 50V, ID = 18A 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Max 39 9835 130 825 VGS = 0V, VDS = 25V f = 1MHz Co(cr) Typ Unit S pF 335 VGS = 0V, VDS = 0V to 667V Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time tr td(off) tf Current Rise Time Turn-Off Delay Time 170 305 55 145 39 40 150 VGS = 0 to 10V, ID = 18A, VDS = 500V Resistive Switching VDD = 667V, ID = 18A RG = 2.2Ω 6 , VGG = 15V Current Fall Time nC ns 38 Source-Drain Diode Characteristics Symbol IS ISM VSD Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge Irrm Reverse Recovery Current dv/dt Peak Recovery dv/dt Test Conditions Min Typ D MOSFET symbol showing the integral reverse p-n junction diode (body diode) A 140 S 1.1 300 650 TJ = 25°C TJ = 125°C TJ = 25°C VDD = 100V TJ = 125°C diSD/dt = 100A/μs TJ = 25°C Unit 35 G ISD = 18A, TJ = 25°C, VGS = 0V ISD = 18A 3 Max TJ = 125°C ISD ≤ 18A, di/dt ≤1000A/μs, VDD = 667V, TJ = 125°C 1.61 4.21 11.6 15.8 V ns μC A 25 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 13.36mH, RG = 25Ω, IAS = 18A. 050-8123 Rev D 8-2011 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -2.85E-7/VDS^2 + 5.04E-8/VDS + 9.75E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT34F100B2_L 100 V GS 35 = 10V T = 125°C J 30 60 TJ = 25°C 40 20 GS 25 20 15 5V 10 5 TJ = 125°C 0 TJ = 150°C 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 4.5V 0 3.0 NORMALIZED TO VGS = 10V @ 18A 2.5 1.5 1.0 0.5 250μSEC. PULSE TEST @ <0.5 % DUTY CYCLE 100 80 TJ = -55°C 60 TJ = 25°C 40 TJ = 125°C 20 0 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 3, RDS(ON) vs Junction Temperature 0 1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 20,000 50 Ciss 10,000 TJ = -55°C C, CAPACITANCE (pF) 40 TJ = 25°C 30 TJ = 125°C 20 1000 Coss 100 10 16 5 10 15 20 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 200 400 600 800 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 12 VDS = 200V 10 VDS = 500V 8 6 VDS = 800V 4 2 0 0 140 ID = 18A 14 0 10 25 50 100 150 200 250 300 350 400 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 120 100 80 TJ = 25°C 60 TJ = 150°C 40 20 0 0 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage Rev D 8-2011 0 050-8123 0 Crss ISD, REVERSE DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE VDS> ID(ON) x RDS(ON) MAX. 120 2.0 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics 140 ID, DRAIN CURRENT (A) RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE Figure 1, Output Characteristics VGS, GATE-TO-SOURCE VOLTAGE (V) = 6, 7, 8 & 9V V TJ = -55°C ID, DRIAN CURRENT (A) ID, DRAIN CURRENT (A) 80 APT34F100B2_L 200 200 100 100 IDM 10 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) IDM 13μs 100μs 1ms 1 10ms Rds(on) 100ms 0.1 TJ = 125°C TC = 75°C 1 10 13μs 100μs TJ = 150°C TC = 25°C 1 Scaling for Different Case & Junction 100ms Temperatures: DC line ID = ID(T = 25°C)*(TJ - TC)/125 DC line 0.1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 1ms 10ms Rds(on) C 1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area 0.10 D = 0.9 0.08 0.7 0.06 0.5 0.04 t1 0.3 t2 t1 = Pulse Duration SINGLE PULSE 0.02 0 Note: P DM ZθJC, THERMAL IMPEDANCE (°C/W) 0.12 t Duty Factor D = 1 /t2 Peak T J = P DM x Z θJC + T C 0.1 0.05 10-5 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration T-MAX® (B2) Package Outline 1.0 TO-264 (L) Package Outline e3 100% Sn Plated 4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 4.60 (.181) 5.21 (.205) 1.80 (.071) 2.01 (.079) 15.49 (.610) 16.26 (.640) 19.51 (.768) 20.50 (.807) 3.10 (.122) 3.48 (.137) 5.38 (.212) 6.20 (.244) 5.79 (.228) 6.20 (.244) Drai n Drai n 20.80 (.819) 21.46 (.845) 050-8123 Rev D 8-2011 4.50 (.177) Max. 0.40 (.016) 1.016(.040) 25.48 (1.003) 26.49 (1.043) 2.87 (.113) 3.12 (.123) 2.29 (.090) 2.69 (.106) 1.65 (.065) 2.13 (.084) 19.81 (.780) 20.32 (.800) 1.01 (.040) 1.40 (.055) 19.81 (.780) 21.39 (.842) Gate Drai n Source 2.21 (.087) 2.59 (.102) 5.45 (.215) BSC 2-Plcs. These dimensions are equal to the TO-247 without the mounting hole. Dimensions in Millimeters and (Inches) 0.48 (.019) 0.84 (.033) 2.59 (.102) 3.00 (.118) 0.76 (.030) 1.30 (.051) 2.79 (.110) 3.18 (.125) 5.45 (.215) BSC 2-Plcs. Dimensions in Millimeters and (Inches) 2.29 (.090) 2.69 (.106) Gate Drain Source