APT34F60B APT34F60S 600V, 36A, 0.19Ω Max trr ≤250ns N-Channel FREDFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. TO -24 7 D 3 PAK APT34F60B APT34F60S D Single die FREDFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI • ZVS phase shifted and other full bridge • Low trr for high reliability • Half bridge • Ultra low Crss for improved noise immunity • PFC and other boost converter • Low gate charge • Buck converter • Avalanche energy rated • Single and two switch forward • RoHS compliant • Flyback Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 36 Continuous Drain Current @ TC = 100°C 23 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 930 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 17 A 1 124 Thermal and Mechanical Characteristics Max Unit W PD Total Power Dissipation @ TC = 25°C 624 RθJC Junction to Case Thermal Resistance 0.20 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range TL Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw Microsemi Website - http://www.microsemi.com 0.15 -55 150 300 °C/W °C 0.22 oz 6.2 g 10 in·lbf 1.1 N·m 8-2011 Typ Rev D Min Characteristic 050-8074 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 600 ∆VBR(DSS)/∆TJ Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ VGS = 10V, ID = 17A 3 Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance VDS = 600V TJ = 25°C VGS = 0V TJ = 125°C Typ Max 0.57 0.15 4 -10 0.19 5 100 500 ±100 VGS = ±30V Unit V V/°C Ω V mV/°C μA nA TJ = 25°C unless otherwise specified Parameter gfs 2.5 VGS = VDS, ID = 1mA Threshold Voltage Temperature Coefficient IDSS Symbol Reference to 25°C, ID = 250μA Breakdown Voltage Temperature Coefficient RDS(on) APT34F60B_S Min Test Conditions VDS = 50V, ID = 17A 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Max 32 6640 70 610 VGS = 0V, VDS = 25V f = 1MHz Co(cr) Typ Unit S pF 325 VGS = 0V, VDS = 0V to 400V Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time tr td(off) tf Current Rise Time Turn-Off Delay Time 170 165 36 70 37 43 115 34 VGS = 0 to 10V, ID = 17A, VDS = 300V Resistive Switching VDD = 400V, ID = 17A RG = 4.7Ω 6 , VGG = 15V Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge Irrm Reverse Recovery Current dv/dt Peak Recovery dv/dt Test Conditions Min Typ D MOSFET symbol showing the integral reverse p-n junction diode (body diode) Max 36 A G 124 S ISD = 17A, TJ = 25°C, VGS = 0V 1.0 250 525 TJ = 25°C TJ = 125°C ISD = 17A 3 TJ = 25°C diSD/dt = 100A/μs TJ = 125°C Unit TJ = 25°C TJ = 125°C 10 25 9 12 ISD ≤ 17A, di/dt ≤1000A/μs, VDD = 400V, TJ = 125°C V ns μC A 20 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 6.44mH, RG = 25Ω, IAS = 17A. 050-8074 Rev D 8-2011 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -8.03E-8/VDS^2 + 2.80E-8/VDS + 9.89E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT34F60B_S 120 V GS 60 = 10V T = 125°C J TJ = -55°C ID, DRIAN CURRENT (A) 60 40 20 40 6V 30 20 5.5V 10 TJ = 150°C 5V TJ = 125°C 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 0 Figure 2, Output Characteristics 120 NORMALIZED TO VGS = 10V @ 17A 2.5 VDS> ID(ON) x RDS(ON) MAX. 250μSEC. PULSE TEST @ <0.5 % DUTY CYCLE 100 ID, DRAIN CURRENT (A) 2.0 1.5 1.0 80 TJ = -55°C 60 TJ = 25°C 40 TJ = 125°C 20 0.5 0 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 3, RDS(ON) vs Junction Temperature 60 0 1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 20,000 C, CAPACITANCE (pF) TJ = 25°C 40 TJ = 125°C 30 20 1000 Coss 100 10 Crss 5 10 15 20 25 30 35 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 100 200 300 400 500 600 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 12 VDS = 120V 10 VDS = 300V 8 6 VDS = 480V 4 2 0 0 120 ID = 17A 14 0 10 40 50 100 150 200 250 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 100 80 TJ = 25°C 60 TJ = 150°C 40 8-2011 0 16 VGS, GATE-TO-SOURCE VOLTAGE (V) Ciss TJ = -55°C ISD, REVERSE DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE 10,000 50 20 0 0 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage Rev D RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE Figure 1, Output Characteristics 3.0 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 050-8074 ID, DRAIN CURRENT (A) TJ = 25°C 0 = 7&8V GS 80 0 V 50 100 APT34F60B_S 200 200 100 100 IDM ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) IDM 10 13μs 100μs Rds(on) 1 0.1 1ms 10ms 13μs Rds(on) 0.1 1ms 10ms Scaling for Different Case & Junction Temperatures: ID = ID(T = 25°C)*(TJ - TC)/125 100ms C DC line DC line 10 100 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 100μs TJ = 150°C TC = 25°C 1 100ms TJ = 125°C TC = 75°C 1 10 1 10 100 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area D = 0.9 0.20 0.15 0.7 Note: 0.5 0.10 P DM ZθJC, THERMAL IMPEDANCE (°C/W) 0.25 t2 0.3 0.05 0 t1 = Pulse Duration SINGLE PULSE t Duty Factor D = 1 /t2 Peak T J = P DM x Z θJC + T C 0.1 0.05 10-5 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 3 e3 100% Sn Plated 15.49 (.610) 16.26 (.640) 6.15 (.242) BSC 5.38 (.212) 6.20 (.244) Drai n (Heat Sink) e1 SAC: Tin, Silver, Copper 4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 1.0 D PAK Package Outline TO-247 (B) Package Outline Drai n t1 4.98 (.196) 5.08 (.200) 1.47 (.058) 1.57 (.062) 15.95 (.628) 16.05(.632) Revised 4/18/95 20.80 (.819) 21.46 (.845) 1.04 (.041) 1.15(.045) 13.79 (.543) 13.99(.551) 13.41 (.528) 13.51(.532) Revised 8/29/97 11.51 (.453) 11.61 (.457) 3.50 (.138) 3.81 (.150) 0.46 (.018) 0.56 (.022) {3 Plcs} 050-8074 Rev D 8-2011 4.50 (.177) Max. 0.40 (.016) 1.016(.040) 1.65 (.065) 2.13 (.084) 19.81 (.780) 20.32 (.800) 1.01 (.040) 1.40 (.055) 2.21 (.087) 2.59 (.102) 2.87 (.113) 3.12 (.123) 5.45 (.215) BSC 2-Plcs. Dimensions in Millimeters (Inches) Gate Drai n Source 0.020 (.001) 0.178 (.007) 2.67 (.105) 2.84 (.112) 1.27 (.050) 1.40 (.055) 1.22 (.048) 1.32 (.052) 1.98 (.078) 2.08 (.082) 5.45 (.215) BSC {2 Plcs. } Source Drai n Gate Dimensions in Millimeters (Inches) 3.81 (.150) 4.06 (.160) (Base of Lead) Heat Sink (Drain) and Leads are Plated